9ef986929c
Previously Loongson 1B and Loongson 1C have their own libcpu implemention, but they're almost identical. So we merge them into gs232 and adapt to new common code. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
68 lines
1.5 KiB
C
68 lines
1.5 KiB
C
/*
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* Copyright (c) 2006-2019, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2011-08-08 lgnq first version
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*/
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#ifndef __LS1B_H__
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#define __LS1B_H__
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#include <gs232.h>
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#define LS1B_ACPI_IRQ 0
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#define LS1B_HPET_IRQ 1
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#define LS1B_UART0_IRQ 2
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#define LS1B_UART1_IRQ 3
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#define LS1B_UART2_IRQ 4
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#define LS1B_UART3_IRQ 5
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#define LS1B_CAN0_IRQ 6
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#define LS1B_CAN1_IRQ 7
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#define LS1B_SPI0_IRQ 8
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#define LS1B_SPI1_IRQ 9
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#define LS1B_AC97_IRQ 10
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#define LS1B_MS_IRQ 11
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#define LS1B_KB_IRQ 12
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#define LS1B_DMA0_IRQ 13
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#define LS1B_DMA1_IRQ 14
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#define LS1B_NAND_IRQ 15
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#define LS1B_I2C0_IRQ 16
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#define LS1B_I2C1_IRQ 17
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#define LS1B_PWM0_IRQ 18
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#define LS1B_PWM1_IRQ 19
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#define LS1B_PWM2_IRQ 20
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#define LS1B_PWM3_IRQ 21
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#define LS1B_LPC_IRQ 22
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#define LS1B_EHCI_IRQ 32
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#define LS1B_OHCI_IRQ 33
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#define LS1B_GMAC1_IRQ 34
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#define LS1B_GMAC2_IRQ 35
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#define LS1B_SATA_IRQ 36
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#define LS1B_GPU_IRQ 37
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#define LS1B_PCI_INTA_IRQ 38
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#define LS1B_PCI_INTB_IRQ 39
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#define LS1B_PCI_INTC_IRQ 40
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#define LS1B_PCI_INTD_IRQ 41
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#define LS1B_GPIO_IRQ 64
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#define LS1B_GPIO_FIRST_IRQ 64
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#define LS1B_GPIO_IRQ_COUNT 96
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#define LS1B_GPIO_LAST_IRQ (LS1B_GPIO_FIRST_IRQ + LS1B_GPIO_IRQ_COUNT-1)
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#define INT_PCI_INTA (1<<6)
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#define INT_PCI_INTB (1<<7)
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#define INT_PCI_INTC (1<<8)
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#define INT_PCI_INTD (1<<9)
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#define LS1B_LAST_IRQ 159
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#define MIPS_CPU_TIMER_IRQ 167
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#define LS1B_INTREG_BASE 0xbfd01040
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#define LS1B_DMA_IRQ_BASE 168
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#define LS1B_DMA_IRQ_COUNT 16
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#endif
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