214 lines
16 KiB
XML
214 lines
16 KiB
XML
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<raConfiguration version="8">
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<generalSettings>
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<option key="#Board#" value="board.ra8d1ek"/>
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<option key="CPU" value="RA8D1"/>
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<option key="Core" value="CM85"/>
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<option key="#TargetName#" value="R7FA8D1BHECBD"/>
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<option key="#TargetARCHITECTURE#" value="cortex-m85"/>
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<option key="#DeviceCommand#" value="R7FA8D1BH"/>
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<option key="#RTOS#" value="_none"/>
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<option key="#pinconfiguration#" value="R7FA8M1AHECBD.pincfg"/>
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<option key="#FSPVersion#" value="5.1.0"/>
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<option key="#ConfigurationFragments#" value="Renesas##BSP##Board##ra8m1_ek##|Renesas##BSP##Board##ra8d1_ek##"/>
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<option key="#SELECTED_TOOLCHAIN#" value="com.arm.toolchain"/>
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</generalSettings>
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<raBspConfiguration/>
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<raClockConfiguration>
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<node id="board.clock.xtal.freq" mul="20000000" option="_edit"/>
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<node id="board.clock.hoco.freq" option="board.clock.hoco.freq.48m"/>
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<node id="board.clock.loco.freq" option="board.clock.loco.freq.32768"/>
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<node id="board.clock.moco.freq" option="board.clock.moco.freq.8m"/>
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<node id="board.clock.subclk.freq" option="board.clock.subclk.freq.32768"/>
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<node id="board.clock.pll.source" option="board.clock.pll.source.xtal"/>
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<node id="board.clock.pll.div" option="board.clock.pll.div.1"/>
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<node id="board.clock.pll.mul" option="board.clock.pll.mul.48_00"/>
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<node id="board.clock.pll.display" option="board.clock.pll.display.value"/>
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<node id="board.clock.pll1p.div" option="board.clock.pll1p.div.2"/>
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<node id="board.clock.pll1p.display" option="board.clock.pll1p.display.value"/>
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<node id="board.clock.pll1q.div" option="board.clock.pll1q.div.4"/>
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<node id="board.clock.pll1q.display" option="board.clock.pll1q.display.value"/>
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<node id="board.clock.pll1r.div" option="board.clock.pll1r.div.2"/>
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<node id="board.clock.pll1r.display" option="board.clock.pll1r.display.value"/>
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<node id="board.clock.pll2.source" option="board.clock.pll2.source.disabled"/>
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<node id="board.clock.pll2.div" option="board.clock.pll2.div.1"/>
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<node id="board.clock.pll2.mul" option="board.clock.pll2.mul.48_00"/>
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<node id="board.clock.pll2.display" option="board.clock.pll2.display.value"/>
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<node id="board.clock.pll2p.div" option="board.clock.pll2p.div.2"/>
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<node id="board.clock.pll2p.display" option="board.clock.pll2p.display.value"/>
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<node id="board.clock.pll2q.div" option="board.clock.pll2q.div.2"/>
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<node id="board.clock.pll2q.display" option="board.clock.pll2q.display.value"/>
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<node id="board.clock.pll2r.div" option="board.clock.pll2r.div.2"/>
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<node id="board.clock.pll2r.display" option="board.clock.pll2r.display.value"/>
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<node id="board.clock.clock.source" option="board.clock.clock.source.pll1p"/>
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<node id="board.clock.clkout.source" option="board.clock.clkout.source.disabled"/>
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<node id="board.clock.sciclk.source" option="board.clock.sciclk.source.pll1p"/>
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<node id="board.clock.spiclk.source" option="board.clock.spiclk.source.disabled"/>
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<node id="board.clock.canfdclk.source" option="board.clock.canfdclk.source.disabled"/>
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<node id="board.clock.lcdclk.source" option="board.clock.lcdclk.source.pll1p"/>
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<node id="board.clock.i3cclk.source" option="board.clock.i3cclk.source.disabled"/>
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<node id="board.clock.uck.source" option="board.clock.uck.source.pll1q"/>
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<node id="board.clock.u60ck.source" option="board.clock.u60ck.source.disabled"/>
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<node id="board.clock.octaspiclk.source" option="board.clock.octaspiclk.source.disabled"/>
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<node id="board.clock.cpuclk.div" option="board.clock.cpuclk.div.1"/>
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<node id="board.clock.iclk.div" option="board.clock.iclk.div.2"/>
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<node id="board.clock.pclka.div" option="board.clock.pclka.div.4"/>
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<node id="board.clock.pclkb.div" option="board.clock.pclkb.div.8"/>
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<node id="board.clock.pclkc.div" option="board.clock.pclkc.div.8"/>
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<node id="board.clock.pclkd.div" option="board.clock.pclkd.div.4"/>
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<node id="board.clock.pclke.div" option="board.clock.pclke.div.2"/>
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<node id="board.clock.sdclkout.enable" option="board.clock.sdclkout.enable.enabled"/>
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<node id="board.clock.bclk.div" option="board.clock.bclk.div.4"/>
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<node id="board.clock.bclkout.div" option="board.clock.bclkout.div.2"/>
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<node id="board.clock.fclk.div" option="board.clock.fclk.div.8"/>
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<node id="board.clock.clkout.div" option="board.clock.clkout.div.1"/>
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<node id="board.clock.sciclk.div" option="board.clock.sciclk.div.4"/>
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<node id="board.clock.spiclk.div" option="board.clock.spiclk.div.4"/>
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<node id="board.clock.canfdclk.div" option="board.clock.canfdclk.div.8"/>
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<node id="board.clock.lcdclk.div" option="board.clock.lcdclk.div.2"/>
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<node id="board.clock.i3cclk.div" option="board.clock.i3cclk.div.3"/>
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<node id="board.clock.uck.div" option="board.clock.uck.div.5"/>
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<node id="board.clock.u60ck.div" option="board.clock.u60ck.div.5"/>
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<node id="board.clock.octaspiclk.div" option="board.clock.octaspiclk.div.4"/>
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<node id="board.clock.cpuclk.display" option="board.clock.cpuclk.display.value"/>
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<node id="board.clock.iclk.display" option="board.clock.iclk.display.value"/>
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<node id="board.clock.pclka.display" option="board.clock.pclka.display.value"/>
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<node id="board.clock.pclkb.display" option="board.clock.pclkb.display.value"/>
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<node id="board.clock.pclkc.display" option="board.clock.pclkc.display.value"/>
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<node id="board.clock.pclkd.display" option="board.clock.pclkd.display.value"/>
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<node id="board.clock.pclke.display" option="board.clock.pclke.display.value"/>
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<node id="board.clock.sdclkout.display" option="board.clock.sdclkout.display.value"/>
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<node id="board.clock.bclk.display" option="board.clock.bclk.display.value"/>
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<node id="board.clock.bclkout.display" option="board.clock.bclkout.display.value"/>
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<node id="board.clock.fclk.display" option="board.clock.fclk.display.value"/>
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<node id="board.clock.clkout.display" option="board.clock.clkout.display.value"/>
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<node id="board.clock.sciclk.display" option="board.clock.sciclk.display.value"/>
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<node id="board.clock.spiclk.display" option="board.clock.spiclk.display.value"/>
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<node id="board.clock.canfdclk.display" option="board.clock.canfdclk.display.value"/>
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<node id="board.clock.lcdclk.display" option="board.clock.lcdclk.display.value"/>
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<node id="board.clock.i3cclk.display" option="board.clock.i3cclk.display.value"/>
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<node id="board.clock.uck.display" option="board.clock.uck.display.value"/>
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<node id="board.clock.u60ck.display" option="board.clock.u60ck.display.value"/>
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<node id="board.clock.octaspiclk.display" option="board.clock.octaspiclk.display.value"/>
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</raClockConfiguration>
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<raPinConfiguration>
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<pincfg active="true" name="" symbol="">
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<configSetting altId="adc0.an000.p004" configurationId="adc0.an000"/>
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<configSetting altId="adc0.an001.p005" configurationId="adc0.an001"/>
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<configSetting altId="adc0.an004.p007" configurationId="adc0.an004"/>
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<configSetting altId="adc0.an007.p014" configurationId="adc0.an007"/>
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<configSetting altId="adc1.an102.p002" configurationId="adc1.an102"/>
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<configSetting altId="adc1.an104.p003" configurationId="adc1.an104"/>
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<configSetting altId="adc1.an105.p015" configurationId="adc1.an105"/>
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<configSetting altId="adc1.an106.p011" configurationId="adc1.an106"/>
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<configSetting altId="ceu.vio_clk.p708" configurationId="ceu.vio_clk"/>
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<configSetting altId="ceu.vio_d0.p400" configurationId="ceu.vio_d0"/>
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<configSetting altId="ceu.vio_d1.p401" configurationId="ceu.vio_d1"/>
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<configSetting altId="ceu.vio_d2.p405" configurationId="ceu.vio_d2"/>
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<configSetting altId="ceu.vio_d3.p406" configurationId="ceu.vio_d3"/>
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<configSetting altId="ceu.vio_d4.p700" configurationId="ceu.vio_d4"/>
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<configSetting altId="ceu.vio_d5.p701" configurationId="ceu.vio_d5"/>
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<configSetting altId="ceu.vio_d6.p702" configurationId="ceu.vio_d6"/>
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<configSetting altId="ceu.vio_d7.p703" configurationId="ceu.vio_d7"/>
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<configSetting altId="ceu.vio_hd.p709" configurationId="ceu.vio_hd"/>
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<configSetting altId="ceu.vio_vd.p710" configurationId="ceu.vio_vd"/>
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<configSetting altId="glcd.lcd_clk.p806" configurationId="glcd.lcd_clk"/>
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<configSetting altId="glcd.lcd_data0.p914" configurationId="glcd.lcd_data0"/>
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<configSetting altId="glcd.lcd_data1.p915" configurationId="glcd.lcd_data1"/>
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<configSetting altId="glcd.lcd_data10.p711" configurationId="glcd.lcd_data10"/>
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<configSetting altId="glcd.lcd_data11.p712" configurationId="glcd.lcd_data11"/>
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<configSetting altId="glcd.lcd_data12.p713" configurationId="glcd.lcd_data12"/>
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<configSetting altId="glcd.lcd_data13.p714" configurationId="glcd.lcd_data13"/>
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<configSetting altId="glcd.lcd_data14.p715" configurationId="glcd.lcd_data14"/>
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<configSetting altId="glcd.lcd_data15.pb07" configurationId="glcd.lcd_data15"/>
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<configSetting altId="glcd.lcd_data16.pb06" configurationId="glcd.lcd_data16"/>
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<configSetting altId="glcd.lcd_data17.pb05" configurationId="glcd.lcd_data17"/>
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<configSetting altId="glcd.lcd_data2.p910" configurationId="glcd.lcd_data2"/>
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<configSetting altId="glcd.lcd_data3.p911" configurationId="glcd.lcd_data3"/>
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<configSetting altId="glcd.lcd_data4.p912" configurationId="glcd.lcd_data4"/>
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<configSetting altId="glcd.lcd_data5.p913" configurationId="glcd.lcd_data5"/>
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<configSetting altId="glcd.lcd_data6.p904" configurationId="glcd.lcd_data6"/>
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<configSetting altId="glcd.lcd_data7.p903" configurationId="glcd.lcd_data7"/>
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<configSetting altId="glcd.lcd_data8.p902" configurationId="glcd.lcd_data8"/>
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<configSetting altId="glcd.lcd_data9.p207" configurationId="glcd.lcd_data9"/>
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<configSetting altId="glcd.lcd_tcon0.p805" configurationId="glcd.lcd_tcon0"/>
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<configSetting altId="glcd.lcd_tcon1.p807" configurationId="glcd.lcd_tcon1"/>
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<configSetting altId="glcd.lcd_tcon3.p515" configurationId="glcd.lcd_tcon3"/>
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<configSetting altId="gpt6.gtioc6a.pa11" configurationId="gpt6.gtioc6a"/>
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<configSetting altId="irq12.irq12_dash_ds.p008" configurationId="irq12.irq12_dash_ds"/>
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<configSetting altId="irq13.irq13_dash_ds.p009" configurationId="irq13.irq13_dash_ds"/>
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<configSetting altId="jtag_fslash_swd.swclk.p211" configurationId="jtag_fslash_swd.swclk"/>
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<configSetting altId="jtag_fslash_swd.swdio.p210" configurationId="jtag_fslash_swd.swdio"/>
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<configSetting altId="mipi.dsi_te.p206" configurationId="mipi.dsi_te"/>
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<configSetting altId="ospi.om_cs0.p107" configurationId="ospi.om_cs0"/>
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<configSetting altId="ospi.om_sclk.p808" configurationId="ospi.om_sclk"/>
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<configSetting altId="ospi.om_sio0.p100" configurationId="ospi.om_sio0"/>
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<configSetting altId="ospi.om_sio1.p803" configurationId="ospi.om_sio1"/>
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<configSetting altId="ospi.om_sio2.p103" configurationId="ospi.om_sio2"/>
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<configSetting altId="ospi.om_sio3.p101" configurationId="ospi.om_sio3"/>
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<configSetting altId="p504.input" configurationId="p504"/>
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<configSetting altId="p505.input" configurationId="p505"/>
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<configSetting altId="p506.input" configurationId="p506"/>
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<configSetting altId="p600.output.low" configurationId="p600"/>
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<configSetting altId="p809.output.low" configurationId="p809"/>
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<configSetting altId="pa13.output.high" configurationId="pa13"/>
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<configSetting altId="sci2.rxd2.pa02" configurationId="sci2.rxd2"/>
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<configSetting altId="sci2.txd2.pa03" configurationId="sci2.txd2"/>
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<configSetting altId="sci3.rxd3.p408" configurationId="sci3.rxd3"/>
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<configSetting altId="sci3.txd3.p409" configurationId="sci3.txd3"/>
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<configSetting altId="sci9.rxd9.p208" configurationId="sci9.rxd9" isUsedByDriver="true"/>
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<configSetting altId="sci9.txd9.p209" configurationId="sci9.txd9" isUsedByDriver="true"/>
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<configSetting altId="sdhi1.sd1cd.p503" configurationId="sdhi1.sd1cd"/>
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<configSetting altId="sdhi1.sd1clk.p810" configurationId="sdhi1.sd1clk"/>
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<configSetting altId="sdhi1.sd1cmd.p811" configurationId="sdhi1.sd1cmd"/>
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<configSetting altId="sdhi1.sd1dat0.p812" configurationId="sdhi1.sd1dat0"/>
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<configSetting altId="sdhi1.sd1dat1.p500" configurationId="sdhi1.sd1dat1"/>
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<configSetting altId="sdhi1.sd1dat2.p501" configurationId="sdhi1.sd1dat2"/>
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<configSetting altId="sdhi1.sd1dat3.p502" configurationId="sdhi1.sd1dat3"/>
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<configSetting altId="sdram.a1.p300" configurationId="sdram.a1"/>
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<configSetting altId="sdram.a10.p309" configurationId="sdram.a10"/>
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<configSetting altId="sdram.a11.p310" configurationId="sdram.a11"/>
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<configSetting altId="sdram.a12.p311" configurationId="sdram.a12"/>
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<configSetting altId="sdram.a13.p312" configurationId="sdram.a13"/>
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<configSetting altId="sdram.a14.p905" configurationId="sdram.a14"/>
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<configSetting altId="sdram.a15.p906" configurationId="sdram.a15"/>
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<configSetting altId="sdram.a2.p301" configurationId="sdram.a2"/>
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<configSetting altId="sdram.a3.p302" configurationId="sdram.a3"/>
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<configSetting altId="sdram.a4.p303" configurationId="sdram.a4"/>
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<configSetting altId="sdram.a5.p304" configurationId="sdram.a5"/>
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<configSetting altId="sdram.a6.p305" configurationId="sdram.a6"/>
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<configSetting altId="sdram.a7.p306" configurationId="sdram.a7"/>
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<configSetting altId="sdram.a8.p307" configurationId="sdram.a8"/>
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<configSetting altId="sdram.a9.p308" configurationId="sdram.a9"/>
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<configSetting altId="sdram.cas.p909" configurationId="sdram.cas"/>
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<configSetting altId="sdram.cke.p113" configurationId="sdram.cke"/>
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<configSetting altId="sdram.dq0.p601" configurationId="sdram.dq0"/>
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<configSetting altId="sdram.dq1.p602" configurationId="sdram.dq1"/>
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<configSetting altId="sdram.dq10.p611" configurationId="sdram.dq10"/>
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<configSetting altId="sdram.dq11.p612" configurationId="sdram.dq11"/>
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<configSetting altId="sdram.dq12.p613" configurationId="sdram.dq12"/>
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<configSetting altId="sdram.dq13.p614" configurationId="sdram.dq13"/>
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<configSetting altId="sdram.dq14.p615" configurationId="sdram.dq14"/>
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<configSetting altId="sdram.dq15.pa08" configurationId="sdram.dq15"/>
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<configSetting altId="sdram.dq2.p603" configurationId="sdram.dq2"/>
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<configSetting altId="sdram.dq3.p604" configurationId="sdram.dq3"/>
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<configSetting altId="sdram.dq4.p605" configurationId="sdram.dq4"/>
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<configSetting altId="sdram.dq5.p606" configurationId="sdram.dq5"/>
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<configSetting altId="sdram.dq6.p607" configurationId="sdram.dq6"/>
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<configSetting altId="sdram.dq7.pa00" configurationId="sdram.dq7"/>
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<configSetting altId="sdram.dq8.p609" configurationId="sdram.dq8"/>
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<configSetting altId="sdram.dq9.p610" configurationId="sdram.dq9"/>
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<configSetting altId="sdram.dqm0.pa10" configurationId="sdram.dqm0"/>
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<configSetting altId="sdram.dqm1.p112" configurationId="sdram.dqm1"/>
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<configSetting altId="sdram.ras.p908" configurationId="sdram.ras"/>
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<configSetting altId="sdram.sdclk.pa09" configurationId="sdram.sdclk"/>
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<configSetting altId="sdram.sdcs.p115" configurationId="sdram.sdcs"/>
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<configSetting altId="sdram.we.p114" configurationId="sdram.we"/>
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<configSetting altId="usbfs.usb_dm.p815" configurationId="usbfs.usb_dm"/>
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<configSetting altId="usbfs.usb_dp.p814" configurationId="usbfs.usb_dp"/>
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<configSetting altId="usbfs.usb_vbus.p407" configurationId="usbfs.usb_vbus"/>
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<configSetting altId="usbhs.usbhs_vbus.pb01" configurationId="usbhs.usbhs_vbus"/>
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</pincfg>
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</raPinConfiguration>
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</raConfiguration>
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