140 lines
4.3 KiB
C
140 lines
4.3 KiB
C
/**
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*****************************************************************************
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* @file cmem7_misc.c
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*
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* @brief CMEM7 miscellaneous file
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*
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*
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* @version V1.0
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* @date 3. September 2013
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*
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* @note
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*
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*****************************************************************************
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* @attention
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
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*****************************************************************************
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*/
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#include "cmem7_misc.h"
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#define AIRCR_VECTKEY_MASK ((uint32_t)0x05FA0000)
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void NVIC_PriorityGroupConfig(uint32_t NVIC_PriorityGroup)
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{
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/* Check the parameters */
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assert_param(IS_NVIC_PRIORITY_GROUP(NVIC_PriorityGroup));
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/* Set the PRIGROUP[10:8] bits according to NVIC_PriorityGroup value */
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SCB->AIRCR = AIRCR_VECTKEY_MASK | NVIC_PriorityGroup;
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}
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void NVIC_Init(NVIC_InitTypeDef* NVIC_InitStruct)
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{
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uint32_t tmppriority = 0x00, tmppre = 0x00, tmpsub = 0x0F;
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/* Check the parameters */
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assert_param(IS_NVIC_PREEMPTION_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority));
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assert_param(IS_NVIC_SUB_PRIORITY(NVIC_InitStruct->NVIC_IRQChannelSubPriority));
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if (NVIC_InitStruct->NVIC_IRQChannelCmd != FALSE)
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{
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/* Compute the Corresponding IRQ Priority --------------------------------*/
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tmppriority = (0x700 - ((SCB->AIRCR) & (uint32_t)0x700))>> 0x08;
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tmppre = (0x4 - tmppriority);
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tmpsub = tmpsub >> tmppriority;
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tmppriority = (uint32_t)NVIC_InitStruct->NVIC_IRQChannelPreemptionPriority << tmppre;
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tmppriority |= NVIC_InitStruct->NVIC_IRQChannelSubPriority & tmpsub;
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tmppriority = tmppriority << 0x04;
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NVIC->IP[NVIC_InitStruct->NVIC_IRQChannel] = tmppriority;
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/* Enable the Selected IRQ Channels --------------------------------------*/
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NVIC->ISER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
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(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
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}
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else
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{
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/* Disable the Selected IRQ Channels -------------------------------------*/
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NVIC->ICER[NVIC_InitStruct->NVIC_IRQChannel >> 0x05] =
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(uint32_t)0x01 << (NVIC_InitStruct->NVIC_IRQChannel & (uint8_t)0x1F);
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}
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}
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void NVIC_SetVectorTable(uint32_t NVIC_VectTab, uint32_t Offset)
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{
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/* Check the parameters */
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assert_param(IS_NVIC_VECTTAB(NVIC_VectTab));
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assert_param(IS_NVIC_OFFSET(Offset));
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SCB->VTOR = NVIC_VectTab | (Offset & (uint32_t)0x1FFFFF80);
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}
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void NVIC_SystemLPConfig(uint8_t LowPowerMode, BOOL NewState)
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{
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/* Check the parameters */
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assert_param(IS_NVIC_LP(LowPowerMode));
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if (!NewState)
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{
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SCB->SCR &= (uint32_t)(~(uint32_t)LowPowerMode);
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} else {
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SCB->SCR |= LowPowerMode;
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}
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}
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void GLB_MMAP(uint32_t from, uint32_t to, BOOL isIcacheOn) {
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int n;
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GLOBAL_CTRL->IBUSOFF = GLOBAL_CTRL->DBUSOFF = (from - to);
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GLOBAL_CTRL->EXTADDR = to;
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// Delay several cycles
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for (n = 0; n < 100; n++);
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GLOBAL_CTRL->ICACHE_b.EN = isIcacheOn;
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for (n = 0; n < 100; n++);
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}
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void GLB_SetNmiIrqNum(uint32_t irq) {
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GLOBAL_CTRL->NMI_SEL_b.NMI = irq;
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}
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void GLB_SelectSysClkSource(uint8_t source) {
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switch (source) {
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case SYS_CLK_SEL_DLL :
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// M7's DLL clock should be fixed at PLL loation 2
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// In constrast, it's C2R1.
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// Wait DLL clock stable
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while (PDLOCK->GCLK_b.C2R1D == 0) ;
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GLOBAL_CTRL->CLK_SEL_1_b.SYS_CLK = SYS_CLK_SEL_DLL;
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break;
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case SYS_CLK_SEL_CRYSTAL :
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GLOBAL_CTRL->CLK_SEL_1_b.SYS_CLK = SYS_CLK_SEL_CRYSTAL;
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break;
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case SYS_CLK_SEL_EXTERNAL :
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// TODO, Add the condition that makes sure input
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// external clock is stable
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// For example :
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// PLL location 0
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// while (PDLOCK->GCLK_b.C1R1P == 0) ;
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// DLL location 0
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// while (PDLOCK->GCLK_b.C1R1D == 0) ;
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GLOBAL_CTRL->CLK_SEL_1_b.SYS_CLK = SYS_CLK_SEL_EXTERNAL;
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break;
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case SYS_CLK_SEL_OSC :
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// Fall through
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default :
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GLOBAL_CTRL->CLK_SEL_1_b.SYS_CLK = SYS_CLK_SEL_OSC;
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break;
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}
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}
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