247 lines
7.3 KiB
C
247 lines
7.3 KiB
C
/*
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* Copyright (c) 2006-2024, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-15 yandld The first version for MCXN
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*/
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#include "rtdevice.h"
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#include "fsl_common.h"
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#include "fsl_lpspi.h"
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#include "fsl_lpspi_edma.h"
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#define DMA_MAX_TRANSFER_COUNT (32767)
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enum
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{
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#ifdef BSP_USING_SPI1
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SPI1_INDEX,
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#endif
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#ifdef BSP_USING_SPI3
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SPI3_INDEX,
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#endif
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#ifdef BSP_USING_SPI6
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SPI6_INDEX,
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#endif
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#ifdef BSP_USING_SPI7
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SPI7_INDEX,
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#endif
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};
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struct lpc_spi
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{
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struct rt_spi_bus parent;
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LPSPI_Type *LPSPIx;
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clock_attach_id_t clock_attach_id;
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clock_div_name_t clock_div_name;
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clock_name_t clock_name;
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DMA_Type *DMAx;
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uint8_t tx_dma_chl;
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uint8_t rx_dma_chl;
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edma_handle_t dma_tx_handle;
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edma_handle_t dma_rx_handle;
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dma_request_source_t tx_dma_request;
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dma_request_source_t rx_dma_request;
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lpspi_master_edma_handle_t spi_dma_handle;
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rt_sem_t sem;
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char *name;
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};
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static struct lpc_spi lpc_obj[] =
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{
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#ifdef BSP_USING_SPI1
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{
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.LPSPIx = LPSPI1,
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.clock_attach_id = kFRO_HF_DIV_to_FLEXCOMM1,
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.clock_div_name = kCLOCK_DivFlexcom1Clk,
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.clock_name = kCLOCK_FroHf,
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.tx_dma_request = kDma0RequestMuxLpFlexcomm1Tx,
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.rx_dma_request = kDma0RequestMuxLpFlexcomm1Rx,
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.DMAx = DMA0,
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.tx_dma_chl = 0,
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.rx_dma_chl = 1,
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.name = "spi1",
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},
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#endif
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#ifdef BSP_USING_SPI3
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{
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.LPSPIx = LPSPI3,
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.clock_attach_id = kFRO_HF_DIV_to_FLEXCOMM3,
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.clock_div_name = kCLOCK_DivFlexcom3Clk,
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.clock_name = kCLOCK_FroHf,
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.tx_dma_request = kDma0RequestMuxLpFlexcomm3Tx,
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.rx_dma_request = kDma0RequestMuxLpFlexcomm3Rx,
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.DMAx = DMA0,
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.tx_dma_chl = 2,
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.rx_dma_chl = 3,
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.name = "spi3",
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},
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#endif /* BSP_USING_SPI3 */
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#ifdef BSP_USING_SPI6
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{
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.LPSPIx = LPSPI6,
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.clock_attach_id = kFRO_HF_DIV_to_FLEXCOMM6,
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.clock_div_name = kCLOCK_DivFlexcom6Clk,
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.clock_name = kCLOCK_FroHf,
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.tx_dma_request = kDma0RequestMuxLpFlexcomm6Tx,
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.rx_dma_request = kDma0RequestMuxLpFlexcomm6Rx,
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.DMAx = DMA0,
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.tx_dma_chl = 4,
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.rx_dma_chl = 5,
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.name = "spi6",
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},
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#endif /* BSP_USING_SPI6 */
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#ifdef BSP_USING_SPI7
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{
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.LPSPIx = LPSPI7,
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.clock_attach_id = kFRO_HF_DIV_to_FLEXCOMM7,
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.clock_div_name = kCLOCK_DivFlexcom7Clk,
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.clock_name = kCLOCK_FroHf,
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.tx_dma_request = kDma0RequestMuxLpFlexcomm7Tx,
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.rx_dma_request = kDma0RequestMuxLpFlexcomm7Rx,
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.DMAx = DMA0,
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.tx_dma_chl = 2,
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.rx_dma_chl = 3,
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.name = "spi7",
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},
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#endif /* BSP_USING_SPI7 */
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};
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rt_err_t rt_hw_spi_device_attach(const char *bus_name, const char *device_name, rt_uint32_t pin)
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{
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struct rt_spi_device *spi_device = rt_malloc(sizeof(struct rt_spi_device));
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if (!spi_device)
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{
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return -RT_ENOMEM;
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}
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return rt_spi_bus_attach_device_cspin(spi_device, device_name, bus_name, pin, RT_NULL);
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}
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static rt_err_t spi_configure(struct rt_spi_device *device, struct rt_spi_configuration *cfg)
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{
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rt_err_t ret = RT_EOK;
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// struct lpc_spi *spi = RT_NULL;
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// spi = (struct lpc_spi *)(device->bus->parent.user_data);
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// ret = lpc_spi_init(spi->SPIx, cfg);
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return ret;
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}
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static void LPSPI_MasterUserCallback(LPSPI_Type *base, lpspi_master_edma_handle_t *handle, status_t status, void *userData)
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{
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struct lpc_spi *spi = (struct lpc_spi *)userData;
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rt_sem_release(spi->sem);
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}
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static rt_ssize_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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int i;
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lpspi_transfer_t transfer = {0};
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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struct lpc_spi *spi = device->bus->parent.user_data;
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if (message->cs_take)
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{
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rt_pin_write(device->cs_pin, PIN_LOW);
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}
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transfer.dataSize = message->length;
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transfer.rxData = (uint8_t *)(message->recv_buf);
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transfer.txData = (uint8_t *)(message->send_buf);
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// if(message->length < MAX_DMA_TRANSFER_SIZE)
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if (0)
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{
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LPSPI_MasterTransferBlocking(spi->LPSPIx, &transfer);
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}
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else
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{
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uint32_t block, remain;
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block = message->length / DMA_MAX_TRANSFER_COUNT;
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remain = message->length % DMA_MAX_TRANSFER_COUNT;
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for (i = 0; i < block; i++)
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{
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transfer.dataSize = DMA_MAX_TRANSFER_COUNT;
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if (message->recv_buf) transfer.rxData = (uint8_t *)(message->recv_buf + i *DMA_MAX_TRANSFER_COUNT);
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if (message->send_buf) transfer.txData = (uint8_t *)(message->send_buf + i *DMA_MAX_TRANSFER_COUNT);
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LPSPI_MasterTransferEDMA(spi->LPSPIx, &spi->spi_dma_handle, &transfer);
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rt_sem_take(spi->sem, RT_WAITING_FOREVER);
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}
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if (remain)
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{
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transfer.dataSize = remain;
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if (message->recv_buf) transfer.rxData = (uint8_t *)(message->recv_buf + i *DMA_MAX_TRANSFER_COUNT);
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if (message->send_buf) transfer.txData = (uint8_t *)(message->send_buf + i *DMA_MAX_TRANSFER_COUNT);
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LPSPI_MasterTransferEDMA(spi->LPSPIx, &spi->spi_dma_handle, &transfer);
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rt_sem_take(spi->sem, RT_WAITING_FOREVER);
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}
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}
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if (message->cs_release)
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{
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rt_pin_write(device->cs_pin, PIN_HIGH);
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}
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return message->length;
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}
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static struct rt_spi_ops lpc_spi_ops =
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{
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.configure = spi_configure,
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.xfer = spixfer
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};
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int rt_hw_spi_init(void)
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(lpc_obj); i++)
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{
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CLOCK_SetClkDiv(lpc_obj[i].clock_div_name, 1u);
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CLOCK_AttachClk(lpc_obj[i].clock_attach_id);
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lpc_obj[i].parent.parent.user_data = &lpc_obj[i];
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lpc_obj[i].sem = rt_sem_create("sem_spi", 0, RT_IPC_FLAG_FIFO);
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lpspi_master_config_t masterConfig;
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LPSPI_MasterGetDefaultConfig(&masterConfig);
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masterConfig.baudRate = 24 * 1000 * 1000;
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masterConfig.pcsToSckDelayInNanoSec = 1000000000U / masterConfig.baudRate * 1U;
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masterConfig.lastSckToPcsDelayInNanoSec = 1000000000U / masterConfig.baudRate * 1U;
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masterConfig.betweenTransferDelayInNanoSec = 1000000000U / masterConfig.baudRate * 1U;
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LPSPI_MasterInit(lpc_obj[i].LPSPIx, &masterConfig, CLOCK_GetFreq(lpc_obj[i].clock_name));
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EDMA_CreateHandle(&lpc_obj[i].dma_tx_handle, lpc_obj[i].DMAx, lpc_obj[i].tx_dma_chl);
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EDMA_CreateHandle(&lpc_obj[i].dma_rx_handle, lpc_obj[i].DMAx, lpc_obj[i].rx_dma_chl);
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EDMA_SetChannelMux(lpc_obj[i].DMAx, lpc_obj[i].tx_dma_chl, lpc_obj[i].tx_dma_request);
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EDMA_SetChannelMux(lpc_obj[i].DMAx, lpc_obj[i].rx_dma_chl, lpc_obj[i].rx_dma_request);
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LPSPI_MasterTransferCreateHandleEDMA(lpc_obj[i].LPSPIx, &lpc_obj[i].spi_dma_handle, LPSPI_MasterUserCallback, &lpc_obj[i], &lpc_obj[i].dma_rx_handle, &lpc_obj[i].dma_tx_handle);
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rt_spi_bus_register(&lpc_obj[i].parent, lpc_obj[i].name, &lpc_spi_ops);
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}
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return RT_EOK;
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}
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INIT_DEVICE_EXPORT(rt_hw_spi_init);
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