75 lines
2.7 KiB
C
75 lines
2.7 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-01-30 lizhirui first version
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*/
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#ifndef __MMU_H__
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#define __MMU_H__
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#include "riscv.h"
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#include "riscv_mmu.h"
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/* RAM, Flash, or ROM */
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#define NORMAL_MEM 0
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/* normal nocache memory mapping type */
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#define NORMAL_NOCACHE_MEM 1
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/* MMIO region */
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#define DEVICE_MEM 2
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struct mem_desc
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{
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rt_size_t vaddr_start;
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rt_size_t vaddr_end;
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rt_size_t paddr_start;
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rt_size_t attr;
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};
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#define GET_PF_ID(addr) ((addr) >> PAGE_OFFSET_BIT)
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#define GET_PF_OFFSET(addr) __MASKVALUE(addr, PAGE_OFFSET_MASK)
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#define GET_L1(addr) __PARTBIT(addr, VPN2_SHIFT, VPN2_BIT)
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#define GET_L2(addr) __PARTBIT(addr, VPN1_SHIFT, VPN1_BIT)
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#define GET_L3(addr) __PARTBIT(addr, VPN0_SHIFT, VPN0_BIT)
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#define GET_PPN(pte) (__PARTBIT(pte, PTE_PPN_SHIFT, PHYSICAL_ADDRESS_WIDTH_BITS - PTE_PPN_SHIFT))
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#define GET_PADDR(pte) (GET_PPN(pte) << PAGE_OFFSET_BIT)
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#define VPN_TO_PPN(vaddr, pv_off) (((rt_size_t)(vaddr)) + (pv_off))
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#define PPN_TO_VPN(paddr, pv_off) (((rt_size_t)(paddr)) - (pv_off))
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#define COMBINEVADDR(l1_off, l2_off, l3_off) (((l1_off) << VPN2_SHIFT) | ((l2_off) << VPN1_SHIFT) | ((l3_off) << VPN0_SHIFT))
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#define COMBINEPTE(paddr, attr) ((((paddr) >> PAGE_OFFSET_BIT) << PTE_PPN_SHIFT) | (attr))
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typedef struct
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{
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size_t *vtable;
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size_t vstart;
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size_t vend;
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size_t pv_off;
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} rt_mmu_info;
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void *rt_hw_mmu_tbl_get();
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void rt_hw_mmu_switch(void *mmu_table);
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int rt_hw_mmu_map_init(rt_mmu_info *mmu_info, void *v_address, rt_size_t size, rt_size_t *vtable, rt_size_t pv_off);
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void rt_hw_mmu_kernel_map_init(rt_mmu_info *mmu_info, rt_size_t vaddr_start, rt_size_t size);
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void *_rt_hw_mmu_map(rt_mmu_info *mmu_info, void *v_addr, void *p_addr, rt_size_t size, rt_size_t attr);
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void *_rt_hw_mmu_map_auto(rt_mmu_info *mmu_info, void *v_addr, rt_size_t size, rt_size_t attr);
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void _rt_hw_mmu_unmap(rt_mmu_info *mmu_info, void *v_addr, rt_size_t size);
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void *rt_hw_mmu_map(rt_mmu_info *mmu_info, void *v_addr, void *p_addr, rt_size_t size, rt_size_t attr);
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void *rt_hw_mmu_map_auto(rt_mmu_info *mmu_info, void *v_addr, rt_size_t size, rt_size_t attr);
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void rt_hw_mmu_unmap(rt_mmu_info *mmu_info, void *v_addr, rt_size_t size);
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void *_rt_hw_mmu_v2p(rt_mmu_info *mmu_info, void *v_addr);
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void *rt_hw_mmu_v2p(rt_mmu_info *mmu_info, void *v_addr);
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void rt_hw_mmu_setup(rt_mmu_info *mmu_info, struct mem_desc *mdesc, int desc_nr);
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#define ARCH_ADDRESS_WIDTH_BITS 64
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#define MMU_MAP_ERROR_VANOTALIGN -1
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#define MMU_MAP_ERROR_PANOTALIGN -2
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#define MMU_MAP_ERROR_NOPAGE -3
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#define MMU_MAP_ERROR_CONFLICT -4
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#endif
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