158 lines
4.3 KiB
C
158 lines
4.3 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2023-03-17 letian first version
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*/
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#include <HAL_device.h>
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#include <rtdevice.h>
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#include "drv_adc.h"
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#include <hal_gpio.h>
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#include <hal_adc.h>
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#include <hal_rcc.h>
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#include <hal_misc.h>
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#if defined(BSP_USING_ADC)
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#define ADC_CONFIG_GPIORCC RCC_AHBENR_GPIOA
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#define ADC_CONFIG_GPIOX GPIOA
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#define ADC_CONFIG_IOX GPIO_Pin_5 | GPIO_Pin_4
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struct mm32_adc
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{
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struct rt_adc_device mm32_adc_device;
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ADC_TypeDef *adc_x;
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char *name;
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};
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#if defined(BSP_USING_ADC1)
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struct mm32_adc mm32_adc1_config = {
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.adc_x = ADC1,
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.name = "adc1",
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};
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#endif /* BSP_USING_ADC1 */
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#if defined(BSP_USING_ADC2)
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struct mm32_adc mm32_adc2_config = {
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.adc_x = ADC2,
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.name = "adc2",
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};
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#endif /* BSP_USING_ADC2 */
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static void ADCxChannelEnable(ADC_TypeDef* ADCn, ADCCHANNEL_TypeDef channel)
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{
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ADCn->CHSR &= ~(1 << channel);
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ADCn->CHSR |= (1 << channel);
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}
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static rt_err_t mm32_adc_init(struct rt_adc_device *device, rt_uint32_t channel, rt_bool_t enabled)
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{
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ADC_InitTypeDef ADC_InitStruct;
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ADC_TypeDef *adc_x;
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RT_ASSERT(device != RT_NULL);
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adc_x = device->parent.user_data;
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#if defined(BSP_USING_ADC1)
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RCC_APB2PeriphClockCmd(RCC_APB2ENR_ADC1, ENABLE); //Enable ADC1 clock
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#endif /* BSP_USING_ADC1 */
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#if defined(BSP_USING_ADC2)
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RCC_APB2PeriphClockCmd(RCC_APB2ENR_ADC2, ENABLE); //Enable ADC2 clock
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#endif /* BSP_USING_ADC2 */
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ADC_StructInit(&ADC_InitStruct);
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ADC_InitStruct.ADC_Resolution = ADC_Resolution_12b;
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ADC_InitStruct.ADC_PRESCARE = ADC_PCLK2_PRESCARE_16; //ADC prescale factor
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ADC_InitStruct.ADC_Mode = ADC_Mode_Continue; //Set ADC mode to continuous conversion mode
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ADC_InitStruct.ADC_DataAlign = ADC_DataAlign_Right; //AD data right-justified
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ADC_InitStruct.ADC_ExternalTrigConv = ADC_ExternalTrigConv_T1_CC1;
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ADC_Init(adc_x, &ADC_InitStruct);
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ADC_RegularChannelConfig(adc_x, channel, 0, ADC_Samctl_239_5);
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ADC_Cmd(adc_x, ENABLE);
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ADCxChannelEnable(adc_x, channel);
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//config gpio
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GPIO_InitTypeDef GPIO_InitStruct;
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GPIO_StructInit(&GPIO_InitStruct);
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RCC_AHBPeriphClockCmd(ADC_CONFIG_GPIORCC, ENABLE);
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GPIO_InitStruct.GPIO_Pin = ADC_CONFIG_IOX;
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GPIO_InitStruct.GPIO_Speed = GPIO_Speed_50MHz;
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GPIO_InitStruct.GPIO_Mode = GPIO_Mode_AIN;
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GPIO_Init(ADC_CONFIG_GPIOX, &GPIO_InitStruct);
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return RT_EOK;
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}
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static rt_err_t mm32_get_adc_value(struct rt_adc_device *device, rt_uint32_t channel, rt_uint32_t *value)
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{
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ADC_TypeDef *adc_x;
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RT_ASSERT(device != RT_NULL);
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adc_x = device->parent.user_data;
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ADC_SoftwareStartConvCmd(adc_x, ENABLE);
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while(ADC_GetFlagStatus(adc_x, ADC_IT_EOC) == 0);
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ADC_ClearFlag(adc_x, ADC_IT_EOC);
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*value = ADC_GetConversionValue(adc_x);
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return RT_EOK;
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}
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static rt_uint8_t mm32_adc_get_resolution(struct rt_adc_device *device)
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{
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ADC_TypeDef *adc_x = device->parent.user_data;
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RT_ASSERT(device != RT_NULL);
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switch( ((adc_x->CFGR)&(0x00000380)) )
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{
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case ADC_Resolution_12b:
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return 12;
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case ADC_Resolution_11b:
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return 11;
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case ADC_Resolution_10b:
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return 10;
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case ADC_Resolution_9b:
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return 9;
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case ADC_Resolution_8b:
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return 8;
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default:
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return 0;
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}
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}
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static rt_int16_t mm32_adc_get_vref(struct rt_adc_device *device)
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{
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if(device == RT_NULL)
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return RT_ERROR;
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return 3300;
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}
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static const struct rt_adc_ops mm32_adc_ops =
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{
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.enabled = mm32_adc_init,
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.convert = mm32_get_adc_value,
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.get_resolution = mm32_adc_get_resolution,
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.get_vref = mm32_adc_get_vref,
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};
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int rt_hw_adc_init(void)
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{
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#if defined(BSP_USING_ADC1)
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rt_hw_adc_register(&mm32_adc1_config.mm32_adc_device, mm32_adc1_config.name, &mm32_adc_ops, mm32_adc1_config.adc_x);
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#endif /* BSP_USING_ADC1 */
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#if defined(BSP_USING_ADC2)
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rt_hw_adc_register(&mm32_adc2_config.mm32_adc_device, mm32_adc2_config.name, &mm32_adc_ops, mm32_adc2_config.adc_x);
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#endif /* BSP_USING_ADC2 */
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return RT_EOK;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif /* BSP_USING_ADC */
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