159 lines
3.8 KiB
C
159 lines
3.8 KiB
C
/**
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**************************************************************************
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* @file at32f415_wwdt.h
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* @version v2.0.4
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* @date 2022-04-02
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* @brief at32f415 wwdt header file
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**************************************************************************
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* Copyright notice & Disclaimer
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*
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* The software Board Support Package (BSP) that is made available to
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* download from Artery official website is the copyrighted work of Artery.
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* Artery authorizes customers to use, copy, and distribute the BSP
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* software and its related documentation for the purpose of design and
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* development in conjunction with Artery microcontrollers. Use of the
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* software is governed by this copyright notice and the following disclaimer.
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*
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* THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
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* GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
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* TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
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* STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
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* INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
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*
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**************************************************************************
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*/
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/* Define to prevent recursive inclusion -------------------------------------*/
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#ifndef __AT32F415_WWDT_H
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#define __AT32F415_WWDT_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* Includes ------------------------------------------------------------------*/
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#include "at32f415.h"
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/** @addtogroup AT32F415_periph_driver
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* @{
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*/
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/** @addtogroup WWDT
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* @{
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*/
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/** @defgroup WWDT_enable_bit_definition
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* @brief wwdt enable bit
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* @{
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*/
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#define WWDT_EN_BIT ((uint32_t)0x00000080) /*!< wwdt enable bit */
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/**
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* @}
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*/
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/** @defgroup WWDT_exported_types
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* @{
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*/
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/**
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* @brief wwdt division type
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*/
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typedef enum
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{
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WWDT_PCLK1_DIV_4096 = 0x00, /*!< wwdt counter clock = (pclk1/4096)/1) */
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WWDT_PCLK1_DIV_8192 = 0x01, /*!< wwdt counter clock = (pclk1/4096)/2) */
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WWDT_PCLK1_DIV_16384 = 0x02, /*!< wwdt counter clock = (pclk1/4096)/4) */
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WWDT_PCLK1_DIV_32768 = 0x03 /*!< wwdt counter clock = (pclk1/4096)/8) */
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} wwdt_division_type;
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/**
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* @brief type define wwdt register all
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*/
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typedef struct
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{
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/**
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* @brief wwdt ctrl register, offset:0x00
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*/
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union
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{
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__IO uint32_t ctrl;
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struct
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{
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__IO uint32_t cnt : 7; /* [6:0] */
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__IO uint32_t wwdten : 1; /* [7] */
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__IO uint32_t reserved1 : 24;/* [31:8] */
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} ctrl_bit;
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};
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/**
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* @brief wwdt cfg register, offset:0x04
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*/
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union
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{
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__IO uint32_t cfg;
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struct
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{
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__IO uint32_t win : 7; /* [6:0] */
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__IO uint32_t div : 2; /* [8:7] */
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__IO uint32_t rldien : 1; /* [9] */
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__IO uint32_t reserved1 : 22;/* [31:10] */
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} cfg_bit;
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};
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/**
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* @brief wwdt cfg register, offset:0x08
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*/
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union
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{
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__IO uint32_t sts;
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struct
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{
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__IO uint32_t rldf : 1; /* [0] */
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__IO uint32_t reserved1 : 31;/* [31:1] */
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} sts_bit;
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};
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} wwdt_type;
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/**
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* @}
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*/
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#define WWDT ((wwdt_type *) WWDT_BASE)
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/** @defgroup WWDT_exported_functions
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* @{
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*/
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void wwdt_reset(void);
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void wwdt_divider_set(wwdt_division_type division);
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void wwdt_flag_clear(void);
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void wwdt_enable(uint8_t wwdt_cnt);
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void wwdt_interrupt_enable(void);
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flag_status wwdt_flag_get(void);
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void wwdt_counter_set(uint8_t wwdt_cnt);
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void wwdt_window_counter_set(uint8_t window_cnt);
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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