569 lines
16 KiB
C
569 lines
16 KiB
C
/*
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* @brief ADC ROM API declarations and functions
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*
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* @note
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* Copyright(C) NXP Semiconductors, 2014
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* All rights reserved.
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*
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* @par
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* Software that is described herein is for illustrative purposes only
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* which provides customers with programming information regarding the
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* LPC products. This software is supplied "AS IS" without any warranties of
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* any kind, and NXP Semiconductors and its licensor disclaim any and
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* all warranties, express or implied, including all implied warranties of
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* merchantability, fitness for a particular purpose and non-infringement of
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* intellectual property rights. NXP Semiconductors assumes no responsibility
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* or liability for the use of the software, conveys no license or rights under any
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* patent, copyright, mask work right, or any other intellectual property rights in
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* or to any products. NXP Semiconductors reserves the right to make changes
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* in the software without notification. NXP Semiconductors also makes no
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* representation or warranty that such application will be suitable for the
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* specified use without further testing or modification.
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*
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* @par
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* Permission to use, copy, modify, and distribute this software and its
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* documentation is hereby granted, under NXP Semiconductors' and its
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* licensor's relevant copyrights in the software, without fee, provided that it
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* is used in conjunction with NXP Semiconductors microcontrollers. This
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* copyright, permission, and disclaimer notice must appear in all copies of
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* this code.
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*/
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#include <string.h>
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#include "hw_adc_rom_api.h"
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/** @brief ADC ROM Driver Version */
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#define ADC_DRIVER_VERSION 0x0100
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/* Internal defines */
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#define SEQ_A_MASK 0x7C0C5FFF
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#define SEQ_B_MASK 0x5C0C5FFF
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#define CTRL_MASK 0x00007F00
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#define ADC_STATE_INACTIVE 0
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#define ADC_STATE_IDLE 1
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#define ADC_STATE_ACTIVE 2
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/** @brief Channel flags offset */
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#define CB_THRES(ch) (1UL << (ch))
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#define CB_DATA(ch) (0x10000UL << (ch))
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/* ADC Buffer management */
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typedef struct {
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uint16_t *pCurr; /* ReceiveBuffer Pointer */
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size_t szCurr; /* Receive Count */
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uint16_t *pNext; /* Ring Buffer Pointer */
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size_t szNext; /* Receive Count */
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uint32_t idx; /* Current index */
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int32_t state; /* State of ADC */
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} ADC_BUFFER_T;
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/* ADC Driver internal data structure */
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typedef struct {
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void *pUserData; /* Pointer to user data */
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ADC_REGS_T *pREGS; /* Pointer to Registers */
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uint32_t valSeq[2]; /* Stored SEQ A/B Values */
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ADC_BUFFER_T buffer[2]; /* Buffers to store converted data */
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uint32_t flags; /* flags */
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uint32_t regThrSel; /* Threshold flags */
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uint32_t regInt; /* Interrupt register */
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uint32_t flag1; /* Flags Extra */
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void(*cbTable[ADC_CBIDX_RESERVED]) (ADC_HANDLE_T, ADC_CBINDEX_T, void *);
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} ADC_DRIVER_T;
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/* Prototype defines */
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static ErrorCode_t ADC_StopConversion(ADC_HANDLE_T hADC, ADC_SEQ_INDEX_T seqIndex);
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/* PRIVATE: Invoke a call back function */
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static void _ADC_InvokeCallback(ADC_DRIVER_T *pADC, ADC_CBINDEX_T idx, void *param)
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{
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if (pADC->cbTable[idx]) {
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pADC->cbTable[idx]((ADC_HANDLE_T) pADC, idx, param);
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}
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}
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/* PRIVATE: Extract, format data and store into user buffer */
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static ErrorCode_t _ADC_GetData(ADC_DRIVER_T *pADC, ADC_SEQ_INDEX_T seqIndex, uint32_t data)
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{
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uint8_t ch = ADC_DR_CHANNEL(data);
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ADC_BUFFER_T *buf = &pADC->buffer[seqIndex];
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uint16_t *pDat = &buf->pCurr[buf->idx++];
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/* Ignore extra data */
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if (!buf->szCurr) {
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return LPC_OK;
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}
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/* If data is not vaild something is wrong! */
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if (!(data & ADC_SEQ_GDAT_DATAVALID)) {
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return ERR_FAILED;
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}
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data >>= 4;
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if (!(pADC->flag1 & (1UL << ch))) {
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data &= 0xFFF;
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}
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*pDat = data;
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/* Invoke the call back for single data read if enabled */
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if (pADC->flags & CB_DATA(ch)) {
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_ADC_InvokeCallback(pADC, ADC_CHDATA, (void *) ((ch << 16) | data));
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}
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return LPC_OK;
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}
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/* PRIVATE: Reads data from the GDAT or DAT register based on mode of operation */
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static ErrorCode_t _ADC_ReadData(ADC_DRIVER_T *pADC, ADC_SEQ_INDEX_T seqIndex)
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{
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ADC_REGS_T *pREGS = pADC->pREGS;
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int i;
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/* Check if this is End-of-Seq or End-of-SingleConversion */
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if (!(pADC->valSeq[seqIndex] & ADC_SEQ_CTRL_MODE_EOS)) {
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return _ADC_GetData(pADC, seqIndex, pREGS->SEQ_GDAT[seqIndex]);
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}
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/* Read channels having conversion data */
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for (i = 0; i < sizeof(pREGS->DAT) / sizeof(pREGS->DAT[0]); i++) {
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if (pADC->valSeq[seqIndex] & ADC_SEQ_CTRL_CHANSEL(i)) {
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if (_ADC_GetData(pADC, seqIndex, pREGS->DAT[i]) != LPC_OK) {
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return ERR_FAILED;
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}
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}
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}
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return LPC_OK;
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}
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/* PRIVATE: Overflow handler */
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static ErrorCode_t _ADC_Handle_Overflow(ADC_DRIVER_T *pADC, uint32_t flag)
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{
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_ADC_InvokeCallback(pADC, ADC_OVERFLOW, (void *) ((flag >> 12) & 0x3FFF));
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return LPC_OK;
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}
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/* PRIVATE: ADC Sequence event handler function */
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static ErrorCode_t _ADC_Handler_Seq(ADC_DRIVER_T *pADC, ADC_SEQ_INDEX_T seqIndex)
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{
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ADC_REGS_T *pREGS = pADC->pREGS;
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ADC_BUFFER_T *buf = &pADC->buffer[seqIndex];
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uint32_t flag = pREGS->FLAGS;
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uint32_t tmp;
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/* Check if overrun is enabled and got an overrun */
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tmp = flag & ADC_FLAGS_SEQN_OVRRUN_MASK(seqIndex);
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if (!(flag & ADC_FLAGS_SEQN_INT_MASK(seqIndex))) {
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return ERR_ADC_INVALID_SEQUENCE;
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}
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if (_ADC_ReadData(pADC, seqIndex) != LPC_OK) {
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return ERR_FAILED;
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}
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/* Handle the overflow */
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if (tmp) {
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_ADC_Handle_Overflow(pADC, flag);
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}
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/* Clear the interrupt if it is for EOS and not EOC */
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if (pADC->valSeq[seqIndex] & ADC_SEQ_CTRL_MODE_EOS) {
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pREGS->FLAGS = ADC_FLAGS_SEQN_INT_MASK(seqIndex);
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}
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/* See if we are done with our buffer */
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if (buf->idx >= buf->szCurr) {
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_ADC_InvokeCallback(pADC, (ADC_CBINDEX_T) (ADC_BUFFER_DONE + (ADC_CBINDEX_T)seqIndex), buf->pCurr);
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if (!buf->pNext || !buf->szNext) {
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buf->pCurr = 0;
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buf->szCurr = 0;
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/* Nothing more to do stop the ADC */
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ADC_StopConversion(pADC, seqIndex);
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return LPC_OK;
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}
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buf->pCurr = buf->pNext;
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buf->szCurr = buf->szNext;
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buf->pNext = 0;
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buf->idx = buf->szNext = 0;
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}
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/* If we are not in burst mode we must trigger next sample */
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if (!((pADC->valSeq[seqIndex] >> 12) & 0x1F) && !(pADC->valSeq[seqIndex] & ADC_SEQ_CTRL_BURST)) {
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pREGS->SEQ_CTRL[seqIndex] = pADC->valSeq[seqIndex];
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}
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return LPC_OK;
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}
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/* PRIVATE: ADC sequence handler polling mode */
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static ErrorCode_t _ADC_Handler_SeqPoll(ADC_DRIVER_T *pADC, ADC_SEQ_INDEX_T seqIndex)
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{
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ADC_REGS_T *pREGS = pADC->pREGS;
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ErrorCode_t ret = LPC_OK;
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/* Poll as long as the sequence is enabled */
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while (pREGS->SEQ_CTRL[seqIndex] & ADC_SEQ_CTRL_SEQ_ENA) {
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if (!(pREGS->FLAGS & ADC_FLAGS_SEQN_INT_MASK(seqIndex))) {
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continue;
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}
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ret = _ADC_Handler_Seq(pADC, seqIndex);
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if (ret != LPC_OK) {
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break;
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}
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}
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return ret;
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}
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/* PRIVATE: Handler for Overflow event */
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static ErrorCode_t _ADC_Handler_Ovr(ADC_DRIVER_T *pADC)
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{
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uint32_t flags = pADC->pREGS->FLAGS;
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/* Invoke Sequence handler to clear-out the data */
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if (flags & ADC_FLAGS_SEQA_OVRRUN_MASK) {
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return _ADC_Handler_Seq(pADC, ADC_SEQ_A);
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}
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else if (flags & ADC_FLAGS_SEQB_OVRRUN_MASK) {
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return _ADC_Handler_Seq(pADC, ADC_SEQ_B);
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}
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else {
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return ERR_FAILED;
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}
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}
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/* PRIVATE: Threshold event handler */
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static ErrorCode_t _ADC_Handler_Thres(ADC_DRIVER_T *pADC)
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{
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uint32_t flags = pADC->pREGS->FLAGS;
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if (!(flags & ADC_FLAGS_THCMP_INT_MASK)) {
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return ERR_FAILED;
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}
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flags &= 0xFFF;
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/* Clear out the interrupts */
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pADC->pREGS->FLAGS = flags;
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_ADC_InvokeCallback(pADC, ADC_THRESHOLD, (void *) flags);
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return LPC_OK;
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}
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/* EXPORTED API: Register a call-back function */
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ErrorCode_t ADC_RegisterCallback(ADC_HANDLE_T hADC, ADC_CBINDEX_T idx, void (*cb_func)(ADC_HANDLE_T,
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ADC_CBINDEX_T,
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void *))
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{
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if (idx < ADC_CBIDX_RESERVED) {
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((ADC_DRIVER_T *) hADC)->cbTable[idx] = cb_func;
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}
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else {
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return ERR_ADC_PARAM;
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}
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return LPC_OK;
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}
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/* EXPORTED API: ADC Initialization function */
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ADC_HANDLE_T ADC_Init(void *mem, uint32_t base_addr, void *args)
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{
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ADC_DRIVER_T *pADC;
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/* Check if the memory is word aligned */
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if ((uint32_t) mem & 0x3) {
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return NULL;
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}
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/* Assign memory provided by application */
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pADC = (ADC_DRIVER_T *) mem;
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memset(pADC, 0, sizeof(ADC_DRIVER_T));
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/* Assign the base address */
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pADC->pREGS = (ADC_REGS_T *) base_addr;
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pADC->pUserData = args;
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/* To be safe stop the ADC in case it is not stopped */
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pADC->pREGS->SEQ_CTRL[0] = 0x00;
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pADC->pREGS->SEQ_CTRL[1] = 0x00;
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return (ADC_HANDLE_T) pADC;
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}
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/* EXPORTED API: Setup the ADC threshold registers */
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void ADC_SetThreshold(ADC_HANDLE_T hADC, uint32_t valThres0, uint32_t valThres1)
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{
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ADC_REGS_T *pREGS = ((ADC_DRIVER_T *) hADC)->pREGS;
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pREGS->THR0_LOW = (valThres0 << ADC_THR_VAL_POS) & ADC_THR_VAL_MASK;
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pREGS->THR1_LOW = (valThres1 << ADC_THR_VAL_POS) & ADC_THR_VAL_MASK;
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valThres0 >>= 16;
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valThres1 >>= 16;
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pREGS->THR0_HIGH = (valThres0 << ADC_THR_VAL_POS) & ADC_THR_VAL_MASK;
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pREGS->THR1_HIGH = (valThres1 << ADC_THR_VAL_POS) & ADC_THR_VAL_MASK;
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}
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/* EXPORTED API: Calibrate the ADC */
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ErrorCode_t ADC_Calibrate(ADC_HANDLE_T handle, uint32_t sysclk_freq)
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{
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ADC_REGS_T *pREGS = ((ADC_DRIVER_T *) handle)->pREGS;
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volatile uint32_t i;
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pREGS->STARTUP = ADC_STARTUP_ENABLE;
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for ( i = 0; i < 0x10; i++ ) {}
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if ( !(pREGS->STARTUP & ADC_STARTUP_ENABLE) ) {
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return ERR_ADC_NO_POWER;
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}
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/* If not in by-pass mode do the calibration */
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if ( (pREGS->CALIBR & ADC_CALREQD) && !(pREGS->CTRL & ADC_CR_BYPASS) ) {
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uint32_t ctrl = pREGS->CTRL & (CTRL_MASK | 0xFF);
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uint32_t tmp = ctrl;
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/* Set ADC to SYNC mode */
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tmp &= ~ADC_CR_ASYNC_MODE;
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/* To be safe run calibration at 1MHz UM permits upto 30MHz */
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if (sysclk_freq > 1000000UL) {
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pREGS->CTRL = tmp | (((sysclk_freq / 1000000UL) - 1) & 0xFF);
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}
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/* Calibration is needed, do it now. */
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pREGS->CALIBR = ADC_CALIB;
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i = 0xF0000;
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while ( (pREGS->CALIBR & ADC_CALIB) && --i ) {}
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pREGS->CTRL = ctrl;
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return i ? LPC_OK : ERR_TIME_OUT;
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}
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/* A dummy conversion cycle will be performed. */
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pREGS->STARTUP = (pREGS->STARTUP | ADC_STARTUP_INIT) & 0x03;
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i = 0x7FFFF;
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while ( (pREGS->STARTUP & ADC_STARTUP_INIT) && --i ) {}
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return i ? LPC_OK : ERR_TIME_OUT;
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}
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/* EXPORTED API: Configure the ADC */
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ErrorCode_t ADC_Configure(ADC_HANDLE_T hADC, const ADC_CFG_T *pCfg)
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{
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ADC_DRIVER_T *pADC = hADC;
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ADC_REGS_T *pREGS = pADC->pREGS;
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pADC->valSeq[ADC_SEQ_A] = ADC_SEQ_CTRL_SEQ_ENA | ADC_SEQ_CTRL_START | (pCfg->flagSeqA & SEQ_A_MASK);
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pADC->valSeq[ADC_SEQ_B] = ADC_SEQ_CTRL_SEQ_ENA | ADC_SEQ_CTRL_START | (pCfg->flagSeqB & SEQ_B_MASK);
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/* START is not required for BURST or H/W Trigger */
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if ((pCfg->flagSeqA & ADC_SEQ_CTRL_TRIGGER_MASK)) {
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pADC->valSeq[ADC_SEQ_A] &= ~ADC_SEQ_CTRL_START;
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}
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/* START is not required for BURST or H/W Trigger */
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if ((pCfg->flagSeqB & ADC_SEQ_CTRL_TRIGGER_MASK)) {
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pADC->valSeq[ADC_SEQ_B] &= ~ADC_SEQ_CTRL_START;
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}
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pREGS->CTRL = (pCfg->flagCfg & CTRL_MASK) | (pCfg->clkDiv & ADC_CR_CLKDIV_MASK);
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/* Enable/Disable overflow interrupt */
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if (pCfg->flagCfg & ENABLE_OVR) {
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pADC->regInt |= ADC_INTEN_OVRRUN_ENABLE;
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}
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else {
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pADC->regInt &= ~ADC_INTEN_OVRRUN_ENABLE;
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}
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return LPC_OK;
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}
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/* EXPORTED API: Configure channel specific options */
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ErrorCode_t ADC_ConfigureChannel(ADC_HANDLE_T hADC, uint32_t chanNum, uint32_t chanOpts)
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{
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ADC_DRIVER_T *pADC = hADC;
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/* Sanity check */
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if (chanNum > ADC_MAX_CHANNEL_NUM) {
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return ERR_ADC_PARAM;
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}
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pADC->regInt &= ~(0x18 << (chanNum * 2));
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if (chanOpts & ADC_CH_THRES_SEL1) {
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pADC->regThrSel |= 1 << chanNum;
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}
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else {
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pADC->regThrSel &= ~(1 << chanNum);
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}
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if (chanOpts & ADC_CH_THRES_CROSSING) {
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pADC->regInt |= 0x10 << (chanNum * 2);
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}
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else if (chanOpts & ADC_CH_THRES_OUTSIDE) {
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pADC->regInt |= 0x08 << (chanNum * 2);
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}
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if (chanOpts & ADC_CH_DATA_CALLBACK) {
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pADC->flags |= CB_DATA(chanNum);
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}
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else {
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pADC->flags &= ~CB_DATA(chanNum);
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}
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if (chanOpts & ADC_CH_THRES_CALLBACK) {
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pADC->flags |= CB_THRES(chanNum);
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}
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else {
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pADC->flags &= ~CB_THRES(chanNum);
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}
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if (chanOpts & ADC_CH_THRES_DATA) {
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pADC->flag1 |= 1 << chanNum;
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}
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else {
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pADC->flag1 &= ~(1 << chanNum);
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}
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return LPC_OK;
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}
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/* EXPORTED API: Start analog to digital conversion on selected sequence */
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ErrorCode_t ADC_StartConversion(ADC_HANDLE_T hADC, ADC_SEQ_INDEX_T seqIndex, void *buff, size_t bufCount)
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{
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ADC_DRIVER_T *pADC = hADC;
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ADC_BUFFER_T *buf = &pADC->buffer[seqIndex];
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/* Sanity check on parameters */
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if ((uint32_t) seqIndex > ADC_SEQ_B) {
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return ERR_ADC_INVALID_SEQUENCE;
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}
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/* If an active conversion is going on set the buffer ptr */
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if (buf->state == ADC_STATE_ACTIVE) {
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if (buf->szNext) {
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return ERR_BUSY;
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}
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buf->pNext = buff;
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buf->szNext = bufCount;
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return LPC_OK;
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}
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/* Assign the buffers */
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buf->pCurr = buff;
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buf->szCurr = bufCount;
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buf->idx = 0;
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/* Invoke the call back before start */
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_ADC_InvokeCallback(pADC, (ADC_CBINDEX_T) (ADC_START_SEQ + (ADC_CBINDEX_T)seqIndex), (void *) &pADC->pREGS);
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buf->state = ADC_STATE_ACTIVE;
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pADC->pREGS->SEQ_CTRL[seqIndex] = pADC->valSeq[seqIndex] & ~(ADC_SEQ_CTRL_SEQ_ENA | ADC_SEQ_CTRL_START);
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pADC->regInt |= (1 << seqIndex);
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pADC->pREGS->INTEN = pADC->regInt;
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pADC->pREGS->CHAN_THRSEL = pADC->regThrSel;
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pADC->pREGS->SEQ_CTRL[seqIndex] = pADC->valSeq[seqIndex];
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return LPC_OK;
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}
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ErrorCode_t ADC_SwTrigger(ADC_HANDLE_T hADC, ADC_SEQ_INDEX_T seqIndex)
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{
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ADC_DRIVER_T *pADC = hADC;
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/* Sanity check on parameters */
|
|
if ((uint32_t) seqIndex > ADC_SEQ_B) {
|
|
return ERR_ADC_INVALID_SEQUENCE;
|
|
}
|
|
|
|
pADC->pREGS->SEQ_CTRL[seqIndex] = pADC->valSeq[seqIndex] | ADC_SEQ_CTRL_SEQ_ENA | ADC_SEQ_CTRL_START;
|
|
return LPC_OK;
|
|
}
|
|
|
|
/* EXPORTED API: Stop conversion on a given sequence */
|
|
ErrorCode_t ADC_StopConversion(ADC_HANDLE_T hADC, ADC_SEQ_INDEX_T seqIndex)
|
|
{
|
|
ADC_DRIVER_T *pADC = hADC;
|
|
|
|
/* Sanity check on parameters */
|
|
if ((uint32_t) seqIndex > ADC_SEQ_B) {
|
|
return ERR_ADC_INVALID_SEQUENCE;
|
|
}
|
|
|
|
pADC->regInt &= ~(1 << seqIndex);
|
|
pADC->pREGS->INTEN = pADC->regInt; /* Disable interrupts */
|
|
pADC->buffer[seqIndex].state = ADC_STATE_IDLE; /* Set state to IDLE */
|
|
|
|
/* Stop and disable the sequence */
|
|
pADC->pREGS->SEQ_CTRL[seqIndex] = pADC->valSeq[seqIndex] &
|
|
~(ADC_SEQ_CTRL_SEQ_ENA | ADC_SEQ_CTRL_BURST | ADC_SEQ_CTRL_START);
|
|
_ADC_InvokeCallback(hADC, (ADC_CBINDEX_T)(ADC_STOP_SEQ + (ADC_CBINDEX_T)seqIndex), 0);
|
|
return LPC_OK;
|
|
}
|
|
|
|
/* EXPORTED API: ADC Event handler */
|
|
ErrorCode_t ADC_Handler(ADC_HANDLE_T hADC, ADC_HEVENT_T hEvent)
|
|
{
|
|
ADC_DRIVER_T *pADC = hADC;
|
|
|
|
switch (hEvent) {
|
|
case ADC_EV_SEQ_A_POLL:
|
|
return _ADC_Handler_SeqPoll(pADC, ADC_SEQ_A);
|
|
|
|
case ADC_EV_SEQ_B_POLL:
|
|
return _ADC_Handler_SeqPoll(pADC, ADC_SEQ_B);
|
|
|
|
case ADC_EV_SEQ_A_INT:
|
|
return _ADC_Handler_Seq(pADC, ADC_SEQ_A);
|
|
|
|
case ADC_EV_SEQ_B_INT:
|
|
return _ADC_Handler_Seq(pADC, ADC_SEQ_B);
|
|
|
|
case ADC_EV_SEQ_A_DMA:
|
|
if (!(pADC->valSeq[ADC_SEQ_A] & 0x3F000)) {
|
|
ADC_SwTrigger(hADC, ADC_SEQ_A);
|
|
}
|
|
return LPC_OK;
|
|
|
|
case ADC_EV_SEQ_B_DMA:
|
|
if (!(pADC->valSeq[ADC_SEQ_B] & 0x3F000)) {
|
|
ADC_SwTrigger(hADC, ADC_SEQ_B);
|
|
}
|
|
return LPC_OK;
|
|
|
|
case ADC_EV_OVR_INT:
|
|
return _ADC_Handler_Ovr(pADC);
|
|
|
|
case ADC_EV_THRES_INT:
|
|
return _ADC_Handler_Thres(pADC);
|
|
|
|
default:
|
|
return ERR_ADC_PARAM;
|
|
}
|
|
}
|
|
|
|
/* EXPROTED API: Returns memory required for ADC driver */
|
|
uint32_t ADC_GetMemSize(void)
|
|
{
|
|
return sizeof(ADC_DRIVER_T);
|
|
}
|
|
|
|
/* EXPORTED API: Function to Get the firmware Version */
|
|
uint32_t ADC_GetDriverVersion(void)
|
|
{
|
|
return ADC_DRIVER_VERSION;
|
|
}
|
|
|
|
/**
|
|
* @brief Table of the addresses of all the 12-Bit ADC functions
|
|
* @note This table of function pointers is the API interface.
|
|
*/
|
|
const ROM_ADC_API_T adcrom_api = {
|
|
ADC_GetMemSize,
|
|
ADC_Init,
|
|
ADC_Configure,
|
|
ADC_ConfigureChannel,
|
|
ADC_SetThreshold,
|
|
ADC_RegisterCallback,
|
|
ADC_Calibrate,
|
|
ADC_Handler,
|
|
ADC_StartConversion,
|
|
ADC_StopConversion,
|
|
ADC_SwTrigger,
|
|
ADC_GetDriverVersion,
|
|
};
|