158 lines
5.7 KiB
C
158 lines
5.7 KiB
C
/*
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* Copyright (c) 2008-2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without modification,
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* are permitted provided that the following conditions are met:
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*
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* o Redistributions of source code must retain the above copyright notice, this list
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* of conditions and the following disclaimer.
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*
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* o Redistributions in binary form must reproduce the above copyright notice, this
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* list of conditions and the following disclaimer in the documentation and/or
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* other materials provided with the distribution.
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*
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* o Neither the name of Freescale Semiconductor, Inc. nor the names of its
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* contributors may be used to endorse or promote products derived from this
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* software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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//! @addtogroup diag_mmu
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//! @{
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/*!
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* @file mmu.h
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* @brief System memory arrangement.
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*/
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#ifndef _MMU_H_
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#define _MMU_H_
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#include "sdk.h"
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////////////////////////////////////////////////////////////////////////////////
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// Definitions
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////////////////////////////////////////////////////////////////////////////////
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//! @brief Memory region attributes.
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typedef enum _mmu_memory_type
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{
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kStronglyOrdered,
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kDevice,
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kOuterInner_WB_WA,
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kOuterInner_WT,
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kNoncacheable,
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} mmu_memory_type_t;
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//! @brief Memory region shareability options.
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typedef enum _mmu_shareability
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{
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kShareable = 1,
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kNonshareable = 0
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} mmu_shareability_t;
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//! @brief Access permissions for a memory region.
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typedef enum _mmu_access
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{
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kNoAccess,
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kROAccess,
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kRWAccess
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} mmu_access_t;
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////////////////////////////////////////////////////////////////////////////////
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// Prototypes
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////////////////////////////////////////////////////////////////////////////////
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*!
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* @brief Enable the MMU.
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*
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* The L1 page tables and MMU settings must have already been configured by
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* calling mmu_init() before the MMU is enabled.
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*/
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void mmu_enable();
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/*!
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* @brief Disable the MMU.
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*/
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void mmu_disable();
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/*!
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* @brief Set up the default first-level page table.
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*
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* Initializes the L1 page table with the following regions:
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* - 0x00000000...0x00900000 : ROM and peripherals, strongly-ordered
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* - 0x00900000...0x00a00000 : OCRAM, strongly-ordered
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* - For MX6DQ or MX6SDL: 0x10000000...0x90000000 : DDR, normal, outer inner, write-back, write-allocate
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* - For MX6SL: 0x80000000...0xc0000000 : DDR, normal, outer inner, write-back, write-allocate
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*
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* If the CPU is participating in SMP, then the DDR regions are made shareable. Otherwise they
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* are marked as non-shareable.
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*
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* The TTBR0 register is set to the base of the L1 table.
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*
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* All memory domains are configured to allow client access. However, note that only domain 0 is
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* used by mmu_map_l1_range().
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*/
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void mmu_init();
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/*!
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* @brief Maps a range of memory in the first-level page table.
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*
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* Entries in the first-level page table are filled in for the range of virtual addresses
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* starting at @a va and continuing for @a length bytes. These virtual addreses are mapped
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* to the physical addresses starting at @a pa and continuing for @a length bytes. All table
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* entries for the range of mapped memory have the same attributes, which are selected with
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* the @a memoryType, @a isShareable, and @a access parameters.
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*
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* @param pa The base physical address of the range to which the virtual address will be mapped.
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* @param va The base virtual address of the range.
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* @param length The size of the range to be mapped, in bytes. This value must be divisible by 1MB.
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* @param memoryType The type of the memory region. This controls caching, buffering, ordering of
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* memory accesses, and other attributes of the region.
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* @param isShareable The shareability of the physical memory. Ignored for strongly-ordered memory.
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* @param access Access permissions.
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*/
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void mmu_map_l1_range(uint32_t pa, uint32_t va, uint32_t length, mmu_memory_type_t memoryType, mmu_shareability_t isShareable, mmu_access_t access);
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/*!
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* @brief Convert virtual address to physical.
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*
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* First attempts a priviledged read translation for the current security mode. If that fails,
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* a priviledged write translation, also for the current security mode, is attempted. If this
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* second attempt at translation fails, then false will be returned.
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*
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* @param virtualAddress Virtual address to convert to a physical address.
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* @param[out] physicalAddress This parameter is filled in with the physical address corresponding
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* to the virtual address passed in @a virtualAddress.
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* @retval true The address returned through @a physicalAddress is valid.
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* @retval false The conversion failed for some reason.
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*/
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bool mmu_virtual_to_physical(uint32_t virtualAddress, uint32_t * physicalAddress);
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#if defined(__cplusplus)
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}
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#endif
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//! @}
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#endif // _MMU_H_
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////////////////////////////////////////////////////////////////////////////////
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// EOF
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////////////////////////////////////////////////////////////////////////////////
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