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rt-thread/bsp/ls1bdev
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Jiaxun Yang c236e8c5d5 [bsp] Adapt ls{1b,1c}dev to new mips common code 
LS1C selfboot feature have been rewiritten, and we changed
bare boot base to 0x80000000 to better utilize memory.

Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
 		2019-12-17 11:09:59 +08:00
..
applications [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00
drivers [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00
Kconfig [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00
SConscript Re-normalizing the repo 2013-01-08 22:40:58 +08:00
SConstruct [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00
ls1b_ram.lds [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00
readme.md [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00
rtconfig.h [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00
rtconfig.py [bsp] Adapt ls{1b,1c}dev to new mips common code 2019-12-17 11:09:59 +08:00

readme.md

This bsp is based on LS1B DEMO BOARD V1.1

download script for RT-Thread

ifaddr syn0 192.168.1.100;load tftp://192.168.1.5/rtthread.elf;g