661 lines
16 KiB
C
661 lines
16 KiB
C
/*
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* Copyright (c) 2020-2021, Bluetrum Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-11-30 greedyhao first version
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*/
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#include "drv_sdio.h"
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#include "interrupt.h"
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#include <rthw.h>
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#ifdef BSP_USING_SDIO
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// #define DRV_DEBUG
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#define LOG_TAG "drv.sdio"
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#include <drv_log.h>
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#define SDIO_USING_1_BIT
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static struct ab32_sdio_config sdio_config[] =
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{
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{.instance = SDMMC0_BASE,
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},
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};
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static struct rt_mmcsd_host *host = RT_NULL;
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#define RTHW_SDIO_LOCK(_sdio) rt_mutex_take(&(_sdio)->mutex, RT_WAITING_FOREVER)
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#define RTHW_SDIO_UNLOCK(_sdio) rt_mutex_release(&(_sdio)->mutex);
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struct sdio_pkg
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{
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struct rt_mmcsd_cmd *cmd;
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void *buff;
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rt_uint32_t flag;
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rt_uint32_t xfer_blks;
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};
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struct rthw_sdio
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{
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struct rt_mmcsd_host *host;
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struct ab32_sdio_des sdio_des;
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struct rt_event event;
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struct rt_mutex mutex;
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struct sdio_pkg *pkg;
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};
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ALIGN(SDIO_ALIGN_LEN)
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static rt_uint8_t cache_buf[SDIO_BUFF_SIZE];
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static uint8_t sd_baud = 119;
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uint8_t sysclk_update_baud(uint8_t baud);
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static rt_uint32_t ab32_sdio_clk_get(hal_sfr_t hw_sdio)
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{
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return (get_sysclk_nhz() / (sd_baud+1));
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}
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/**
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* @brief This function get order from sdio.
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* @param data
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* @retval sdio order
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*/
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static int get_order(rt_uint32_t data)
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{
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int order = 0;
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switch (data)
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{
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case 1:
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order = 0;
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break;
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case 2:
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order = 1;
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break;
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case 4:
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order = 2;
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break;
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case 8:
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order = 3;
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break;
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case 16:
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order = 4;
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break;
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case 32:
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order = 5;
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break;
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case 64:
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order = 6;
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break;
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case 128:
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order = 7;
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break;
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case 256:
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order = 8;
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break;
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case 512:
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order = 9;
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break;
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case 1024:
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order = 10;
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break;
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case 2048:
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order = 11;
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break;
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case 4096:
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order = 12;
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break;
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case 8192:
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order = 13;
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break;
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case 16384:
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order = 14;
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break;
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default :
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order = 0;
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break;
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}
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return order;
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}
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/**
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* @brief This function wait sdio completed.
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* @param sdio rthw_sdio
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* @retval None
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*/
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static void rthw_sdio_wait_completed(struct rthw_sdio *sdio)
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{
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rt_uint32_t status = 0;
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struct rt_mmcsd_cmd *cmd = sdio->pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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hal_sfr_t hw_sdio = sdio->sdio_des.hw_sdio;
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rt_err_t tx_finish = -RT_ERROR;
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if (rt_event_recv(&sdio->event, 0xFFFFFFFF & ~HW_SDIO_CON_DFLAG, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
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rt_tick_from_millisecond(5000), &status) != RT_EOK)
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{
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LOG_E("wait completed timeout");
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cmd->err = -RT_ETIMEOUT;
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return;
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}
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if (sdio->pkg == RT_NULL)
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{
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return;
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}
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cmd->resp[0] = hw_sdio[SDxARG3];
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cmd->resp[1] = hw_sdio[SDxARG2];
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cmd->resp[2] = hw_sdio[SDxARG1];
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cmd->resp[3] = hw_sdio[SDxARG0];
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if (!(status & HW_SDIO_CON_NRPS)) {
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cmd->err = RT_EOK;
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LOG_D("sta:0x%08X [%08X %08X %08X %08X]", status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
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} else {
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cmd->err = -RT_ERROR;
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}
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}
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/**
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* @brief This function transfer data by dma.
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* @param sdio rthw_sdio
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* @param pkg sdio package
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* @retval None
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*/
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static void rthw_sdio_transfer_by_dma(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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{
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struct rt_mmcsd_data *data;
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int size;
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void *buff;
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hal_sfr_t hw_sdio = sdio->sdio_des.hw_sdio;
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if ((RT_NULL == pkg) || (RT_NULL == sdio))
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{
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LOG_E("rthw_sdio_transfer_by_dma invalid args");
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return;
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}
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data = pkg->cmd->data;
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if (RT_NULL == data)
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{
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LOG_E("rthw_sdio_transfer_by_dma invalid args");
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return;
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}
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buff = pkg->buff;
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if (RT_NULL == buff)
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{
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LOG_E("rthw_sdio_transfer_by_dma invalid args");
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return;
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}
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hw_sdio = sdio->sdio_des.hw_sdio;
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size = data->blks * data->blksize;
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if (data->flags & DATA_DIR_WRITE)
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{
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LOG_D("DATA_DIR_WRITE %d", pkg->xfer_blks);
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sdio->sdio_des.txconfig((rt_uint32_t *)((rt_uint8_t *)buff + (pkg->xfer_blks * data->blksize)), 512);
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}
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else if (data->flags & DATA_DIR_READ)
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{
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LOG_D("DATA_DIR_WRITE %d", pkg->xfer_blks);
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sdio->sdio_des.rxconfig((rt_uint32_t *)((rt_uint8_t *)buff + (pkg->xfer_blks * data->blksize)), data->blksize);
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}
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}
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/**
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* @brief This function send command.
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* @param sdio rthw_sdio
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* @param pkg sdio package
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* @retval None
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*/
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static void rthw_sdio_send_command(struct rthw_sdio *sdio, struct sdio_pkg *pkg)
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{
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struct rt_mmcsd_cmd *cmd = pkg->cmd;
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struct rt_mmcsd_data *data = cmd->data;
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hal_sfr_t hw_sdio = sdio->sdio_des.hw_sdio;
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rt_uint32_t reg_cmd = 0;
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rt_uint32_t data_flag = 0;
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/* save pkg */
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sdio->pkg = pkg;
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#define CK8E BIT(11) //在命令/数据包后加上8CLK
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#define CBUSY BIT(10) //Busy Check
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#define CLRSP BIT(9) //17Byte Long Rsp
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#define CRSP BIT(8) //Need Rsp
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/* config cmd reg */
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if (cmd->cmd_code != 18) {
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reg_cmd = cmd->cmd_code | 0x40 | CK8E;
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} else {
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reg_cmd = cmd->cmd_code | 0x40;
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}
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switch (resp_type(cmd))
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{
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case RESP_R1B:
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reg_cmd |= CBUSY | CRSP;
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break;
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case RESP_R2:
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reg_cmd |= CLRSP | CRSP;
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break;
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default:
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reg_cmd |= CRSP;
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break;
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}
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LOG_D("CMD:%d 0x%04X ARG:0x%08x RES:%s%s%s%s%s%s%s%s%s rw:%c len:%d blksize:%d",
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cmd->cmd_code,
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reg_cmd,
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cmd->arg,
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resp_type(cmd) == RESP_NONE ? "NONE" : "",
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resp_type(cmd) == RESP_R1 ? "R1" : "",
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resp_type(cmd) == RESP_R1B ? "R1B" : "",
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resp_type(cmd) == RESP_R2 ? "R2" : "",
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resp_type(cmd) == RESP_R3 ? "R3" : "",
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resp_type(cmd) == RESP_R4 ? "R4" : "",
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resp_type(cmd) == RESP_R5 ? "R5" : "",
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resp_type(cmd) == RESP_R6 ? "R6" : "",
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resp_type(cmd) == RESP_R7 ? "R7" : "",
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data ? (data->flags & DATA_DIR_WRITE ? 'w' : 'r') : '-',
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data ? data->blks * data->blksize : 0,
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data ? data->blksize : 0
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);
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/* config data reg */
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if (data != RT_NULL)
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{
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rt_uint32_t dir = 0;
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rt_uint32_t size = data->blks * data->blksize;
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int order;
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order = get_order(data->blksize);
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dir = (data->flags & DATA_DIR_READ) ? HW_SDIO_TO_HOST : 0;
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data_flag = data->flags;
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}
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/* transfer config */
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if (data_flag & DATA_DIR_READ)
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{
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rthw_sdio_transfer_by_dma(sdio, pkg);
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}
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/* send cmd */
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hw_sdio[SDxARG3] = cmd->arg;
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hw_sdio[SDxCMD] = reg_cmd;
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/* wait cmd completed */
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rthw_sdio_wait_completed(sdio);
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/* transfer config */
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if (data != RT_NULL)
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{
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do {
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if ((data_flag & DATA_DIR_WRITE) || ((data_flag & DATA_DIR_READ) && (pkg->xfer_blks != 0))) {
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rthw_sdio_transfer_by_dma(sdio, pkg);
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}
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rt_uint32_t status = 0;
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if (rt_event_recv(&sdio->event, 0xFFFFFFFF & ~HW_SDIO_CON_DFLAG, RT_EVENT_FLAG_OR | RT_EVENT_FLAG_CLEAR,
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rt_tick_from_millisecond(5000), &status) != RT_EOK)
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{
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LOG_E("wait completed timeout");
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LOG_E("SDxCON=0x%X SDxCMD=0x%X\n", hw_sdio[SDxCON], hw_sdio[SDxCMD]);
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cmd->err = -RT_ETIMEOUT;
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}
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if (data_flag & DATA_DIR_WRITE) {
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if (((hw_sdio[SDxCON] & HW_SDIO_CON_CRCS) >> 17) != 2) {
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LOG_E("Write CRC error!");
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cmd->err = -RT_ERROR;
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hw_sdio[SDxCPND] = HW_SDIO_CON_DFLAG;
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}
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}
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} while(++pkg->xfer_blks != data->blks);
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}
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/* clear pkg */
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sdio->pkg = RT_NULL;
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}
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/**
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* @brief This function send sdio request.
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* @param host rt_mmcsd_host
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* @param req request
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* @retval None
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*/
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static void rthw_sdio_request(struct rt_mmcsd_host *host, struct rt_mmcsd_req *req)
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{
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struct sdio_pkg pkg;
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struct rthw_sdio *sdio = host->private_data;
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struct rt_mmcsd_data *data;
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RTHW_SDIO_LOCK(sdio);
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if (req->cmd != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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data = req->cmd->data;
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pkg.cmd = req->cmd;
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if (data != RT_NULL)
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{
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rt_uint32_t size = data->blks * data->blksize;
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RT_ASSERT(size <= SDIO_BUFF_SIZE);
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pkg.buff = data->buf;
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if ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1))
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{
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pkg.buff = cache_buf;
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if (data->flags & DATA_DIR_WRITE)
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{
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rt_memcpy(cache_buf, data->buf, size);
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}
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}
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}
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rthw_sdio_send_command(sdio, &pkg);
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if ((data != RT_NULL) && (data->flags & DATA_DIR_READ) && ((rt_uint32_t)data->buf & (SDIO_ALIGN_LEN - 1)))
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{
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rt_memcpy(data->buf, cache_buf, data->blksize * data->blks);
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}
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}
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if (req->stop != RT_NULL)
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{
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rt_memset(&pkg, 0, sizeof(pkg));
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pkg.cmd = req->stop;
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rthw_sdio_send_command(sdio, &pkg);
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}
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RTHW_SDIO_UNLOCK(sdio);
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mmcsd_req_complete(sdio->host);
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}
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/**
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* @brief This function config sdio.
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* @param host rt_mmcsd_host
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* @param io_cfg rt_mmcsd_io_cfg
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* @retval None
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*/
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static void rthw_sdio_iocfg(struct rt_mmcsd_host *host, struct rt_mmcsd_io_cfg *io_cfg)
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{
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rt_uint32_t clkcr, div, clk_src;
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rt_uint32_t clk = io_cfg->clock;
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struct rthw_sdio *sdio = host->private_data;
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hal_sfr_t hw_sdio = sdio->sdio_des.hw_sdio;
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clk_src = sdio->sdio_des.clk_get(sdio->sdio_des.hw_sdio);
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if (clk_src < 240 * 1000)
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{
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LOG_E("The clock rate is too low! rata:%d", clk_src);
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return;
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}
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if (clk > host->freq_max) clk = host->freq_max;
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if (clk > clk_src)
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{
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// LOG_W("Setting rate(%d) is greater than clock source rate(%d).", clk, clk_src);
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// clk = clk_src;
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}
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LOG_D("clk:%d width:%s%s%s power:%s%s%s",
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clk,
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io_cfg->bus_width == MMCSD_BUS_WIDTH_8 ? "8" : "",
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io_cfg->bus_width == MMCSD_BUS_WIDTH_4 ? "4" : "",
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io_cfg->bus_width == MMCSD_BUS_WIDTH_1 ? "1" : "",
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io_cfg->power_mode == MMCSD_POWER_OFF ? "OFF" : "",
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io_cfg->power_mode == MMCSD_POWER_UP ? "UP" : "",
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io_cfg->power_mode == MMCSD_POWER_ON ? "ON" : ""
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);
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RTHW_SDIO_LOCK(sdio);
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switch (io_cfg->power_mode)
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{
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case MMCSD_POWER_OFF:
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hw_sdio[SDxCON] &= ~BIT(0);
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break;
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case MMCSD_POWER_UP:
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sd_baud = 199;
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hw_sdio[SDxCON] = 0;
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rt_thread_mdelay(1);
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hw_sdio[SDxCON] |= BIT(0); /* SD control enable */
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hw_sdio[SDxBAUD] = sysclk_update_baud(sd_baud);
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hw_sdio[SDxCON] |= BIT(3); /* Keep clock output */
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hw_sdio[SDxCON] |= BIT(4);
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hw_sdio[SDxCON] |= BIT(5); /* Data interrupt enable */
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hal_mdelay(40);
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break;
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case MMCSD_POWER_ON:
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if (clk == SDIO_MAX_FREQ) {
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hw_sdio[SDxCON] &= ~BIT(3);
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sd_baud = 3;
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hw_sdio[SDxBAUD] = sysclk_update_baud(sd_baud);
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}
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break;
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default:
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LOG_W("unknown power_mode %d", io_cfg->power_mode);
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break;
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}
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RTHW_SDIO_UNLOCK(sdio);
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}
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/**
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* @brief This function update sdio interrupt.
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* @param host rt_mmcsd_host
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* @param enable
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* @retval None
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*/
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void rthw_sdio_irq_update(struct rt_mmcsd_host *host, rt_int32_t enable)
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{
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struct rthw_sdio *sdio = host->private_data;
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hal_sfr_t hw_sdio = sdio->sdio_des.hw_sdio;
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if (enable)
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{
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LOG_D("enable sdio irq");
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rt_hw_irq_enable(IRQ_SD_VECTOR);
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}
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else
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{
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LOG_D("disable sdio irq");
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rt_hw_irq_disable(IRQ_SD_VECTOR);
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}
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}
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/**
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* @brief This function detect sdcard.
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* @param host rt_mmcsd_host
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* @retval 0x01
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*/
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static rt_int32_t rthw_sd_detect(struct rt_mmcsd_host *host)
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{
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LOG_D("try to detect device");
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return 0x01;
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}
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/**
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* @brief This function interrupt process function.
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* @param host rt_mmcsd_host
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* @retval None
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*/
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RT_SECTION(".irq.sdio")
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void rthw_sdio_irq_process(struct rt_mmcsd_host *host)
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{
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int complete = 0;
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struct rthw_sdio *sdio = host->private_data;
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hal_sfr_t hw_sdio = sdio->sdio_des.hw_sdio;
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rt_uint32_t intstatus = hw_sdio[SDxCON];
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/* clear flag */
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if (intstatus & HW_SDIO_CON_CFLAG) {
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complete = 1;
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hw_sdio[SDxCPND] = HW_SDIO_CON_CFLAG;
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}
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if (intstatus & HW_SDIO_CON_DFLAG) {
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complete = 1;
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hw_sdio[SDxCPND] = HW_SDIO_CON_DFLAG;
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|
}
|
|
|
|
if (complete)
|
|
{
|
|
rt_event_send(&sdio->event, intstatus);
|
|
}
|
|
}
|
|
|
|
static const struct rt_mmcsd_host_ops ab32_sdio_ops =
|
|
{
|
|
rthw_sdio_request,
|
|
rthw_sdio_iocfg,
|
|
rthw_sd_detect,
|
|
rthw_sdio_irq_update,
|
|
};
|
|
|
|
/**
|
|
* @brief This function create mmcsd host.
|
|
* @param sdio_des ab32_sdio_des
|
|
* @retval rt_mmcsd_host
|
|
*/
|
|
struct rt_mmcsd_host *sdio_host_create(struct ab32_sdio_des *sdio_des)
|
|
{
|
|
struct rt_mmcsd_host *host;
|
|
struct rthw_sdio *sdio = RT_NULL;
|
|
|
|
if ((sdio_des == RT_NULL) || (sdio_des->txconfig == RT_NULL) || (sdio_des->rxconfig == RT_NULL))
|
|
{
|
|
LOG_E("L:%d F:%s %s %s %s",
|
|
(sdio_des == RT_NULL ? "sdio_des is NULL" : ""),
|
|
(sdio_des ? (sdio_des->txconfig ? "txconfig is NULL" : "") : ""),
|
|
(sdio_des ? (sdio_des->rxconfig ? "rxconfig is NULL" : "") : "")
|
|
);
|
|
return RT_NULL;
|
|
}
|
|
|
|
sdio = rt_malloc(sizeof(struct rthw_sdio));
|
|
if (sdio == RT_NULL)
|
|
{
|
|
LOG_E("L:%d F:%s malloc rthw_sdio fail");
|
|
return RT_NULL;
|
|
}
|
|
rt_memset(sdio, 0, sizeof(struct rthw_sdio));
|
|
|
|
host = mmcsd_alloc_host();
|
|
if (host == RT_NULL)
|
|
{
|
|
LOG_E("L:%d F:%s mmcsd alloc host fail");
|
|
rt_free(sdio);
|
|
return RT_NULL;
|
|
}
|
|
|
|
rt_memcpy(&sdio->sdio_des, sdio_des, sizeof(struct ab32_sdio_des));
|
|
sdio->sdio_des.hw_sdio = (sdio_des->hw_sdio == RT_NULL ? SDMMC0_BASE : sdio_des->hw_sdio);
|
|
sdio->sdio_des.clk_get = (sdio_des->clk_get == RT_NULL ? ab32_sdio_clk_get : sdio_des->clk_get);
|
|
|
|
rt_event_init(&sdio->event, "sdio", RT_IPC_FLAG_FIFO);
|
|
rt_mutex_init(&sdio->mutex, "sdio", RT_IPC_FLAG_FIFO);
|
|
|
|
/* set host defautl attributes */
|
|
host->ops = &ab32_sdio_ops;
|
|
host->freq_min = 240 * 1000;
|
|
host->freq_max = SDIO_MAX_FREQ;
|
|
host->valid_ocr = 0X00FFFF80;/* The voltage range supported is 1.65v-3.6v */
|
|
#ifndef SDIO_USING_1_BIT
|
|
host->flags = MMCSD_BUSWIDTH_4 | MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
|
|
#else
|
|
host->flags = MMCSD_MUTBLKWRITE | MMCSD_SUP_SDIO_IRQ;
|
|
#endif
|
|
host->max_seg_size = SDIO_BUFF_SIZE;
|
|
host->max_dma_segs = 1;
|
|
host->max_blk_size = 512;
|
|
host->max_blk_count = 512;
|
|
|
|
/* link up host and sdio */
|
|
sdio->host = host;
|
|
host->private_data = sdio;
|
|
|
|
rthw_sdio_irq_update(host, 1);
|
|
|
|
/* ready to change */
|
|
mmcsd_change(host);
|
|
|
|
return host;
|
|
}
|
|
|
|
static rt_err_t _dma_txconfig(rt_uint32_t *src, int Size)
|
|
{
|
|
hal_sfr_t sdiox = sdio_config->instance;
|
|
|
|
sdiox[SDxDMAADR] = DMA_ADR(src);
|
|
sdiox[SDxDMACNT] = BIT(18) | BIT(17) | BIT(16) | Size;
|
|
return RT_EOK;
|
|
}
|
|
|
|
static rt_err_t _dma_rxconfig(rt_uint32_t *dst, int Size)
|
|
{
|
|
hal_sfr_t sdiox = sdio_config->instance;
|
|
|
|
sdiox[SDxDMAADR] = DMA_ADR(dst);
|
|
sdiox[SDxDMACNT] = (Size);
|
|
return RT_EOK;
|
|
}
|
|
|
|
RT_SECTION(".irq.sdio")
|
|
void sdio_isr(int vector, void *param)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
/* Process All SDIO Interrupt Sources */
|
|
rthw_sdio_irq_process(host);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
int rt_hw_sdio_init(void)
|
|
{
|
|
struct ab32_sdio_des sdio_des = {0};
|
|
struct sd_handle hsd = {0};
|
|
uint8_t param = 0;
|
|
hsd.instance = SDMMC0_BASE;
|
|
|
|
hal_rcu_periph_clk_enable(RCU_SD0);
|
|
hal_sd_mspinit(&hsd);
|
|
|
|
rt_hw_interrupt_install(IRQ_SD_VECTOR, sdio_isr, ¶m, "sd_isr");
|
|
|
|
sdio_des.clk_get = ab32_sdio_clk_get;
|
|
sdio_des.hw_sdio = SDMMC0_BASE;
|
|
sdio_des.rxconfig = _dma_rxconfig;
|
|
sdio_des.txconfig = _dma_txconfig;
|
|
|
|
host = sdio_host_create(&sdio_des);
|
|
|
|
return 0;
|
|
}
|
|
INIT_DEVICE_EXPORT(rt_hw_sdio_init);
|
|
|
|
void ab32_mmcsd_change(void)
|
|
{
|
|
mmcsd_change(host);
|
|
}
|
|
|
|
#endif // 0
|