62 lines
1.5 KiB
C
62 lines
1.5 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-08-20 BruceOu the first version
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*/
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#ifndef __DRV_GPIO_H__
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#define __DRV_GPIO_H__
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <board.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define GPIOA_BASE (GPIO_BASE + 0x00000800UL)
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#define GPIOB_BASE (GPIO_BASE + 0x00000C00UL)
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#define GPIOC_BASE (GPIO_BASE + 0x00001000UL)
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#define GPIOD_BASE (GPIO_BASE + 0x00001400UL)
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#define GPIOE_BASE (GPIO_BASE + 0x00001800UL)
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#define GPIOF_BASE (GPIO_BASE + 0x00001C00UL)
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#define GPIOG_BASE (GPIO_BASE + 0x00002000UL)
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#define __GD32_PORT(port) GPIO##port##_BASE
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#define GD32_PIN(index, port, pin) {index, RCU_GPIO##port, \
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GPIO##port, GPIO_PIN_##pin, \
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EXTI_SOURCE_GPIO##port, \
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EXTI_SOURCE_PIN##pin}
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#define GD32_PIN_DEFAULT {-1, (rcu_periph_enum)0, 0, 0, 0, 0}
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#define GET_PIN(PORTx, PIN) (rt_base_t)((16 * ( ((rt_base_t)__GD32_PORT(PORTx) - (rt_base_t)GPIOA_BASE)/(0x0400UL) )) + PIN)
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struct pin_index
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{
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rt_int16_t index;
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rcu_periph_enum clk;
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rt_uint32_t gpio_periph;
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rt_uint32_t pin;
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rt_uint8_t port_src;
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rt_uint8_t pin_src;
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};
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struct pin_irq_map
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{
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rt_uint16_t pinbit;
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IRQn_Type irqno;
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* __DRV_GPIO_H__ */
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