560 lines
27 KiB
C
560 lines
27 KiB
C
/*******************************************************************************
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* Copyright (C) 2020, Huada Semiconductor Co., Ltd. All rights reserved.
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*
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* This software component is licensed by HDSC under BSD 3-Clause license
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* (the "License"); You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*/
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/******************************************************************************/
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/** \file hc32f460_sdioc.h
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**
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** A detailed description is available at
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** @link SdiocGroup SDIOC description @endlink
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**
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** - 2018-11-11 CDT First version for Device Driver Library of SDIOC.
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**
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******************************************************************************/
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#ifndef __HC32F460_SDIOC_H__
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#define __HC32F460_SDIOC_H__
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/*******************************************************************************
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* Include files
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******************************************************************************/
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#include "hc32_common.h"
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#include "ddl_config.h"
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#if (DDL_SDIOC_ENABLE == DDL_ON)
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/* C binding of definitions if building with C++ compiler */
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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*******************************************************************************
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** \defgroup SdiocGroup Secure Digital Input and Output Controller(SDIOC)
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**
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******************************************************************************/
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//@{
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/*******************************************************************************
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* Global type definitions ('typedef')
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******************************************************************************/
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/**
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*******************************************************************************
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** \brief SDIOC mode enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_mode
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{
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SdiocModeSD = 0u, ///< The SD mode
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SdiocModeMMC = 1u, ///< The MMC mode
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} en_sdioc_mode_t;
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/**
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*******************************************************************************
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** \brief SDIOC transfer bus width enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_bus_width
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{
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SdiocBusWidth4Bit = 0u, ///< The SDIOC bus width 4 bit
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SdiocBusWidth8Bit = 1u, ///< The SDIOC bus width 8 bit
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SdiocBusWidth1Bit = 2u, ///< The SDIOC bus width 1 bit
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} en_sdioc_bus_width_t;
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/**
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*******************************************************************************
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** \brief SDIOC clock division enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_clk_div
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{
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SdiocClkDiv_1 = 0x00u, ///< EXCLK/1
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SdiocClkDiv_2 = 0x01u, ///< EXCLK/2
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SdiocClkDiv_4 = 0x02u, ///< EXCLK/4
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SdiocClkDiv_8 = 0x04u, ///< EXCLK/8
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SdiocClkDiv_16 = 0x08u, ///< EXCLK/16
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SdiocClkDiv_32 = 0x10u, ///< EXCLK/32
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SdiocClkDiv_64 = 0x20u, ///< EXCLK/64
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SdiocClkDiv_128 = 0x40u, ///< EXCLK/128
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SdiocClkDiv_256 = 0x80u, ///< EXCLK/256
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} en_sdioc_clk_div_t;
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/**
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*******************************************************************************
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** \brief SDIOC response type enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_response_type
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{
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SdiocResponseNoneBit = 0u, ///< No Response
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SdiocResponse136Bit = 1u, ///< Response Length 136
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SdiocResponse48Bit = 2u, ///< Response Length 48
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SdiocResponse48BitCheckBusy = 3u, ///< Response Length 48 check Busy after response
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} en_sdioc_response_type_t;
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/**
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*******************************************************************************
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** \brief SDIOC response index enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_response_index
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{
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SdiocCmdNoRsp = 0u, ///< No Response
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SdiocCmdRspR1 = 1u, ///< Command Response 1
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SdiocCmdRspR1b = 2u, ///< Command Response 1 with busy
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SdiocCmdRspR2 = 3u, ///< Command Response 2
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SdiocCmdRspR3 = 4u, ///< Command Response 3
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SdiocCmdRspR4 = 5u, ///< Command Response 4
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SdiocCmdRspR5 = 6u, ///< Command Response 5
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SdiocCmdRspR5b = 7u, ///< Command Response 5 with busy
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SdiocCmdRspR6 = 8u, ///< Command Response 6
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SdiocCmdRspR7 = 9u, ///< Command Response 7
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} en_sdioc_response_index_t;
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/**
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*******************************************************************************
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** \brief SDIOC command type enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_cmd_type
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{
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SdiocCmdNormal = 0u, ///< Other commands
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SdiocCmdSuspend = 1u, ///< CMD52 for writing "Bus Suspend" in CCCR
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SdiocCmdResume = 2u, ///< CMD52 for writing "Function Select" in CCCR
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SdiocCmdAbort = 3u, ///< CMD12, CMD52 for writing "I/O Abort" in CCCR
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} en_sdioc_cmd_type_t;
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/**
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*******************************************************************************
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** \brief SDIOC data transfer direction enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_transfer_dir
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{
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SdiocTransferToCard = 0u, ///< Write (Host to Card)
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SdiocTransferToHost = 1u, ///< Read (Card to Host)
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} en_sdioc_transfer_dir_t;
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/**
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*******************************************************************************
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** \brief SDIOC data transfer mode enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_transfer_mode
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{
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SdiocTransferSingle = 0u, ///< Single Block transfer
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SdiocTransferInfinite = 1u, ///< Infinite Block transfer
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SdiocTransferMultiple = 2u, ///< Multiple Block transfer
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SdiocTransferStopMultiple = 3u, ///< Stop Multiple Block transfer
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} en_sdioc_transfer_mode_t;
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/**
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*******************************************************************************
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** \brief SD data timeout time enumeration
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**
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******************************************************************************/
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typedef enum en_sd_data_timeout
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{
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SdiocDtoSdclk_2_13 = 0u, ///< Timeout time: SDCLK*2^13
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SdiocDtoSdclk_2_14 = 1u, ///< Timeout time: SDCLK*2^14
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SdiocDtoSdclk_2_15 = 2u, ///< Timeout time: SDCLK*2^15
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SdiocDtoSdclk_2_16 = 3u, ///< Timeout time: SDCLK*2^16
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SdiocDtoSdclk_2_17 = 4u, ///< Timeout time: SDCLK*2^17
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SdiocDtoSdclk_2_18 = 5u, ///< Timeout time: SDCLK*2^18
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SdiocDtoSdclk_2_19 = 6u, ///< Timeout time: SDCLK*2^19
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SdiocDtoSdclk_2_20 = 7u, ///< Timeout time: SDCLK*2^20
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SdiocDtoSdclk_2_21 = 8u, ///< Timeout time: SDCLK*2^21
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SdiocDtoSdclk_2_22 = 9u, ///< Timeout time: SDCLK*2^22
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SdiocDtoSdclk_2_23 = 10u, ///< Timeout time: SDCLK*2^23
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SdiocDtoSdclk_2_24 = 11u, ///< Timeout time: SDCLK*2^24
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SdiocDtoSdclk_2_25 = 12u, ///< Timeout time: SDCLK*2^25
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SdiocDtoSdclk_2_26 = 13u, ///< Timeout time: SDCLK*2^26
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SdiocDtoSdclk_2_27 = 14u, ///< Timeout time: SDCLK*2^27
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} en_sdioc_data_timeout_t;
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/**
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*******************************************************************************
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** \brief SDIOC dat line type enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_dat_line_type
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{
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SdiocDat0Line = 0u, ///< DAT0 Line
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SdiocDat1Line = 1u, ///< DAT1 Line
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SdiocDat2Line = 2u, ///< DAT2 Line
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SdiocDat3Line = 3u, ///< DAT3 Line
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} en_sdioc_dat_line_type_t;
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/**
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*******************************************************************************
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** \brief SDIOC software reset type enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_sw_reset
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{
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SdiocSwResetDatLine = 0u, ///< Only part of data circuit is reset.
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SdiocSwResetCmdLine = 1u, ///< Only part of command circuit is reset.
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SdiocSwResetAll = 2u, ///< Reset the entire Host Controller except for the card detection circuit.
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} en_sdioc_sw_reset_t;
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/**
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*******************************************************************************
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** \brief SDIOC host status enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_host_status
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{
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SdiocCommandInhibitCmd = (1u << 0), ///< Command Inhibit(CMD). 1: Cannot issue command; 0:Can issue command using only CMD line
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SdiocCommandInhibitData = (1u << 1), ///< Command Inhibit(DAT). 1: Cannot issue command which uses the DAT line; 0:Can issue command which uses the DAT line
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SdiocDataLineActive = (1u << 2), ///< 1: DAT Line Active; 0: DAT Line Inactive
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SdiocWriteTransferActive = (1u << 8), ///< Write Transfer Active.1: Transferring data; 0: No valid data
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SdiocReadTransferActive = (1u << 9), ///< Read Transfer Active.1: Transferring data; 0: No valid data
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SdiocBufferWriteEnble = (1u << 10), ///< 1: Write enable; 0: Write Disable
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SdiocBufferReadEnble = (1u << 11), ///< 1: Read enable; 0: Read Disable
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SdiocCardInserted = (1u << 16), ///< 1: Card Inserted; 0: Reset or Debouncing or No Card
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SdiocCardStateStable = (1u << 17), ///< 1: No Card or Inserted; 0: Reset or Debouncing
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SdiocCardDetectPinLvl = (1u << 18), ///< 1: Card present; 0: No card present
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SdiocWriteProtectPinLvl = (1u << 19), ///< 1: Write enabled; 0: Write protected
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SdiocData0PinLvl = (1u << 20), ///< 1: DAT0 line signal level high; 0: DAT0 line signal level low
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SdiocData1PinLvl = (1u << 21), ///< 1: DAT1 line signal level high; 0: DAT1 line signal level low
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SdiocData2PinLvl = (1u << 22), ///< 1: DAT2 line signal level high; 0: DAT2 line signal level low
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SdiocData3PinLvl = (1u << 23), ///< 1: DAT3 line signal level high; 0: DAT3 line signal level low
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SdiocCmdPinLvl = (1u << 24), ///< 1: CMD line signal level high; 0: CMD line signal level low
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} en_sdioc_host_status_t;
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/**
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*******************************************************************************
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** \brief SDIOC normal interrupt selection enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_nor_int_sel
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{
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SdiocCommandComplete = (1u << 0), ///< Command Complete. 1: Command complete; 0:No command complete
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SdiocTransferComplete = (1u << 1), ///< Transfer Complete. 1: Data transfer complete; 0:No transfer complete
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SdiocBlockGapEvent = (1u << 2), ///< Block Gap Event. 1: Transaction stopped at block gap; 0: No Block Gap Event
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SdiocBufferWriteReady = (1u << 4), ///< Buffer Write Ready. 1: Ready to Write buffer; 0: No ready to Write buffer
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SdiocBufferReadReady = (1u << 5), ///< Buffer Read Ready. 1: Ready to read buffer; 0: No ready to read buffer
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SdiocCardInsertedInt = (1u << 6), ///< Write Transfer Active.1: Transferring data; 0: No valid data
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SdiocCardRemoval = (1u << 7), ///< Card Removal. 1: Card removed; 0: Card state stable or Debouncing
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SdiocCardInt = (1u << 8), ///< Card Interrupt. 1: Generate Card Interrupt; 0: No Card Interrupt
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SdiocErrorInt = (1u << 15), ///< Error Interrupt. 1: Error; 0: No Error
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} en_sdioc_nor_int_sel_t, en_sdioc_nor_int_flag_t;
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/**
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*******************************************************************************
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** \brief SDIOC error interrupt selection enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_err_int_sel
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{
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SdiocCmdTimeoutErr = (1u << 0), ///< Command Timeout Error. 1: Timer out; 0:No Error
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SdiocCmdCrcErr = (1u << 1), ///< Command CRC Error. 1: Command CRC Error Generated; 0:No Error
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SdiocCmdEndBitErr = (1u << 2), ///< Command End Bit Error. 1: End Bit Error Generated; 0:No Error
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SdiocCmdIndexErr = (1u << 3), ///< Command Index Error. 1: Command Index Error Generatedr; 0:No Error
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SdiocDataTimeoutErr = (1u << 4), ///< Data Timeout Error. 1: Timer out; 0:No Error
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SdiocDataCrcErr = (1u << 5), ///< Data CRC Error. 1: Data CRC Error Generated; 0:No Error
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SdiocDataEndBitErr = (1u << 6), ///< Data End Bit Error. 1: End Bit Error Generated; 0:No Error
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SdiocAutoCmd12Err = (1u << 8), ///< Auto CMD12 Error. 1: Error; 0:No Error
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} en_sdioc_err_int_sel_t, en_sdioc_err_int_flag_t;
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/**
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*******************************************************************************
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** \brief SDIOC auto CMD12 error status enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_atuo_cmd_err_status
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{
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SdiocAutoCmd12NotExecuted = (1u << 0), ///< Auto CMD12 Not Executed. 1: Not executed; 0:Executed
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SdiocAutoCmd12Timeout = (1u << 1), ///< Auto CMD12 Timeout Error. 1: Time out; 0:No error
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SdiocAutoCmd12CrcErr = (1u << 2), ///< Auto CMD12 CRC Error. 1: CRC Error Generated; 0: No error
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SdiocAutoCmd12EndBitErr = (1u << 3), ///< Auto CMD12 End Bit Error. 1: End Bit Error Generated; 0: No error to Write buffer
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SdiocAutoCmd12IndexErr = (1u << 4), ///< Auto CMD12 Index Error. 1: Error; 0: No error
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SdiocCmdNotIssuedErr = (1u << 7), ///< Command Not Issued By Auto CMD12 Error.1: Not Issued; 0: No error
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} en_sdioc_atuo_cmd_err_sel_t, en_sdioc_atuo_cmd_err_status_t;
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/**
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*******************************************************************************
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** \brief SDIOC speed mode enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_speed_mode
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{
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SdiocNormalSpeedMode = 0u, ///< Normal speed mode
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SdiocHighSpeedMode = 1u, ///< High speed mode
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} en_sdioc_speed_mode_t;
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/**
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*******************************************************************************
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** \brief SDIOC response register enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_response_reg
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{
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SdiocRegResp01 = 0x00u, ///< Response 0/1 Register
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SdiocRegResp23 = 0x04u, ///< Response 2/3 Register
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SdiocRegResp45 = 0x08u, ///< Response 4/5 Register
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SdiocRegResp67 = 0x0Cu, ///< Response 5/6 Register
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} en_sdioc_response_reg_t;
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/**
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******************************************************************************
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** \brief SDIOC output clock frequency enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_clk_freq
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{
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SdiocClk400K = 400000u, ///< SDIOC clock: 40KHz
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SdiocClk20M = 20000000u, ///< SDIOC clock: 20MHz
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SdiocClk25M = 25000000u, ///< SDIOC clock: 25MHz
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SdiocClk40M = 40000000u, ///< SDIOC clock: 40MHz
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SdiocClk50M = 50000000u, ///< SDIOC clock: 50MHz
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} en_sdioc_clk_freq_t;
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/**
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******************************************************************************
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** \brief SDIOC detect the source of card enumeration
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**
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******************************************************************************/
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typedef enum en_sdioc_detect_signal
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{
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SdiocSdcdPinLevel = 0u, ///< SDCD# is selected (for normal use)
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SdiocCardDetectTestLevel = 1u, ///< The Card Detect Test Level is selected(for test purpose)
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} en_sdioc_detect_signal_t;
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/**
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*******************************************************************************
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** \brief SDIOC Command configure structure
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**
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******************************************************************************/
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typedef struct stc_sdioc_cmd_cfg
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{
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uint8_t u8CmdIndex; ///< Command index
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uint32_t u32Argument; ///< The argument of command
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en_sdioc_cmd_type_t enCmdType; ///< Command type
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en_sdioc_response_index_t enRspIndex; ///< Response index, refer @ref en_sdioc_response_index_t for details
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en_functional_state_t enDataPresentEnable; ///< Enable: Data is present and shall be transferred using the DAT line, Disable: Commands using only CMD line
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} stc_sdioc_cmd_cfg_t;
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/**
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*******************************************************************************
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** \brief SDIOC Data configure structure
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**
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******************************************************************************/
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typedef struct stc_sdioc_data_cfg
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{
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uint16_t u16BlkSize; ///< Block size
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uint16_t u16BlkCnt; ///< Block count
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en_functional_state_t enAutoCmd12Enable; ///< Enable: Auto CMD12 enable, Disable: Auto CMD12 disable
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en_sdioc_transfer_dir_t enTransferDir; ///< Specifies the data transfer direction of the SDIOC controller.
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///< This parameter can be a value of @ref en_sdioc_transfer_dir_t.
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en_sdioc_data_timeout_t enDataTimeOut; ///< Specifies the data timeout period in card bus clock periods.
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///< This parameter can be a value of @ref en_sdioc_data_timeout_t.
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en_sdioc_transfer_mode_t enTransferMode; ///< Specifies the data transfer mode of the SDIOC controller.
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///< This parameter can be a value of @ref en_sdioc_transfer_mode_t.
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} stc_sdioc_data_cfg_t;
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/**
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*******************************************************************************
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** \brief SDIOC normal interrupt enable structure
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**
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******************************************************************************/
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typedef struct stc_sdioc_normal_irq_en
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{
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union
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{
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uint16_t u16NormalIntsgEn; ///< SDIOC normal interrupt enable
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stc_sdioc_errintsgen_field_t stcNormalIntsgEn; ///< SDIOC normal interrupt enable bit-field structure
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};
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} stc_sdioc_normal_irq_en_t;
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/**
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*******************************************************************************
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** \brief SDIOC normal interrupt enable structure
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**
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******************************************************************************/
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typedef struct stc_sdioc_error_irq_en
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{
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union
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{
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uint16_t u16ErrorIntsgEn; ///< SDIOC error interrupt enable
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stc_sdioc_errintsgen_field_t stcErrorIntsgEn; ///< SDIOC error interrupt enable bit-field structure
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};
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} stc_sdioc_error_irq_en_t;
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/**
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*******************************************************************************
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** \brief SDIOC error status callback functions
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**
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******************************************************************************/
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typedef struct stc_sdioc_normal_irq_cb
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{
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func_ptr_t pfnCommandCompleteIrqCb; ///< Pointer to command complete callback function
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func_ptr_t pfnTransferCompleteIrqCb; ///< Pointer to transfer complete callback function
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func_ptr_t pfnBlockGapIrqCb; ///< Pointer to Block gap callback function
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func_ptr_t pfnBufferWriteReadyIrqCb; ///< Pointer to buffer write ready callback function
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func_ptr_t pfnBufferReadReadyIrqCb; ///< Pointer to buffer read ready callback function
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func_ptr_t pfnCardInsertIrqCb; ///< Pointer to card insertion callback function
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func_ptr_t pfnCardRemovalIrqCb; ///< Pointer to card removal callback function
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func_ptr_t pfnCardIrqCb; ///< Pointer to card interrupt callback function
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} stc_sdioc_normal_irq_cb_t;
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/**
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*******************************************************************************
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** \brief SDIOC error status callback functions
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**
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******************************************************************************/
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typedef struct stc_sdioc_error_irq_cb
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{
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func_ptr_t pfnCmdTimeoutErrIrqCb; ///< Pointer to command timeout error interrupt callback function
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func_ptr_t pfnCmdCrcErrIrqCb; ///< Pointer to command CRC error interrupt callback function
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func_ptr_t pfnCmdEndBitErrIrqCb; ///< Pointer to command end bit error interrupt callback function
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func_ptr_t pfnCmdIndexErrIrqCb; ///< Pointer to command index error interrupt callback function
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func_ptr_t pfnDataTimeoutErrIrqCb; ///< Pointer to data timeout error interrupt callback function
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func_ptr_t pfnDataCrcErrIrqCb; ///< Pointer to data CRC error interrupt callback function
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func_ptr_t pfnDataEndBitErrIrqCb; ///< Pointer to data end bit error interrupt callback function
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func_ptr_t pfnAutoCmdErrIrqCb; ///< Pointer to command error interrupt callback function
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} stc_sdioc_error_irq_cb_t;
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/**
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*******************************************************************************
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** \brief SDIOC initialization configuration
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**
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******************************************************************************/
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typedef struct stc_sdioc_init
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{
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stc_sdioc_normal_irq_en_t *pstcNormalIrqEn; ///< Pointer to normal interrupt enable structure
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stc_sdioc_normal_irq_cb_t *pstcNormalIrqCb; ///< Pointer to normal interrupt callback function structure
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stc_sdioc_error_irq_en_t *pstcErrorIrqEn; ///< Pointer to error interrupt enable structure
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stc_sdioc_error_irq_cb_t *pstcErrorIrqCb; ///< Pointer to error interrupt callback structure
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} stc_sdioc_init_t;
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|
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/*******************************************************************************
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|
* Global pre-processor symbols/macros ('#define')
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******************************************************************************/
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/*******************************************************************************
|
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* Global variable definitions ('extern')
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******************************************************************************/
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|
|
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/*******************************************************************************
|
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* Global function prototypes (definition in C source)
|
|
******************************************************************************/
|
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void SDIOC_IrqHandler(M4_SDIOC_TypeDef *SDIOCx);
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en_result_t SDIOC_Init(M4_SDIOC_TypeDef *SDIOCx,
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const stc_sdioc_init_t *pstcInitCfg);
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en_result_t SDIOC_DeInit(M4_SDIOC_TypeDef *SDIOCx);
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void SDIOC_SetMode(const M4_SDIOC_TypeDef *SDIOCx, en_sdioc_mode_t enMode);
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en_result_t SDIOC_SendCommand(M4_SDIOC_TypeDef *SDIOCx,
|
|
const stc_sdioc_cmd_cfg_t *pstcCmdCfg);
|
|
uint32_t SDIOC_GetResponse(const M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_response_reg_t enRespReg);
|
|
en_result_t SDIOC_ReadBuffer(M4_SDIOC_TypeDef *SDIOCx,
|
|
uint8_t au8Data[],
|
|
uint32_t u32Len);
|
|
en_result_t SDIOC_WriteBuffer(M4_SDIOC_TypeDef *SDIOCx,
|
|
uint8_t au8Data[],
|
|
uint32_t u32Len);
|
|
en_result_t SDIOC_ConfigData(M4_SDIOC_TypeDef *SDIOCx,
|
|
const stc_sdioc_data_cfg_t *pstcDataCfg);
|
|
en_result_t SDIOC_SdclkCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_functional_state_t enCmd);
|
|
en_result_t SDIOC_SetClkDiv(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_clk_div_t enClkDiv);
|
|
en_sdioc_clk_div_t SDIOC_GetClkDiv(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_SetClk(M4_SDIOC_TypeDef *SDIOCx, uint32_t u32ClkFreq);
|
|
en_result_t SDIOC_SetBusWidth(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_bus_width_t enBusWidth);
|
|
en_sdioc_bus_width_t SDIOC_GetBusWidth(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_SetSpeedMode(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_speed_mode_t enSpeedMode);
|
|
en_sdioc_speed_mode_t SDIOC_GetSpeedMode(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_SetDataTimeout(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_data_timeout_t enTimeout);
|
|
en_sdioc_data_timeout_t SDIOC_GetDataTimeout(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_SetCardDetectSignal(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_detect_signal_t enDetectSignal);
|
|
en_flag_status_t SDIOC_GetCardDetectTestLevel(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_BusPowerOn(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_BusPowerOff(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_StopAtBlockGapCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_functional_state_t enCmd);
|
|
en_result_t SDIOC_RestartTransfer(M4_SDIOC_TypeDef *SDIOCx);
|
|
en_result_t SDIOC_ReadWaitCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_functional_state_t enCmd);
|
|
en_result_t SDIOC_InterruptAtBlockGapCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_functional_state_t enCmd);
|
|
en_result_t SDIOC_SoftwareReset(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_sw_reset_t enSwResetType);
|
|
en_flag_status_t SDIOC_GetStatus(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_host_status_t enHostStatus);
|
|
en_result_t SDIOC_NormalIrqSignalCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_nor_int_sel_t enNorInt,
|
|
en_functional_state_t enCmd);
|
|
en_result_t SDIOC_NormalIrqStatusCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_nor_int_sel_t enNorInt,
|
|
en_functional_state_t enCmd);
|
|
en_flag_status_t SDIOC_GetNormalIrqFlag(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_nor_int_flag_t enNorInt);
|
|
en_result_t SDIOC_ClearNormalIrqFlag(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_nor_int_flag_t enNorInt);
|
|
en_result_t SDIOC_ErrIrqSignalCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_err_int_sel_t enErrInt,
|
|
en_functional_state_t enCmd);
|
|
en_result_t SDIOC_ErrIrqStatusCmd(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_err_int_sel_t enErrInt,
|
|
en_functional_state_t enCmd);
|
|
en_flag_status_t SDIOC_GetErrIrqFlag(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_err_int_flag_t enErrInt);
|
|
en_result_t SDIOC_ClearErrIrqFlag(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_err_int_flag_t enErrInt);
|
|
en_result_t SDIOC_ForceErrIrqFlag(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_err_int_sel_t enErrInt);
|
|
en_flag_status_t SDIOC_GetAutoCmdErrStatus(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_atuo_cmd_err_status_t enAutoCmdErr);
|
|
en_result_t SDIOC_ForceAutoCmdErr(M4_SDIOC_TypeDef *SDIOCx,
|
|
en_sdioc_atuo_cmd_err_sel_t enAutoCmdErr);
|
|
|
|
//@} // SdiocGroup
|
|
|
|
#ifdef __cplusplus
|
|
}
|
|
#endif
|
|
|
|
#endif /* DDL_SDIOC_ENABLE */
|
|
|
|
#endif /* __HC32F460_SDIOC_H__ */
|
|
|
|
/*******************************************************************************
|
|
* EOF (not truncated)
|
|
******************************************************************************/
|