209 lines
7.3 KiB
C
209 lines
7.3 KiB
C
////////////////////////////////////////////////////////////////////////////////
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/// @file hal_iwdg.c
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/// @author AE TEAM
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/// @brief THIS FILE PROVIDES ALL THE IWDG FIRMWARE FUNCTIONS.
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////////////////////////////////////////////////////////////////////////////////
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/// @attention
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///
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/// THE EXISTING FIRMWARE IS ONLY FOR REFERENCE, WHICH IS DESIGNED TO PROVIDE
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/// CUSTOMERS WITH CODING INFORMATION ABOUT THEIR PRODUCTS SO THEY CAN SAVE
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/// TIME. THEREFORE, MINDMOTION SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT OR
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/// CONSEQUENTIAL DAMAGES ABOUT ANY CLAIMS ARISING OUT OF THE CONTENT OF SUCH
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/// HARDWARE AND/OR THE USE OF THE CODING INFORMATION CONTAINED HEREIN IN
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/// CONNECTION WITH PRODUCTS MADE BY CUSTOMERS.
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///
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/// <H2><CENTER>© COPYRIGHT MINDMOTION </CENTER></H2>
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////////////////////////////////////////////////////////////////////////////////
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// Define to prevent recursive inclusion
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#define _HAL_IWDG_C_
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// Files includes
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#include "hal_iwdg.h"
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////////////////////////////////////////////////////////////////////////////////
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/// @addtogroup MM32_Hardware_Abstract_Layer
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/// @{
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////////////////////////////////////////////////////////////////////////////////
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/// @addtogroup IWDG_HAL
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/// @{
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////////////////////////////////////////////////////////////////////////////////
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/// @addtogroup IWDG_Exported_Functions
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/// @{
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Enables or disables write access to IWDG_PR and IWDG_RLR
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/// registers.
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/// @param write_access: new state of write access to IWDG_PR and
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/// IWDG_RLR registers.
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/// This parameter can be one of the following values:
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/// @arg IWDG_WriteAccess_Enable: Enable write access to
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/// IWDG_PR and IWDG_RLR registers
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/// @arg IWDG_WriteAccess_Disable: Disable write access to
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/// IWDG_PR and IWDG_RLR registers
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_WriteAccessCmd(u16 write_access)
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{
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IWDG->KR = write_access;
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Sets IWDG Prescaler value.
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/// @param prescaler: specifies the IWDG Prescaler value.
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/// This parameter can be one of the following values:
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/// @arg IWDG_Prescaler_4: IWDG prescaler set to 4
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/// @arg IWDG_Prescaler_8: IWDG prescaler set to 8
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/// @arg IWDG_Prescaler_16: IWDG prescaler set to 16
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/// @arg IWDG_Prescaler_32: IWDG prescaler set to 32
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/// @arg IWDG_Prescaler_64: IWDG prescaler set to 64
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/// @arg IWDG_Prescaler_128: IWDG prescaler set to 128
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/// @arg IWDG_Prescaler_256: IWDG prescaler set to 256
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_SetPrescaler(u8 prescaler)
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{
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IWDG->PR = prescaler;
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PVU_CheckStatus();
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Set IWDG reload value.
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/// @param reload: specifies the IWDG reload value.
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/// This parameter must be a number between 0 and 0x0FFF.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_SetReload(u16 reload)
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{
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IWDG->RLR = reload;
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RVU_CheckStatus();
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Get IWDG reload value.
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/// @param None.
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/// @retval reload: specifies the IWDG reload value.
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////////////////////////////////////////////////////////////////////////////////
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u32 IWDG_GetReload(void)
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{
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return IWDG->RLR;
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Reloads IWDG counter with value defined in the reload register
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/// (write access to IWDG_PR and IWDG_RLR registers disabled).
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_ReloadCounter(void)
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{
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IWDG->KR = KR_KEY_Reload;
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Enables IWDG (write access to IWDG_PR and IWDG_RLR registers
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/// disabled).
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_Enable(void)
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{
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IWDG->KR = KR_KEY_Enable;
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Checks whether the specified IWDG flag is set or not.
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/// @param flag: specifies the flag to check.
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/// This parameter can be one of the following values:
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/// @arg IWDG_FLAG_PVU: Prescaler Value Update on going
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/// @arg IWDG_FLAG_RVU: reload Value Update on going
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/// @retval The new state of flag (SET or RESET).
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////////////////////////////////////////////////////////////////////////////////
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FlagStatus IWDG_GetFlagStatus(u16 flag)
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{
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return ((IWDG->SR & flag) != (u32)RESET) ? SET : RESET;
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Checks prescaler value has been updated.
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void PVU_CheckStatus(void)
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{
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while (IWDG_GetFlagStatus(IWDG_FLAG_PVU) == SET);
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Checks count relead value has been updated.
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void RVU_CheckStatus(void)
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{
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while (IWDG_GetFlagStatus(IWDG_FLAG_RVU) == SET);
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief IWDG overflow configuration.
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/// @param overflow_config
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/// @arg IWDG_Overflow_Interrupt: Interrupt after overflow.
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/// @arg IWDG_Overflow_Reset: Reset after overflow.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_OverflowConfig(IWDGOverflowConfig_TypeDef overflow_config)
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{
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IWDG->CR &= ~IWDG_CR_IRQSEL;
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IWDG->CR |= overflow_config;
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Clear interrupt flag
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_ClearITPendingBit(void)
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{
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IWDG->CR |= IWDG_CR_IRQCLR;//write 1 clear interrupt Flag
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Clear interrupt flag
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_ClearIT(void)
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{
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IWDG->CR |= IWDG_CR_IRQCLR;//write 1 clear interrupt Flag
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Enable IWDG interrupt function
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_EnableIT(void)
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{
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IWDG->CR |= IWDG_CR_IRQSEL;
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}
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////////////////////////////////////////////////////////////////////////////////
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/// @brief Disable IWDG interrupt function
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/// @param None.
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/// @retval None.
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////////////////////////////////////////////////////////////////////////////////
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void IWDG_Reset(void)
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{
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IWDG->CR &= ~IWDG_CR_IRQSEL;
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}
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/// @}
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/// @}
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/// @}
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