140 lines
5.9 KiB
Batchfile
140 lines
5.9 KiB
Batchfile
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MEMORY
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{
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PAGE 0 : /* Program Memory */
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/* Memory (RAM/FLASH) blocks can be moved to PAGE1 for data allocation */
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/* BEGIN is used for the "boot to Flash" bootloader mode */
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BEGIN : origin = 0x080000, length = 0x000002
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RAMLS0 : origin = 0x008000, length = 0x000800
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RAMLS1 : origin = 0x008800, length = 0x000800
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RAMLS2 : origin = 0x009000, length = 0x000800
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RAMLS3 : origin = 0x009800, length = 0x000800
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RAMLS4 : origin = 0x00A000, length = 0x000800
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RAMGS14 : origin = 0x01A000, length = 0x001000
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RAMGS15 : origin = 0x01B000, length = 0x001000
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RESET : origin = 0x3FFFC0, length = 0x000002
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/* Flash sectors */
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FLASHA : origin = 0x080002, length = 0x001FFE /* on-chip Flash */
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FLASHB : origin = 0x082000, length = 0x002000 /* on-chip Flash */
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FLASHC : origin = 0x084000, length = 0x002000 /* on-chip Flash */
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FLASHD : origin = 0x086000, length = 0x002000 /* on-chip Flash */
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FLASHE : origin = 0x088000, length = 0x008000 /* on-chip Flash */
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FLASHF : origin = 0x090000, length = 0x008000 /* on-chip Flash */
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FLASHG : origin = 0x098000, length = 0x008000 /* on-chip Flash */
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FLASHH : origin = 0x0A0000, length = 0x008000 /* on-chip Flash */
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FLASHI : origin = 0x0A8000, length = 0x008000 /* on-chip Flash */
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FLASHJ : origin = 0x0B0000, length = 0x008000 /* on-chip Flash */
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FLASHK : origin = 0x0B8000, length = 0x002000 /* on-chip Flash */
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FLASHL : origin = 0x0BA000, length = 0x002000 /* on-chip Flash */
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FLASHM : origin = 0x0BC000, length = 0x002000 /* on-chip Flash */
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FLASHN : origin = 0x0BE000, length = 0x002000 /* on-chip Flash */
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PAGE 1 : /* Data Memory */
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/* Memory (RAM/FLASH) blocks can be moved to PAGE0 for program allocation */
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BOOT_RSVD : origin = 0x000002, length = 0x000120 /* Part of M0, BOOT rom will use this for stack */
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RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */
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RAMD1 : origin = 0x00B800, length = 0x000800
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RAMM0 : origin = 0x000122, length = 0x0002DE
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RAMD0 : origin = 0x00B000, length = 0x000800
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RAMLS5 : origin = 0x00A800, length = 0x000800
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RAMGS0 : origin = 0x00C000, length = 0x001000
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RAMGS1 : origin = 0x00D000, length = 0x001000
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RAMGS2 : origin = 0x00E000, length = 0x001000
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RAMGS3 : origin = 0x00F000, length = 0x001000
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RAMGS4 : origin = 0x010000, length = 0x001000
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RAMGS5 : origin = 0x011000, length = 0x001000
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RAMGS6 : origin = 0x012000, length = 0x001000
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RAMGS7 : origin = 0x013000, length = 0x001000
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RAMGS8 : origin = 0x014000, length = 0x001000
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RAMGS9 : origin = 0x015000, length = 0x001000
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RAMGS10 : origin = 0x016000, length = 0x001000
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RAMGS11 : origin = 0x017000, length = 0x001000
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RAMGS12 : origin = 0x018000, length = 0x001000
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RAMGS13 : origin = 0x019000, length = 0x001000
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CPU2TOCPU1RAM : origin = 0x03F800, length = 0x000400
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CPU1TOCPU2RAM : origin = 0x03FC00, length = 0x000400
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}
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SECTIONS
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{
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/* Allocate program areas: */
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.cinit : > FLASHB PAGE = 0, ALIGN(4)
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.pinit : > FLASHB, PAGE = 0, ALIGN(4)
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.text : >> FLASHB | FLASHC | FLASHD | FLASHE PAGE = 0, ALIGN(4)
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codestart : > BEGIN PAGE = 0, ALIGN(4)
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#ifdef __TI_COMPILER_VERSION__
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#if __TI_COMPILER_VERSION__ >= 15009000
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.TI.ramfunc : {} LOAD = FLASHD,
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RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
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LOAD_START(_RamfuncsLoadStart),
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LOAD_SIZE(_RamfuncsLoadSize),
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LOAD_END(_RamfuncsLoadEnd),
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RUN_START(_RamfuncsRunStart),
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RUN_SIZE(_RamfuncsRunSize),
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RUN_END(_RamfuncsRunEnd),
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PAGE = 0, ALIGN(4)
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#else
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ramfuncs : LOAD = FLASHD,
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RUN = RAMLS0 | RAMLS1 | RAMLS2 |RAMLS3,
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LOAD_START(_RamfuncsLoadStart),
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LOAD_SIZE(_RamfuncsLoadSize),
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LOAD_END(_RamfuncsLoadEnd),
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RUN_START(_RamfuncsRunStart),
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RUN_SIZE(_RamfuncsRunSize),
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RUN_END(_RamfuncsRunEnd),
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PAGE = 0, ALIGN(4)
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#endif
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#endif
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FSymTab : > RAMD0, PAGE = 1, ALIGN(4)
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LOAD_START(___fsymtab_start)
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LOAD_END(___fsymtab_end)
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/* Allocate uninitalized data sections: */
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.stack : > RAMM1 PAGE = 1
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.ebss : >> RAMLS5 | RAMGS0 | RAMGS1 PAGE = 1
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.esysmem : >> RAMGS2 | RAMGS3 | RAMGS4 | RAMGS5 | RAMGS6 | RAMGS7 | RAMGS8 | RAMGS9 | RAMGS10 | RAMGS11 | RAMGS12 | RAMGS13 PAGE = 1
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/* Initalized sections go in Flash */
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.econst : >> FLASHF | FLASHG | FLASHH PAGE = 0, ALIGN(4)
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.switch : > FLASHB PAGE = 0, ALIGN(4)
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.reset : > RESET, PAGE = 0, TYPE = DSECT /* not used, */
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Filter_RegsFile : > RAMGS0, PAGE = 1
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SHARERAMGS0 : > RAMGS0, PAGE = 1
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SHARERAMGS1 : > RAMGS1, PAGE = 1
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/* The following section definitions are required when using the IPC API Drivers */
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GROUP : > CPU1TOCPU2RAM, PAGE = 1
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{
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PUTBUFFER
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PUTWRITEIDX
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GETREADIDX
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}
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GROUP : > CPU2TOCPU1RAM, PAGE = 1
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{
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GETBUFFER : TYPE = DSECT
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GETWRITEIDX : TYPE = DSECT
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PUTREADIDX : TYPE = DSECT
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}
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}
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/*
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//===========================================================================
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// End of file.
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//===========================================================================
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*/
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