849 lines
25 KiB
C
849 lines
25 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2009-01-05 Bernard the first version
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* 2010-03-29 Bernard remove interrupt Tx and DMA Rx mode
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* 2012-02-08 aozima update for F4.
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* 2012-07-28 aozima update for ART board.
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* 2016-05-28 armink add DMA Rx mode
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* 2022-06-09 THEWON first version for serialX
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*/
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#include <gd32f4xx.h>
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#include <drv_usartX.h>
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#include <board.h>
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#ifdef RT_USING_SERIAL
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#if !defined(BSP_USING_UART0) && !defined(BSP_USING_UART1) && \
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!defined(BSP_USING_UART2) && !defined(BSP_USING_UART3) && \
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!defined(BSP_USING_UART4) && !defined(BSP_USING_UART5) && \
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!defined(BSP_USING_UART6) && !defined(BSP_USING_UART7)
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#error "Please define at least one UARTx"
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#endif
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enum
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{
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#ifdef BSP_USING_UART0
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UART0_INDEX,
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#endif
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#ifdef BSP_USING_UART1
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UART1_INDEX,
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#endif
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#ifdef BSP_USING_UART2
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UART2_INDEX,
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#endif
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#ifdef BSP_USING_UART3
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UART3_INDEX,
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#endif
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#ifdef BSP_USING_UART4
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UART4_INDEX,
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#endif
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#ifdef BSP_USING_UART5
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UART5_INDEX,
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#endif
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#ifdef BSP_USING_UART6
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UART6_INDEX,
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#endif
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#ifdef BSP_USING_UART7
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UART7_INDEX,
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#endif
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};
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/* GD32 uart driver */
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static void uart_isr(struct rt_serial_device *serial);
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#ifdef RT_SERIAL_USING_DMA
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static void DMA_RX_Configuration(struct rt_serial_device *serial);
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static void DMA_TX_Configuration(struct rt_serial_device *serial);
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#endif
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static struct gd32_uart uarts[] = {
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#ifdef BSP_USING_UART0
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{
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.uart_periph = USART0, // uart peripheral index
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.uart_config = {
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.name = "uart0",
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.irqn = USART0_IRQn, // uart iqrn
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RCU_USART0, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_AF_7, GPIO_PIN_9, // tx port, tx alternate, tx pin
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GPIOA, GPIO_AF_7, GPIO_PIN_10, // rx port, rx alternate, rx pin
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},
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#ifdef RT_SERIAL_USING_DMA
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.dmaTxing = RT_FALSE,
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.dma_rx = {
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.dma_periph = DMA1,
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.dma_channel = DMA_CH2,
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.dma_subperi = DMA_SUBPERI4,
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.dma_irq = DMA1_Channel2_IRQn,
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},
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.dma_tx = {
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.dma_periph = DMA1,
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.dma_channel = DMA_CH7,
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.dma_subperi = DMA_SUBPERI4,
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.dma_irq = DMA1_Channel7_IRQn,
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},
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#endif
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},
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#endif
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#ifdef BSP_USING_UART1
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{
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.uart_periph = USART1, // uart peripheral index
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.uart_config = {
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.name = "uart1",
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.irqn = USART1_IRQn, // uart iqrn
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RCU_USART1, RCU_GPIOA, RCU_GPIOA, // periph clock, tx gpio clock, rt gpio clock
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GPIOA, GPIO_AF_7, GPIO_PIN_2, // tx port, tx alternate, tx pin
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GPIOA, GPIO_AF_7, GPIO_PIN_3, // rx port, rx alternate, rx pin
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}
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},
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#endif
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#ifdef BSP_USING_UART2
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{
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.uart_periph = USART2, // uart peripheral index
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.uart_config = {
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.name = "uart2",
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.irqn = USART2_IRQn, // uart iqrn
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RCU_USART2, RCU_GPIOB, RCU_GPIOB, // periph clock, tx gpio clock, rt gpio clock
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GPIOB, GPIO_AF_7, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOB, GPIO_AF_7, GPIO_PIN_11, // rx port, rx alternate, rx pin
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}
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},
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#endif
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#ifdef BSP_USING_UART3
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{
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.uart_periph = UART3, // uart peripheral index
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.uart_config = {
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.name = "uart3",
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.irqn = UART3_IRQn, // uart iqrn
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RCU_UART3, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
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GPIOC, GPIO_AF_8, GPIO_PIN_10, // tx port, tx alternate, tx pin
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GPIOC, GPIO_AF_8, GPIO_PIN_11, // rx port, rx alternate, rx pin
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}
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},
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#endif
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#ifdef BSP_USING_UART4
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{
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.uart_periph = UART4, // uart peripheral index
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.uart_config = {
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.name = "uart4",
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.irqn = UART4_IRQn, // uart iqrn
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RCU_UART4, RCU_GPIOC, RCU_GPIOD, // periph clock, tx gpio clock, rt gpio clock
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GPIOC, GPIO_AF_8, GPIO_PIN_12, // tx port, tx alternate, tx pin
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GPIOD, GPIO_AF_8, GPIO_PIN_2, // rx port, rx alternate, rx pin
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}
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},
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#endif
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#ifdef BSP_USING_UART5
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{
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.uart_periph = USART5, // uart peripheral index
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.uart_config = {
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.name = "uart5",
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.irqn = USART5_IRQn, // uart iqrn
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RCU_USART5, RCU_GPIOC, RCU_GPIOC, // periph clock, tx gpio clock, rt gpio clock
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GPIOC, GPIO_AF_8, GPIO_PIN_6, // tx port, tx alternate, tx pin
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GPIOC, GPIO_AF_8, GPIO_PIN_7, // rx port, rx alternate, rx pin
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}
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},
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#endif
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#ifdef BSP_USING_UART6
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{
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.uart_periph = UART6, // uart peripheral index
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.uart_config = {
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.name = "uart6",
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.irqn = UART6_IRQn, // uart iqrn
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RCU_UART6, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
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GPIOE, GPIO_AF_8, GPIO_PIN_7, // tx port, tx alternate, tx pin
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GPIOE, GPIO_AF_8, GPIO_PIN_8, // rx port, rx alternate, rx pin
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}
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},
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#endif
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#ifdef BSP_USING_UART7
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{
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.uart_periph = UART7, // uart peripheral index
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.uart_config = {
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.name = "uart7",
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.irqn = UART7_IRQn, // uart iqrn
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RCU_UART7, RCU_GPIOE, RCU_GPIOE, // periph clock, tx gpio clock, rt gpio clock
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GPIOE, GPIO_AF_8, GPIO_PIN_0, // tx port, tx alternate, tx pin
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GPIOE, GPIO_AF_8, GPIO_PIN_1, // rx port, rx alternate, rx pin
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}
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},
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#endif
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};
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/**
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* @brief UART MSP Initialization
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* This function configures the hardware resources used in this example:
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* - Peripheral's clock enable
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* - Peripheral's GPIO Configuration
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* - NVIC configuration for UART interrupt request enable
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* @param huart: UART handle pointer
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* @retval None
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*/
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void gd32_uart_gpio_init(struct gd32_uart *uart)
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{
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/* enable USART clock */
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rcu_periph_clock_enable(uart->uart_config.tx_gpio_clk);
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rcu_periph_clock_enable(uart->uart_config.rx_gpio_clk);
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rcu_periph_clock_enable(uart->uart_config.per_clk);
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/* connect port to USARTx_Tx */
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gpio_af_set(uart->uart_config.tx_port, uart->uart_config.tx_af, uart->uart_config.tx_pin);
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/* connect port to USARTx_Rx */
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gpio_af_set(uart->uart_config.rx_port, uart->uart_config.rx_af, uart->uart_config.rx_pin);
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/* configure USART Tx as alternate function push-pull */
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gpio_mode_set(uart->uart_config.tx_port, GPIO_MODE_AF, GPIO_PUPD_PULLUP, uart->uart_config.tx_pin);
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gpio_output_options_set(uart->uart_config.tx_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, uart->uart_config.tx_pin);
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/* configure USART Rx as alternate function push-pull */
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gpio_mode_set(uart->uart_config.rx_port, GPIO_MODE_AF, GPIO_PUPD_NONE, uart->uart_config.rx_pin);
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gpio_output_options_set(uart->uart_config.rx_port, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ, uart->uart_config.rx_pin);
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}
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static rt_err_t gd32_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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RT_ASSERT(cfg != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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usart_baudrate_set(uart->uart_periph, cfg->baud_rate);
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switch (cfg->data_bits)
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{
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case DATA_BITS_9:
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usart_word_length_set(uart->uart_periph, USART_WL_9BIT);
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break;
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default:
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usart_word_length_set(uart->uart_periph, USART_WL_8BIT);
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break;
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}
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switch (cfg->stop_bits)
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{
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case STOP_BITS_2:
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usart_stop_bit_set(uart->uart_periph, USART_STB_2BIT);
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break;
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default:
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usart_stop_bit_set(uart->uart_periph, USART_STB_1BIT);
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break;
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}
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switch (cfg->parity)
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{
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case PARITY_ODD:
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usart_parity_config(uart->uart_periph, USART_PM_ODD);
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break;
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case PARITY_EVEN:
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usart_parity_config(uart->uart_periph, USART_PM_EVEN);
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break;
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default:
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usart_parity_config(uart->uart_periph, USART_PM_NONE);
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break;
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}
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return RT_EOK;
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}
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static rt_err_t gd32_init(struct rt_serial_device *serial)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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gd32_uart_gpio_init(uart);
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if (gd32_configure(serial, &serial->config) != RT_EOK)
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{
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return -RT_ERROR;
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}
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usart_receive_config(uart->uart_periph, USART_RECEIVE_ENABLE);
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usart_transmit_config(uart->uart_periph, USART_TRANSMIT_ENABLE);
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return RT_EOK;
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}
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static rt_err_t gd32_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct gd32_uart *uart;
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rt_ubase_t ctrl_arg = (rt_ubase_t)arg;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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switch (cmd) {
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case RT_DEVICE_CTRL_OPEN:
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usart_interrupt_disable(uart->uart_periph, USART_INT_TBE);
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usart_interrupt_disable(uart->uart_periph, USART_INT_TC);
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usart_flag_clear(uart->uart_periph, USART_FLAG_RBNE);
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usart_flag_clear(uart->uart_periph, USART_FLAG_TBE);
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usart_flag_clear(uart->uart_periph, USART_FLAG_TC);
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/* enable rx irq */
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NVIC_SetPriority(uart->uart_config.irqn, 0);
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NVIC_EnableIRQ(uart->uart_config.irqn);
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usart_enable(uart->uart_periph);
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#ifdef RT_SERIAL_USING_DMA
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uart->dmaTxing = RT_FALSE;
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#endif
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break;
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case RT_DEVICE_CTRL_CLOSE:
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NVIC_DisableIRQ(uart->uart_config.irqn);
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usart_interrupt_disable(uart->uart_periph, USART_INT_RBNE);
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usart_interrupt_disable(uart->uart_periph, USART_INT_TBE);
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usart_interrupt_disable(uart->uart_periph, USART_INT_IDLE);
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usart_interrupt_disable(uart->uart_periph, USART_INT_TC);
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usart_disable(uart->uart_periph);
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usart_deinit(uart->uart_periph);
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#ifdef RT_SERIAL_USING_DMA
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NVIC_DisableIRQ(uart->dma_rx.dma_irq);
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dma_interrupt_disable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_CHXCTL_HTFIE);
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dma_interrupt_disable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_CHXCTL_FTFIE);
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dma_channel_disable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel);
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dma_deinit(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel);
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NVIC_DisableIRQ(uart->dma_tx.dma_irq);
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dma_interrupt_disable(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel, DMA_CHXCTL_FTFIE);
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dma_channel_disable(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel);
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dma_deinit(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel);
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#endif
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break;
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case RT_DEVICE_CTRL_CLR_INT:
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/* disable interrupt */
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if (ctrl_arg & RT_DEVICE_FLAG_INT_RX) {
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usart_interrupt_disable(uart->uart_periph, USART_INT_RBNE);
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}
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#ifdef RT_SERIAL_USING_DMA
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/* disable DMA */
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if (ctrl_arg & RT_DEVICE_FLAG_DMA_RX) {
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NVIC_DisableIRQ(uart->dma_rx.dma_irq);
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dma_interrupt_disable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_CHXCTL_HTFIE);
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dma_interrupt_disable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_CHXCTL_FTFIE);
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}
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if(ctrl_arg & RT_DEVICE_FLAG_DMA_TX) {
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NVIC_DisableIRQ(uart->dma_tx.dma_irq);
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dma_interrupt_disable(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel, DMA_CHXCTL_FTFIE);
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}
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#endif
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* enable interrupt */
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if (ctrl_arg & RT_DEVICE_FLAG_INT_RX) {
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usart_interrupt_enable(uart->uart_periph, USART_INT_RBNE);
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}
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break;
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/* USART config */
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case RT_DEVICE_CTRL_CONFIG :
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#ifdef RT_SERIAL_USING_DMA
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if (ctrl_arg & RT_DEVICE_FLAG_DMA_RX) {
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DMA_RX_Configuration(serial);
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} else if (ctrl_arg & RT_DEVICE_FLAG_DMA_TX) {
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DMA_TX_Configuration(serial);
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}
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#endif
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break;
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default :
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break;
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}
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return RT_EOK;
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}
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static int gd32_putc(struct rt_serial_device *serial, char ch)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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while((usart_flag_get(uart->uart_periph, USART_FLAG_TBE) == RESET));
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usart_data_transmit(uart->uart_periph, ch);
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return 1;
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}
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static int gd32_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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ch = -1;
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if (usart_flag_get(uart->uart_periph, USART_FLAG_RBNE) != RESET) {
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ch = usart_data_receive(uart->uart_periph);
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}
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return ch;
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}
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static int gd32_flush(struct rt_serial_device *serial)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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while (!(usart_flag_get(uart->uart_periph, USART_FLAG_TBE) == SET && usart_flag_get(uart->uart_periph, USART_FLAG_TC) == SET));
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return 1;
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}
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static void gd32_start_tx(struct rt_serial_device *serial)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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usart_interrupt_enable(uart->uart_periph, USART_INT_TBE);
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}
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static void gd32_stop_tx(struct rt_serial_device *serial)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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usart_interrupt_disable(uart->uart_periph, USART_INT_TBE);
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}
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#ifdef RT_SERIAL_USING_DMA
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static rt_bool_t gd32_is_dma_txing(struct rt_serial_device *serial)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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return uart->dmaTxing; //RT_FALSE;
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}
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static void gd32_start_dma_tx(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size)
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{
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struct gd32_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = rt_container_of(serial, struct gd32_uart, serial);
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// TODO: 启用 DMA 发送
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DMA_CHM0ADDR(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel) = (uint32_t)(buf);
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DMA_CHCNT(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel) = (uint32_t)(size);
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dma_channel_enable(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel);
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uart->dmaTxing = RT_TRUE;
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}
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|
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static void gd32_stop_dma_tx(struct rt_serial_device *serial)
|
|
{
|
|
struct gd32_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
// TODO: 禁用 DMA 发送
|
|
dma_channel_disable(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel);
|
|
uart->dmaTxing = RT_FALSE;
|
|
}
|
|
#endif
|
|
|
|
static void gd32_enable_interrupt(struct rt_serial_device *serial)
|
|
{
|
|
struct gd32_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
NVIC_EnableIRQ(uart->uart_config.irqn);
|
|
}
|
|
|
|
static void gd32_disable_interrupt(struct rt_serial_device *serial)
|
|
{
|
|
struct gd32_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
NVIC_DisableIRQ(uart->uart_config.irqn);
|
|
}
|
|
|
|
#ifdef RT_SERIAL_USING_DMA
|
|
/**
|
|
* DMA receive done process. This need add to DMA receive done ISR.
|
|
*
|
|
* @param serial serial device
|
|
*/
|
|
static void dma_rx_done_isr(struct rt_serial_device *serial)
|
|
{
|
|
struct gd32_uart *uart;
|
|
rt_size_t dma_cnt;
|
|
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
dma_cnt = RT_SERIAL_DMA_BUFSZ - DMA_CHCNT(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel);
|
|
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (dma_cnt << 8));
|
|
|
|
dma_interrupt_flag_clear(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_INT_FLAG_HTF);
|
|
dma_interrupt_flag_clear(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_INT_FLAG_FTF);
|
|
}
|
|
/**
|
|
* DMA transmit done process. This need add to DMA transmit done ISR.
|
|
*
|
|
* @param serial serial device
|
|
*/
|
|
static void dma_tx_done_isr(struct rt_serial_device *serial)
|
|
{
|
|
struct gd32_uart *uart;
|
|
rt_size_t dma_cnt;
|
|
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
dma_cnt = DMA_CHCNT(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel);
|
|
|
|
if (dma_cnt == 0)
|
|
{
|
|
rt_hw_serial_isr(&uart->serial, RT_SERIAL_EVENT_TX_DMADONE);
|
|
}
|
|
dma_interrupt_flag_clear(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel, DMA_INT_FLAG_FTF);
|
|
}
|
|
#endif
|
|
|
|
/**
|
|
* Uart common interrupt process. This need add to uart ISR.
|
|
*
|
|
* @param serial serial device
|
|
*/
|
|
static void uart_isr(struct rt_serial_device *serial)
|
|
{
|
|
struct gd32_uart *uart;
|
|
#ifdef RT_SERIAL_USING_DMA
|
|
rt_size_t dma_cnt;
|
|
#endif
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
/* UART in mode Receiver -------------------------------------------------*/
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_RBNE) != RESET))
|
|
{
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
|
|
/* Clear RXNE interrupt flag */
|
|
usart_interrupt_flag_clear(uart->uart_periph, USART_INT_FLAG_RBNE);
|
|
}
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_RBNE_ORERR) != RESET))
|
|
{
|
|
usart_data_receive(uart->uart_periph);
|
|
}
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_TBE) != RESET))
|
|
{
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_TX_DONE);
|
|
usart_interrupt_flag_clear(uart->uart_periph, USART_INT_FLAG_TBE);
|
|
}
|
|
#ifdef RT_SERIAL_USING_DMA
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_IDLE) != RESET))
|
|
{
|
|
usart_data_receive(uart->uart_periph);
|
|
dma_cnt = RT_SERIAL_DMA_BUFSZ - DMA_CHCNT(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel);
|
|
rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_DMADONE | (dma_cnt << 8));
|
|
}
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_TC) != RESET))
|
|
{
|
|
usart_interrupt_flag_clear(uart->uart_periph, USART_INT_FLAG_TC);
|
|
}
|
|
#endif
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_PERR) != RESET))
|
|
{
|
|
usart_data_receive(uart->uart_periph);
|
|
}
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_EB) != RESET))
|
|
{
|
|
usart_interrupt_flag_clear(uart->uart_periph, USART_INT_FLAG_EB);
|
|
}
|
|
if ((usart_interrupt_flag_get(uart->uart_periph, USART_INT_FLAG_RT) != RESET))
|
|
{
|
|
usart_interrupt_flag_clear(uart->uart_periph, USART_INT_FLAG_RT);
|
|
}
|
|
}
|
|
|
|
#if defined(BSP_USING_UART0)
|
|
|
|
void USART0_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART0_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
#ifdef RT_SERIAL_USING_DMA
|
|
void DMA1_Channel2_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
dma_rx_done_isr(&uarts[UART0_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
void DMA1_Channel7_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
dma_tx_done_isr(&uarts[UART0_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
#endif
|
|
|
|
#endif /* BSP_USING_UART0 */
|
|
|
|
#if defined(BSP_USING_UART1)
|
|
|
|
void USART1_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART1_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
#endif /* BSP_USING_UART1 */
|
|
|
|
#if defined(BSP_USING_UART2)
|
|
|
|
void USART2_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART2_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
#endif /* BSP_USING_UART2 */
|
|
|
|
#if defined(BSP_USING_UART3)
|
|
|
|
void UART3_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART3_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
#endif /* BSP_USING_UART3 */
|
|
|
|
#if defined(BSP_USING_UART4)
|
|
|
|
void UART4_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART4_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
#endif /* BSP_USING_UART4 */
|
|
|
|
#if defined(BSP_USING_UART5)
|
|
|
|
void USART5_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART5_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
#endif /* BSP_USING_UART5 */
|
|
|
|
#if defined(BSP_USING_UART6)
|
|
|
|
void UART6_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART6_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
#endif /* BSP_USING_UART6 */
|
|
|
|
#if defined(BSP_USING_UART7)
|
|
|
|
void UART7_IRQHandler(void)
|
|
{
|
|
/* enter interrupt */
|
|
rt_interrupt_enter();
|
|
|
|
uart_isr(&uarts[UART7_INDEX].serial);
|
|
|
|
/* leave interrupt */
|
|
rt_interrupt_leave();
|
|
}
|
|
|
|
#endif /* BSP_USING_UART7 */
|
|
|
|
#ifdef RT_SERIAL_USING_DMA
|
|
// TODO: 添加发送 DMA 配置，添加接收 DMA 配置
|
|
static void DMA_RX_Configuration(struct rt_serial_device *serial)
|
|
{
|
|
dma_single_data_parameter_struct dma_init_struct;
|
|
struct gd32_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
/* enable DMA1 */
|
|
rcu_periph_clock_enable(RCU_DMA1);
|
|
|
|
/* deinitialize DMA channel3(USART0 tx) */
|
|
dma_deinit(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel);
|
|
dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
|
|
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
|
dma_init_struct.memory0_addr = (uint32_t)(serial->serial_dma_rx);
|
|
dma_init_struct.number = RT_SERIAL_DMA_BUFSZ;
|
|
dma_init_struct.periph_addr = (uint32_t)(uart->uart_periph + 0x04);
|
|
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
|
dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
|
|
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
|
dma_init_struct.circular_mode = DMA_CIRCULAR_MODE_ENABLE;
|
|
|
|
dma_single_data_mode_init(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, &dma_init_struct);
|
|
dma_channel_subperipheral_select(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, uart->dma_rx.dma_subperi);
|
|
|
|
dma_interrupt_enable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_CHXCTL_HTFIE);
|
|
dma_interrupt_enable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel, DMA_CHXCTL_FTFIE);
|
|
NVIC_SetPriority(uart->dma_rx.dma_irq, 0);
|
|
NVIC_EnableIRQ(uart->dma_rx.dma_irq);
|
|
dma_channel_enable(uart->dma_rx.dma_periph, uart->dma_rx.dma_channel);
|
|
usart_dma_receive_config(uart->uart_periph, USART_DENR_ENABLE);
|
|
}
|
|
static void DMA_TX_Configuration(struct rt_serial_device *serial)
|
|
{
|
|
dma_single_data_parameter_struct dma_init_struct;
|
|
struct gd32_uart *uart;
|
|
|
|
RT_ASSERT(serial != RT_NULL);
|
|
uart = rt_container_of(serial, struct gd32_uart, serial);
|
|
|
|
/* enable DMA1 */
|
|
rcu_periph_clock_enable(RCU_DMA1);
|
|
/* deinitialize DMA channel3(USART0 tx) */
|
|
dma_deinit(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel);
|
|
dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
|
|
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
|
|
// dma_init_struct.memory0_addr = (uint32_t)tx_buffer;
|
|
// dma_init_struct.number = ARRAYNUM(tx_buffer);
|
|
dma_init_struct.periph_addr = (uint32_t)(uart->uart_periph + 0x04);
|
|
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
|
|
dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
|
|
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
|
|
dma_init_struct.circular_mode = DMA_CIRCULAR_MODE_DISABLE;
|
|
|
|
dma_single_data_mode_init(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel, &dma_init_struct);
|
|
dma_channel_subperipheral_select(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel, uart->dma_tx.dma_subperi);
|
|
|
|
dma_interrupt_enable(uart->dma_tx.dma_periph, uart->dma_tx.dma_channel, DMA_CHXCTL_FTFIE);
|
|
NVIC_SetPriority(uart->dma_tx.dma_irq, 0);
|
|
NVIC_EnableIRQ(uart->dma_tx.dma_irq);
|
|
|
|
usart_interrupt_enable(uart->uart_periph, USART_INT_IDLE);
|
|
usart_interrupt_enable(uart->uart_periph, USART_INT_TC);
|
|
usart_dma_transmit_config(uart->uart_periph, USART_DENT_ENABLE);
|
|
}
|
|
#endif
|
|
static const struct rt_uart_ops gd32_uart_ops =
|
|
{
|
|
.init = gd32_init,
|
|
.configure = gd32_configure,
|
|
.control = gd32_control,
|
|
.putc = gd32_putc,
|
|
.getc = gd32_getc,
|
|
.flush = gd32_flush,
|
|
.start_tx = gd32_start_tx,
|
|
.stop_tx = gd32_stop_tx,
|
|
#ifdef RT_SERIAL_USING_DMA
|
|
.is_dma_txing = gd32_is_dma_txing,
|
|
.start_dma_tx = gd32_start_dma_tx,
|
|
.stop_dma_tx = gd32_stop_dma_tx,
|
|
#endif
|
|
.enable_interrupt = gd32_enable_interrupt,
|
|
.disable_interrupt = gd32_disable_interrupt,
|
|
};
|
|
|
|
int rt_hw_usart_init(void)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < sizeof(uarts) / sizeof(uarts[0]); i++)
|
|
{
|
|
uarts[i].serial.ops = &gd32_uart_ops;
|
|
|
|
/* register UART1 device */
|
|
rt_hw_serial_register(&uarts[i].serial,
|
|
uarts[i].uart_config.name,
|
|
RT_DEVICE_FLAG_RDWR |
|
|
RT_DEVICE_FLAG_INT_RX | RT_DEVICE_FLAG_INT_TX
|
|
#ifdef RT_SERIAL_USING_DMA
|
|
| RT_DEVICE_FLAG_DMA_RX | RT_DEVICE_FLAG_DMA_TX
|
|
#endif
|
|
, RT_NULL);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif // RT_USING_SERIAL
|