rt-thread/libcpu/risc-v/virt64/vector_gcc.S
Shell 7528645f59 feat: libcpu/risc-v: unify context on c906, virt64
Changes:
- added config for NEW_CTX_SWITCH
- used new context on c906 sched switch routine
- update _rt_hw_stack_init to fit into NEW_CTX_SWITCH
- separated vector ctx from the generic

Signed-off-by: Shell <smokewood@qq.com>
2024-09-11 18:06:51 -04:00

46 lines
1.0 KiB
ArmAsm

/*
* Copyright (c) 2006-2024, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2018/10/28 Bernard The unify RISC-V porting implementation
* 2018/12/27 Jesven Add SMP support
* 2021/02/02 lizhirui Add userspace support
* 2022/10/22 Shell Support User mode RVV;
* Trimming process switch context
* 2024/09/01 Shell Separated vector ctx from the generic
*/
#include "cpuport.h"
#include "stackframe.h"
/**
* @param a0 pointer to frame bottom
*/
.global rt_hw_vector_ctx_save
rt_hw_vector_ctx_save:
SAVE_VECTOR a0
ret
/**
* @param a0 pointer to frame bottom
*/
.global rt_hw_vector_ctx_restore
rt_hw_vector_ctx_restore:
RESTORE_VECTOR a0
ret
.global rt_hw_disable_vector
rt_hw_disable_vector:
li t0, SSTATUS_VS
csrc sstatus, t0
ret
.global rt_hw_enable_vector
rt_hw_enable_vector:
li t0, SSTATUS_VS
csrs sstatus, t0
ret