65c9947225
* [libcpu] support for ARCH_REMAP_KERNEL These changes introduce support for the ARCH_REMAP_KERNEL configuration, which isolates kernel space in high virtual address regions. This feature is necessary to enhance memory protection and management by segregating user and kernel spaces more effectively. Changes: - Updated conditional macros to check for ARCH_REMAP_KERNEL instead of ARCH_KERNEL_IN_HIGH_VA in board initialization files to reflect the new configuration option. - Modified qemu-virt64-riscv Kconfig and SConstruct files to include and utilize ARCH_REMAP_KERNEL. - Created a new linker script `link_smart.lds` for smart linking in qemu-virt64-riscv. - Updated rtconfig.py to use a more flexible execution path setup. - Enhanced user address space definitions in `lwp_arch.h` to support the new virtual address mappings. - Adjusted kernel memory initialization and mapping logic in `c906/mmu.c` and `virt64/mmu.c` to account for high virtual address regions. - Added Kconfig option to enable ARCH_REMAP_KERNEL for RISCV64 architectures. - Enhanced memory setup functions to support new mapping scheme, including updates to early page table setup and address relocation logic. These modifications ensure that the system can utilize high memory addresses for the kernel, improving memory isolation and system stability. Signed-off-by: Shell <smokewood@qq.com> * fixup: CI run failed * bsp: default config without using smart * fixup: static checks * restore rt_hw_mmu_kernel_map_init for D1 --------- Signed-off-by: Shell <smokewood@qq.com>
133 lines
2.6 KiB
ArmAsm
133 lines
2.6 KiB
ArmAsm
/*
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* Copyright (c) 2006-2018, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018/10/01 Bernard The first version
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* 2018/12/27 Jesven Add SMP support
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* 2020/6/12 Xim Port to QEMU and remove SMP support
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*/
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#include <encoding.h>
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#include <cpuport.h>
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.data
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.global boot_hartid /* global varible rt_boot_hartid in .data section */
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boot_hartid:
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.word 0xdeadbeef
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.global _start
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.section ".start", "ax"
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_start:
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j 1f
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.word 0xdeadbeef
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.align 3
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.global g_wake_up
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g_wake_up:
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.dword 1
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.dword 0
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1:
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/* save hartid */
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la t0, boot_hartid /* global varible rt_boot_hartid */
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mv t1, a0 /* get hartid in S-mode frome a0 register */
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sw t1, (t0) /* store t1 register low 4 bits in memory address which is stored in t0 */
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/* clear Interrupt Registers */
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csrw sie, 0
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csrw sip, 0
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/* set Trap Vector Base Address Register */
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la t0, trap_entry
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csrw stvec, t0
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li x1, 0
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li x2, 0
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li x3, 0
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li x4, 0
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li x5, 0
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li x6, 0
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li x7, 0
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li x8, 0
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li x9, 0
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li x10,0
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li x11,0
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li x12,0
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li x13,0
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li x14,0
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li x15,0
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li x16,0
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li x17,0
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li x18,0
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li x19,0
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li x20,0
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li x21,0
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li x22,0
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li x23,0
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li x24,0
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li x25,0
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li x26,0
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li x27,0
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li x28,0
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li x29,0
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li x30,0
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li x31,0
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/* set to disable FPU */
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li t0, SSTATUS_FS + SSTATUS_VS
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csrc sstatus, t0
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li t0, SSTATUS_SUM
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csrs sstatus, t0
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.option push
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.option norelax
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la gp, __global_pointer$
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.option pop
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/* removed SMP support here */
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la sp, __stack_start__
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li t0, __STACKSIZE__
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add sp, sp, t0
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/**
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* sscratch is always zero on kernel mode
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*/
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csrw sscratch, zero
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call init_bss
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#ifdef ARCH_MM_MMU
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call rt_hw_mem_setup_early
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call rt_kmem_pvoff
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/* a0 := pvoff */
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beq a0, zero, 1f
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/* relocate pc */
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la x1, _after_pc_relocation
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sub x1, x1, a0
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ret
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_after_pc_relocation:
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/* relocate gp */
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sub gp, gp, a0
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/* relocate context: sp */
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la sp, __stack_start__
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li t0, __STACKSIZE__
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add sp, sp, t0
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/* reset s0-fp */
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mv s0, zero
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/* relocate stvec */
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la t0, trap_entry
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csrw stvec, t0
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1:
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#endif
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call sbi_init
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call primary_cpu_entry
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_never_return_here:
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j .
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.global _start_link_addr
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_start_link_addr:
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.dword __text_start
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