84 lines
3.5 KiB
C
84 lines
3.5 KiB
C
/*******************************************************************************
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* (c) Copyright 2011-2013 Microsemi SoC Products Group. All rights reserved.
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*
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* Register bit offsets and masks defintions for SmartFusion2 MSS MMUART.
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*
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* SVN $Revision: 5610 $
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* SVN $Date: 2013-04-05 18:49:30 +0530 (Fri, 05 Apr 2013) $
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*/
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#ifndef MSS_UART_REGS_H_
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#define MSS_UART_REGS_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*******************************************************************************
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Register Bit definitions
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*/
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/* Line Control register bit definitions */
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#define SB 6u /* Set break */
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#define DLAB 7u /* Divisor latch access bit */
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/* FIFO Control register bit definitions */
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#define RXRDY_TXRDYN_EN 0u /* Enable TXRDY and RXRDY signals */
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#define CLEAR_RX_FIFO 1u /* Clear receiver FIFO */
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#define CLEAR_TX_FIFO 2u /* Clear transimtter FIFO */
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#define RDYMODE 3u /* Mode 0 or Mode 1 for TXRDY and RXRDY */
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/* Modem Control register bit definitions */
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#define LOOP 4u /* Local loopback */
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#define RLOOP 5u /* Remote loopback */
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#define ECHO 6u /* Automatic echo */
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#define RLOOP_MASK 0x6u /* Remote loopback & Automatic echo*/
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/* Line Status register bit definitions */
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#define DR 0u /* Data ready */
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#define THRE 5u /* Transmitter holding register empty */
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#define TEMT 6u /* Transitter empty */
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/* Interrupt Enable register bit definitions */
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#define ERBFI 0u /* Enable receiver buffer full interrupt */
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#define ETBEI 1u /* Enable transmitter buffer empty interrupt */
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#define ELSI 2u /* Enable line status interrupt */
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#define EDSSI 3u /* Enable modem status interrupt */
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/* Multimode register 0 bit definitions */
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#define ELIN 3u /* Enable LIN header detection */
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#define ETTG 5u /* Enable transmitter time guard */
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#define ERTO 6u /* Enable receiver time-out */
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#define EFBR 7u /* Enable fractional baud rate mode */
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/* Multimode register 1 bit definitions */
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#define E_MSB_RX 0u /* MSB / LSB first for receiver */
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#define E_MSB_TX 1u /* MSB / LSB first for transmitter */
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#define EIRD 2u /* Enable IrDA modem */
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#define EIRX 3u /* Input polarity for IrDA modem */
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#define EITX 4u /* Output polarity for IrDA modem */
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#define EITP 5u /* Output pulse width for IrDA modem */
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/* Multimode register 2 bit definitions */
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#define EERR 0u /* Enable ERR / NACK during stop time */
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#define EAFM 1u /* Enable 9-bit address flag mode */
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#define EAFC 2u /* Enable address flag clear */
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#define ESWM 3u /* Enable single wire half-duplex mode */
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/* Multimode Interrupt Enable register and
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Multimode Interrupt Identification register definitions */
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#define ERTOI 0u /* Enable receiver timeout interrupt */
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#define ENACKI 1u /* Enable NACK / ERR interrupt */
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#define EPID_PEI 2u /* Enable PID parity error interrupt */
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#define ELINBI 3u /* Enable LIN break interrupt */
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#define ELINSI 4u /* Enable LIN sync detection interrupt */
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#ifdef __cplusplus
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}
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#endif
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#endif /* MSS_UART_REGS_H_ */
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