227 lines
5.3 KiB
C
227 lines
5.3 KiB
C
/*
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* File : interrupt.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2010-10-15 Bernard first version
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* 2010-10-15 lgnq modified for LS1B
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* 2013-03-29 aozima Modify the interrupt interface implementations.
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* 2015-07-06 chinesebear modified for loongson 1c
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include "ls1c.h"
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#include "ls1c_public.h"
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#define MAX_INTR (LS1C_NR_IRQS)
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extern rt_uint32_t rt_interrupt_nest;
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rt_uint32_t rt_interrupt_from_thread;
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rt_uint32_t rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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static struct rt_irq_desc irq_handle_table[MAX_INTR];
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void rt_interrupt_dispatch(void *ptreg);
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void rt_hw_timer_handler();
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static struct ls1c_intc_regs volatile *ls1c_hw0_icregs
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= (struct ls1c_intc_regs volatile *)(LS1C_INTREG_BASE);
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/**
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* @addtogroup Loongson LS1B
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*/
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/*@{*/
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static void rt_hw_interrupt_handler(int vector, void *param)
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{
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rt_kprintf("Unhandled interrupt %d occured!!!\n", vector);
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}
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/**
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* This function will initialize hardware interrupt
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*/
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void rt_hw_interrupt_init(void)
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{
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rt_int32_t idx;
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rt_int32_t i;
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rt_uint32_t c0_status = 0;
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// 设置协处理器0的状态寄存器SR的IM7-2,允许中断
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c0_status = read_c0_status();
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c0_status |= 0xFC00;
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write_c0_status(c0_status);
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// 龙芯1c的中断分为五组
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for (i=0; i<5; i++)
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{
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/* disable */
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(ls1c_hw0_icregs+i)->int_en = 0x0;
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/* pci active low */
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(ls1c_hw0_icregs+i)->int_pol = -1; //must be done here 20110802 lgnq
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/* make all interrupts level triggered */
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(ls1c_hw0_icregs+i)->int_edge = 0x00000000;
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/* mask all interrupts */
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(ls1c_hw0_icregs+i)->int_clr = 0xffffffff;
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}
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rt_memset(irq_handle_table, 0x00, sizeof(irq_handle_table));
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for (idx = 0; idx < MAX_INTR; idx ++)
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{
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irq_handle_table[idx].handler = rt_hw_interrupt_handler;
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}
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/* init interrupt nest, and context in thread sp */
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rt_interrupt_nest = 0;
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rt_interrupt_from_thread = 0;
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rt_interrupt_to_thread = 0;
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rt_thread_switch_interrupt_flag = 0;
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}
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/**
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* This function will mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_mask(int vector)
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{
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/* mask interrupt */
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(ls1c_hw0_icregs+(vector>>5))->int_en &= ~(1 << (vector&0x1f));
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}
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/**
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* This function will un-mask a interrupt.
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* @param vector the interrupt number
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*/
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void rt_hw_interrupt_umask(int vector)
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{
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(ls1c_hw0_icregs+(vector>>5))->int_en |= (1 << (vector&0x1f));
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}
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/**
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* This function will install a interrupt service routine to a interrupt.
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* @param vector the interrupt number
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* @param new_handler the interrupt service routine to be installed
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* @param old_handler the old interrupt service routine
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*/
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rt_isr_handler_t rt_hw_interrupt_install(int vector, rt_isr_handler_t handler,
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void *param, const char *name)
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{
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rt_isr_handler_t old_handler = RT_NULL;
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if (vector >= 0 && vector < MAX_INTR)
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{
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old_handler = irq_handle_table[vector].handler;
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#ifdef RT_USING_INTERRUPT_INFO
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rt_strncpy(irq_handle_table[vector].name, name, RT_NAME_MAX);
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#endif /* RT_USING_INTERRUPT_INFO */
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irq_handle_table[vector].handler = handler;
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irq_handle_table[vector].param = param;
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}
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return old_handler;
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}
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/**
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* 执行中断处理函数
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* @IRQn 中断号
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*/
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void ls1c_do_IRQ(int IRQn)
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{
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rt_isr_handler_t irq_func;
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void *param;
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// 找到中断处理函数
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irq_func = irq_handle_table[IRQn].handler;
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param = irq_handle_table[IRQn].param;
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// 执行中断处理函数
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irq_func(IRQn, param);
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#ifdef RT_USING_INTERRUPT_INFO
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irq_handle_table[IRQn].counter++;
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#endif
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return ;
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}
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void ls1c_irq_dispatch(int n)
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{
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rt_uint32_t intstatus, irq;
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/* Receive interrupt signal, compute the irq */
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intstatus = (ls1c_hw0_icregs+n)->int_isr & (ls1c_hw0_icregs+n)->int_en;
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if (0 == intstatus)
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return ;
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// 执行中断处理函数
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irq = ls1c_ffs(intstatus) - 1;
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ls1c_do_IRQ((n<<5) + irq);
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/* ack interrupt */
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(ls1c_hw0_icregs+n)->int_clr |= (1 << irq);
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return ;
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}
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void rt_interrupt_dispatch(void *ptreg)
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{
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int irq;
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void *param;
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rt_isr_handler_t irq_func;
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static rt_uint32_t status = 0;
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rt_uint32_t c0_status;
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rt_uint32_t c0_cause;
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volatile rt_uint32_t cause_im;
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volatile rt_uint32_t status_im;
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rt_uint32_t pending_im;
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/* check os timer */
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c0_status = read_c0_status();
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c0_cause = read_c0_cause();
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cause_im = c0_cause & ST0_IM;
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status_im = c0_status & ST0_IM;
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pending_im = cause_im & status_im;
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if (pending_im & CAUSEF_IP7)
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{
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rt_hw_timer_handler();
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}
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else if (pending_im & CAUSEF_IP2)
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{
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ls1c_irq_dispatch(0);
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}
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else if (pending_im & CAUSEF_IP3)
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{
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ls1c_irq_dispatch(1);
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}
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else if (pending_im & CAUSEF_IP4)
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{
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ls1c_irq_dispatch(2);
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}
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else if (pending_im & CAUSEF_IP5)
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{
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ls1c_irq_dispatch(3);
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}
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else if (pending_im & CAUSEF_IP6)
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{
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ls1c_irq_dispatch(4);
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}
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}
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/*@}*/
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