204 lines
9.4 KiB
C
204 lines
9.4 KiB
C
//###########################################################################
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//
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// FILE: F2837xD_ecap.h
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//
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// TITLE: ECAP Register Definitions.
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//
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//###########################################################################
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// $TI Release: F2837xD Support Library v3.05.00.00 $
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// $Release Date: Tue Jun 26 03:15:23 CDT 2018 $
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// $Copyright:
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// Copyright (C) 2013-2018 Texas Instruments Incorporated - http://www.ti.com/
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions
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// are met:
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//
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// Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the
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// distribution.
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//
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// Neither the name of Texas Instruments Incorporated nor the names of
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// its contributors may be used to endorse or promote products derived
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// from this software without specific prior written permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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// $
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//###########################################################################
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#ifndef __F2837xD_ECAP_H__
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#define __F2837xD_ECAP_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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//---------------------------------------------------------------------------
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// ECAP Individual Register Bit Definitions:
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struct ECCTL1_BITS { // bits description
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Uint16 CAP1POL:1; // 0 Capture Event 1 Polarity select
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Uint16 CTRRST1:1; // 1 Counter Reset on Capture Event 1
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Uint16 CAP2POL:1; // 2 Capture Event 2 Polarity select
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Uint16 CTRRST2:1; // 3 Counter Reset on Capture Event 2
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Uint16 CAP3POL:1; // 4 Capture Event 3 Polarity select
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Uint16 CTRRST3:1; // 5 Counter Reset on Capture Event 3
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Uint16 CAP4POL:1; // 6 Capture Event 4 Polarity select
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Uint16 CTRRST4:1; // 7 Counter Reset on Capture Event 4
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Uint16 CAPLDEN:1; // 8 Enable Loading CAP1-4 regs on a Cap Event
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Uint16 PRESCALE:5; // 13:9 Event Filter prescale select
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Uint16 FREE_SOFT:2; // 15:14 Emulation mode
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};
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union ECCTL1_REG {
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Uint16 all;
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struct ECCTL1_BITS bit;
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};
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struct ECCTL2_BITS { // bits description
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Uint16 CONT_ONESHT:1; // 0 Continuous or one-shot
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Uint16 STOP_WRAP:2; // 2:1 Stop value for one-shot, Wrap for continuous
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Uint16 REARM:1; // 3 One-shot re-arm
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Uint16 TSCTRSTOP:1; // 4 TSCNT counter stop
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Uint16 SYNCI_EN:1; // 5 Counter sync-in select
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Uint16 SYNCO_SEL:2; // 7:6 Sync-out mode
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Uint16 SWSYNC:1; // 8 SW forced counter sync
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Uint16 CAP_APWM:1; // 9 CAP/APWM operating mode select
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Uint16 APWMPOL:1; // 10 APWM output polarity select
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Uint16 rsvd1:5; // 15:11 Reserved
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};
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union ECCTL2_REG {
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Uint16 all;
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struct ECCTL2_BITS bit;
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};
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struct ECEINT_BITS { // bits description
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Uint16 rsvd1:1; // 0 Reserved
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Uint16 CEVT1:1; // 1 Capture Event 1 Interrupt Enable
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Uint16 CEVT2:1; // 2 Capture Event 2 Interrupt Enable
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Uint16 CEVT3:1; // 3 Capture Event 3 Interrupt Enable
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Uint16 CEVT4:1; // 4 Capture Event 4 Interrupt Enable
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Uint16 CTROVF:1; // 5 Counter Overflow Interrupt Enable
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Uint16 CTR_EQ_PRD:1; // 6 Period Equal Interrupt Enable
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Uint16 CTR_EQ_CMP:1; // 7 Compare Equal Interrupt Enable
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Uint16 rsvd2:8; // 15:8 Reserved
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};
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union ECEINT_REG {
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Uint16 all;
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struct ECEINT_BITS bit;
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};
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struct ECFLG_BITS { // bits description
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Uint16 INT:1; // 0 Global Flag
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Uint16 CEVT1:1; // 1 Capture Event 1 Interrupt Flag
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Uint16 CEVT2:1; // 2 Capture Event 2 Interrupt Flag
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Uint16 CEVT3:1; // 3 Capture Event 3 Interrupt Flag
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Uint16 CEVT4:1; // 4 Capture Event 4 Interrupt Flag
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Uint16 CTROVF:1; // 5 Counter Overflow Interrupt Flag
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Uint16 CTR_PRD:1; // 6 Period Equal Interrupt Flag
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Uint16 CTR_CMP:1; // 7 Compare Equal Interrupt Flag
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Uint16 rsvd1:8; // 15:8 Reserved
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};
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union ECFLG_REG {
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Uint16 all;
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struct ECFLG_BITS bit;
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};
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struct ECCLR_BITS { // bits description
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Uint16 INT:1; // 0 ECAP Global Interrupt Status Clear
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Uint16 CEVT1:1; // 1 Capture Event 1 Status Clear
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Uint16 CEVT2:1; // 2 Capture Event 2 Status Clear
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Uint16 CEVT3:1; // 3 Capture Event 3 Status Clear
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Uint16 CEVT4:1; // 4 Capture Event 4 Status Clear
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Uint16 CTROVF:1; // 5 Counter Overflow Status Clear
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Uint16 CTR_PRD:1; // 6 Period Equal Status Clear
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Uint16 CTR_CMP:1; // 7 Compare Equal Status Clear
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Uint16 rsvd1:8; // 15:8 Reserved
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};
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union ECCLR_REG {
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Uint16 all;
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struct ECCLR_BITS bit;
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};
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struct ECFRC_BITS { // bits description
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Uint16 rsvd1:1; // 0 Reserved
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Uint16 CEVT1:1; // 1 Capture Event 1 Force Interrupt
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Uint16 CEVT2:1; // 2 Capture Event 2 Force Interrupt
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Uint16 CEVT3:1; // 3 Capture Event 3 Force Interrupt
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Uint16 CEVT4:1; // 4 Capture Event 4 Force Interrupt
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Uint16 CTROVF:1; // 5 Counter Overflow Force Interrupt
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Uint16 CTR_PRD:1; // 6 Period Equal Force Interrupt
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Uint16 CTR_CMP:1; // 7 Compare Equal Force Interrupt
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Uint16 rsvd2:8; // 15:8 Reserved
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};
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union ECFRC_REG {
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Uint16 all;
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struct ECFRC_BITS bit;
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};
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struct ECAP_REGS {
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Uint32 TSCTR; // Time-Stamp Counter
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Uint32 CTRPHS; // Counter Phase Offset Value Register
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Uint32 CAP1; // Capture 1 Register
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Uint32 CAP2; // Capture 2 Register
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Uint32 CAP3; // Capture 3 Register
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Uint32 CAP4; // Capture 4 Register
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Uint16 rsvd1[8]; // Reserved
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union ECCTL1_REG ECCTL1; // Capture Control Register 1
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union ECCTL2_REG ECCTL2; // Capture Control Register 2
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union ECEINT_REG ECEINT; // Capture Interrupt Enable Register
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union ECFLG_REG ECFLG; // Capture Interrupt Flag Register
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union ECCLR_REG ECCLR; // Capture Interrupt Clear Register
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union ECFRC_REG ECFRC; // Capture Interrupt Force Register
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Uint16 rsvd2[6]; // Reserved
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};
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//---------------------------------------------------------------------------
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// ECAP External References & Function Declarations:
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//
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#ifdef CPU1
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extern volatile struct ECAP_REGS ECap1Regs;
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extern volatile struct ECAP_REGS ECap2Regs;
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extern volatile struct ECAP_REGS ECap3Regs;
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extern volatile struct ECAP_REGS ECap4Regs;
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extern volatile struct ECAP_REGS ECap5Regs;
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extern volatile struct ECAP_REGS ECap6Regs;
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#endif
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#ifdef CPU2
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extern volatile struct ECAP_REGS ECap1Regs;
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extern volatile struct ECAP_REGS ECap2Regs;
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extern volatile struct ECAP_REGS ECap3Regs;
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extern volatile struct ECAP_REGS ECap4Regs;
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extern volatile struct ECAP_REGS ECap5Regs;
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extern volatile struct ECAP_REGS ECap6Regs;
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#endif
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#ifdef __cplusplus
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}
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#endif /* extern "C" */
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#endif
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//===========================================================================
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// End of file.
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//===========================================================================
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