246 lines
7.6 KiB
C
246 lines
7.6 KiB
C
/****************************************************************************//**
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* @file ebi.c
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* @version V0.10
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* $Revision: 8 $
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* $Date: 15/06/23 5:40p $
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* @brief NUC472/NUC442 EBI driver source file
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*
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* @note
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* Copyright (C) 2014 Nuvoton Technology Corp. All rights reserved.
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*****************************************************************************/
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#include "NUC472_442.h"
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#include "ebi.h"
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/** @addtogroup NUC472_442_Device_Driver NUC472/NUC442 Device Driver
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@{
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*/
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/** @addtogroup NUC472_442_EBI_Driver EBI Driver
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@{
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*/
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/** @addtogroup NUC472_442_EBI_EXPORTED_FUNCTIONS EBI Exported Functions
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@{
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*/
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/**
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* @brief Initialize EBI for Bank 0~3
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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* - \ref EBI_BANK2
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* - \ref EBI_BANK3
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* @param[in] u32DataWidth Data bus width. Valid values are:
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* - \ref EBI_BUSWIDTH_8BIT
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* - \ref EBI_BUSWIDTH_16BIT
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* @param[in] u32TimingClass Default timing configuration. Valid values are:
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* - \ref EBI_TIMING_FASTEST
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* - \ref EBI_TIMING_VERYFAST
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* - \ref EBI_TIMING_FAST
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* - \ref EBI_TIMING_NORMAL
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* - \ref EBI_TIMING_SLOW
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* - \ref EBI_TIMING_VERYSLOW
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* - \ref EBI_TIMING_SLOWEST
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* @param[in] u32BusMode Enable EBI separate mode. Valid values are:
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* - \ref EBI_SEPARATEMODE_ENABLE
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* - \ref EBI_SEPARATEMODE_DISABLE
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* @param[in] u32CSActiveLevel CS is active High/Low. Valid values are:
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* - \ref EBI_CS_ACTIVE_HIGH
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* - \ref EBI_CS_ACTIVE_LOW
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* @return none
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*/
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void EBI_Open(uint32_t u32Bank, uint32_t u32DataWidth, uint32_t u32TimingClass, uint32_t u32BusMode, uint32_t u32CSActiveLevel)
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{
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/* Enable EBI channel */
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EBI->TCTL[u32Bank] |= EBI_TCTL_CSEN_Msk;
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/* Configure data bus to 8 or 16bit */
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if(u32DataWidth == EBI_BUSWIDTH_8BIT)
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EBI->TCTL[u32Bank] &= ~EBI_TCTL_DW16_Msk;
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else
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EBI->TCTL[u32Bank] |= EBI_TCTL_DW16_Msk;
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/* Enable separate mode */
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if(u32BusMode)
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EBI->TCTL[u32Bank] |= EBI_TCTL_SEPEN_Msk;
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else
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EBI->TCTL[u32Bank] &= ~EBI_TCTL_SEPEN_Msk;
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/* Setup active level of chip select */
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switch(u32Bank) {
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case EBI_BANK0:
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if(u32CSActiveLevel)
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EBI->CTL |= (0x1ul << EBI_CTL_CSPOLINV_Pos);
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else
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EBI->CTL &= ~(0x1ul << EBI_CTL_CSPOLINV_Pos);
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break;
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case EBI_BANK1:
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if(u32CSActiveLevel)
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EBI->CTL |= (0x2ul << EBI_CTL_CSPOLINV_Pos);
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else
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EBI->CTL &= ~(0x2ul << EBI_CTL_CSPOLINV_Pos);
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break;
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case EBI_BANK2:
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if(u32CSActiveLevel)
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EBI->CTL |= (0x4ul << EBI_CTL_CSPOLINV_Pos);
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else
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EBI->CTL &= ~(0x4ul << EBI_CTL_CSPOLINV_Pos);
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break;
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case EBI_BANK3:
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if(u32CSActiveLevel)
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EBI->CTL |= (0x8ul << EBI_CTL_CSPOLINV_Pos);
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else
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EBI->CTL &= ~(0x8ul << EBI_CTL_CSPOLINV_Pos);
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break;
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}
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/* Clear R2R/R2W/R2X/TAHD/TACC/TALE entries for safety */
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EBI->TCTL[u32Bank] &= ~0x0F0FF7FF;
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/* Setup EBI timing */
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switch(u32TimingClass) {
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case EBI_TIMING_FASTEST:
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_1 << 8);
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break;
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case EBI_TIMING_VERYFAST:
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_1 << 8);
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EBI->TCTL[u32Bank] |= 0x0303331B;
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break;
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case EBI_TIMING_FAST:
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_2 << 8);
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break;
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case EBI_TIMING_NORMAL:
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_2 << 8);
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EBI->TCTL[u32Bank] |= 0x0303331B;
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break;
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case EBI_TIMING_SLOW:
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_2 << 8);
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EBI->TCTL[u32Bank] |= 0x0707773F;
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break;
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case EBI_TIMING_VERYSLOW:
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_4 << 8);
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EBI->TCTL[u32Bank] |= 0x0707773F;
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break;
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case EBI_TIMING_SLOWEST:
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | ( EBI_MCLKDIV_8 << 8);
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EBI->TCTL[u32Bank] |= 0x0707773F;
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break;
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}
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}
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/**
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* @brief Disable EBI for bank 0~3.
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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* - \ref EBI_BANK2
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* - \ref EBI_BANK3
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* @return none
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*/
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void EBI_Close(uint32_t u32Bank)
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{
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EBI->TCTL[u32Bank] &= ~EBI_TCTL_CSEN_Msk;
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}
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/**
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* @brief Set EBI bus timings
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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* - \ref EBI_BANK2
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* - \ref EBI_BANK3
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* @param[in] u32TimingConfig The new EBI timing settings.
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* @param[in] u32MclkDiv Divider for MCLK. Valid values are:
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* - \ref EBI_MCLKDIV_1
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* - \ref EBI_MCLKDIV_2
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* - \ref EBI_MCLKDIV_4
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* - \ref EBI_MCLKDIV_8
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* - \ref EBI_MCLKDIV_16
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* - \ref EBI_MCLKDIV_32
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* @return none
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*/
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void EBI_SetBusTiming(uint32_t u32Bank, uint32_t u32TimingConfig, uint32_t u32MclkDiv)
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{
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EBI->CTL = (EBI->CTL & ~EBI_CTL_MCLKDIV_Msk) | (u32MclkDiv << EBI_CTL_MCLKDIV_Pos);
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EBI->TCTL[u32Bank] |= (u32TimingConfig & 0x0F0FF7FF);
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}
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/**
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* @brief Enable encrypt/decrypt function and set key for EBI bank 0~3.
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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* - \ref EBI_BANK2
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* - \ref EBI_BANK3
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* @param[in] *u32Key 128-bits encrypt/decrypt key array.
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* @return none
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*/
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void EBI_EnableCrypto(uint32_t u32Bank, uint32_t *u32Key)
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{
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switch(u32Bank) {
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case EBI_BANK0:
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EBI->CTL |= (0x1ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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case EBI_BANK1:
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EBI->CTL |= (0x2ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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case EBI_BANK2:
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EBI->CTL |= (0x4ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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case EBI_BANK3:
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EBI->CTL |= (0x8ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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}
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/* Setup 128-bits key */
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EBI->KEY0 = u32Key[0];
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EBI->KEY1 = u32Key[1];
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EBI->KEY2 = u32Key[2];
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EBI->KEY3 = u32Key[3];
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}
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/**
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* @brief Disable encrypt/decrypt function for EBI bank 0~3.
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* @param[in] u32Bank Bank number for EBI. Valid values are:
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* - \ref EBI_BANK0
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* - \ref EBI_BANK1
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* - \ref EBI_BANK2
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* - \ref EBI_BANK3
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* @return none
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*/
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void EBI_DisbleCrypto(uint32_t u32Bank)
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{
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switch(u32Bank) {
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case EBI_BANK0:
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EBI->CTL &= ~(0x1ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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case EBI_BANK1:
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EBI->CTL &= ~(0x2ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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case EBI_BANK2:
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EBI->CTL &= ~(0x4ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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case EBI_BANK3:
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EBI->CTL &= ~(0x8ul << EBI_CTL_CRYPTOEN_Pos);
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break;
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}
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}
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/*@}*/ /* end of group NUC472_442_EBI_EXPORTED_FUNCTIONS */
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/*@}*/ /* end of group NUC472_442_EBI_Driver */
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/*@}*/ /* end of group NUC472_442_Device_Driver */
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/*** (C) COPYRIGHT 2014 Nuvoton Technology Corp. ***/
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