114 lines
3.9 KiB
C
114 lines
3.9 KiB
C
/*
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*******************************************************************************
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* Copyright(C) NEC Electronics Corporation 2010
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* All rights reserved by NEC Electronics Corporation.
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* This program should be used on your own responsibility.
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* NEC Electronics Corporation assumes no responsibility for any losses
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* incurred by customers or third parties arising from the use of this file.
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*
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* This device driver was created by Applilet3 for V850ES/Jx3
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* 32-Bit Single-Chip Microcontrollers
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* Filename: CG_system.c
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* Abstract: This file implements device driver for System module.
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* APIlib: Applilet3 for V850ES/Jx3 V2.01 [20 Apr 2010]
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* Device: uPD70F3746
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* Compiler: IAR Systems ICCV850
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* Creation date: 6/26/2010
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*******************************************************************************
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*/
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/*
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*******************************************************************************
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** Include files
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*******************************************************************************
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*/
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#include "CG_macrodriver.h"
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#include "CG_system.h"
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/* Start user code for include. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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#include "CG_userdefine.h"
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/*
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*******************************************************************************
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** Global define
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*******************************************************************************
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*/
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/* Start user code for global. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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void clock_pll_mode(void)
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{
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/* CPU operation clock selection */
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/* Set PLL mode. */
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PLLCTL = 0x03; /* bit 1: CPU clock selection (PLL mode/clock-through mode selection) */
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/* 1: PLL mode, 0: Clock-through mode */
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__asm("_loop: set1 1,0xF82C[r0]"); //__IO_REG8_BIT( PLLCTL, 0xFFFFF82C, __READ_WRITE )
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__asm(" tst1 1,0xF82C[r0]"); //__IO_REG8_BIT( PLLCTL, 0xFFFFF82C, __READ_WRITE )
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__asm(" bz _loop");
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return;
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}
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void clock_pcc_mode(void)
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{
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/* DMA is forcibly terminated in this sample since DMA transfer must be terminated
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before data is set to a special register. */
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if(TC0 == 0 && E00 == 1){ /* DMA0 transfer judgment */
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INIT0 = 1; /* DMA0 forcible termination */
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}
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if(TC1 == 0 && E11 == 1){ /* DMA1 transfer judgment */
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INIT1 = 1; /* DMA1 forcible termination */
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}
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if(TC2 == 0 && E22 == 1){ /* DMA2 transfer judgment */
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INIT2 = 1; /* DMA2 forcible termination */
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}
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if(TC3 == 0 && E33 == 1){ /* DMA3 transfer judgment */
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INIT3 = 1; /* DMA3 forcible termination */
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}
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/* The PCC register is a special register. Data can be written to this register only in a combination of specific sequences. */
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/* bit 1, bit 0: Clock selection, 11: fxx/8, 10: fxx/4, 01: fxx/2, 00: fxx */
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/* Clock selection: fxx */
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__asm("mov 0x00, r10"); /* Set general-purpose register data to be set to special register. */
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__asm("st.b r10, 0xF1FC[r0]"); /* Write to PRCMD register. */ //__IO_REG8(PRCMD, 0xFFFFF1FC, __WRITE)
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__asm("st.b r10, 0xF828[r0]"); /* Set PCC register. */ //__IO_REG8_BIT(PCC, 0xFFFFF828, __READ_WRITE)
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__asm("nop"); /* Insert five or more NOP instructions. */
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__asm("nop");
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__asm("nop");
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__asm("nop");
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__asm("nop");
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return;
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}
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/*
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**-----------------------------------------------------------------------------
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**
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** Abstract:
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** This function initializes the clock generator module.
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**
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** Parameters:
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** None
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**
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** Returns:
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** None
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**
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**-----------------------------------------------------------------------------
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*/
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void CLOCK_Init(void)
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{
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DI(); /* Maskable interrupt disabled */
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do{
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clock_pll_mode(); /* PLL mode setting function */
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clock_pcc_mode(); /* PCC register setting function */
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}while(PRERR); /* Written in correct sequence? */
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}
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/* Start user code for adding. Do not edit comment generated here */
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/* End user code. Do not edit comment generated here */
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