57382 lines
1.9 MiB
57382 lines
1.9 MiB
//*****************************************************************************
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//
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// pin_map.h - Mapping of peripherals to pins for all parts.
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//
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// Copyright (c) 2007-2011 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Texas Instruments (TI) is supplying this software for use solely and
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// exclusively on TI's microcontroller products. The software is owned by
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// TI and/or its suppliers, and is protected under applicable copyright
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// laws. You may not combine this software with "viral" open-source
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// software in order to form a larger program.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
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// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
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// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
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// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
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// DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
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//
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//*****************************************************************************
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#ifndef __PIN_MAP_H__
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#define __PIN_MAP_H__
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//*****************************************************************************
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//
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// LM3S101 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S101
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0O_PORT GPIO_PORTB_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSICLK_PORT GPIO_PORTA_BASE
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#define SSICLK_PIN GPIO_PIN_2
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#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIFSS_PORT GPIO_PORTA_BASE
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#define SSIFSS_PIN GPIO_PIN_3
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#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIRX_PORT GPIO_PORTA_BASE
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#define SSIRX_PIN GPIO_PIN_4
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#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSITX_PORT GPIO_PORTA_BASE
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#define SSITX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define 32KHZ_PERIPH SYSCTL_PERIPH_GPIOB
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#define 32KHZ_PORT GPIO_PORTB_BASE
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#define 32KHZ_PIN GPIO_PIN_1
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#endif // PART_LM3S101
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//*****************************************************************************
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//
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// LM3S102 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S102
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0O_PORT GPIO_PORTB_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP1_PORT GPIO_PORTB_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2CSCL_PORT GPIO_PORTB_BASE
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#define I2CSCL_PIN GPIO_PIN_2
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#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2CSDA_PORT GPIO_PORTB_BASE
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#define I2CSDA_PIN GPIO_PIN_3
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#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSICLK_PORT GPIO_PORTA_BASE
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#define SSICLK_PIN GPIO_PIN_2
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#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIFSS_PORT GPIO_PORTA_BASE
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#define SSIFSS_PIN GPIO_PIN_3
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#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIRX_PORT GPIO_PORTA_BASE
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#define SSIRX_PIN GPIO_PIN_4
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#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSITX_PORT GPIO_PORTA_BASE
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#define SSITX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define 32KHZ_PERIPH SYSCTL_PERIPH_GPIOB
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#define 32KHZ_PORT GPIO_PORTB_BASE
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#define 32KHZ_PIN GPIO_PIN_1
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#endif // PART_LM3S102
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//*****************************************************************************
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//
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// LM3S300 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S300
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1O_PORT GPIO_PORTC_BASE
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#define C1O_PIN GPIO_PIN_5
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2O_PORT GPIO_PORTC_BASE
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#define C2O_PIN GPIO_PIN_6
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#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_MINUS_PORT GPIO_PORTC_BASE
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#define C2_MINUS_PIN GPIO_PIN_7
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#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_PLUS_PORT GPIO_PORTC_BASE
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#define C2_PLUS_PIN GPIO_PIN_6
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP0_PORT GPIO_PORTD_BASE
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#define CCP0_PIN GPIO_PIN_4
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP1_PORT GPIO_PORTE_BASE
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#define CCP1_PIN GPIO_PIN_3
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP2_PORT GPIO_PORTD_BASE
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#define CCP2_PIN GPIO_PIN_5
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP3_PORT GPIO_PORTE_BASE
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#define CCP3_PIN GPIO_PIN_4
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP4_PORT GPIO_PORTE_BASE
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#define CCP4_PIN GPIO_PIN_2
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP5_PORT GPIO_PORTE_BASE
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#define CCP5_PIN GPIO_PIN_5
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#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2CSCL_PORT GPIO_PORTB_BASE
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#define I2CSCL_PIN GPIO_PIN_2
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#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2CSDA_PORT GPIO_PORTB_BASE
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#define I2CSDA_PIN GPIO_PIN_3
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#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSICLK_PORT GPIO_PORTA_BASE
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#define SSICLK_PIN GPIO_PIN_2
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#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIFSS_PORT GPIO_PORTA_BASE
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#define SSIFSS_PIN GPIO_PIN_3
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#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIRX_PORT GPIO_PORTA_BASE
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#define SSIRX_PIN GPIO_PIN_4
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#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSITX_PORT GPIO_PORTA_BASE
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#define SSITX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S300
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//*****************************************************************************
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//
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// LM3S301 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S301
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1O_PORT GPIO_PORTC_BASE
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#define C1O_PIN GPIO_PIN_5
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP2_PORT GPIO_PORTD_BASE
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#define CCP2_PIN GPIO_PIN_5
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
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#define FAULT_PORT GPIO_PORTD_BASE
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#define FAULT_PIN GPIO_PIN_6
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM0_PORT GPIO_PORTD_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM1_PORT GPIO_PORTD_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSICLK_PORT GPIO_PORTA_BASE
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#define SSICLK_PIN GPIO_PIN_2
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#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIFSS_PORT GPIO_PORTA_BASE
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#define SSIFSS_PIN GPIO_PIN_3
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#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIRX_PORT GPIO_PORTA_BASE
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#define SSIRX_PIN GPIO_PIN_4
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#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSITX_PORT GPIO_PORTA_BASE
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#define SSITX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S301
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S308 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S308
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S308
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S310 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S310
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2O_PORT GPIO_PORTC_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP4_PORT GPIO_PORTE_BASE
|
|
#define CCP4_PIN GPIO_PIN_2
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP5_PORT GPIO_PORTE_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S310
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S315 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S315
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S315
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S316 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S316
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S316
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S317 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S317
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT_PORT GPIO_PORTB_BASE
|
|
#define FAULT_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S317
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S328 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S328
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S328
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S600 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S600
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2O_PORT GPIO_PORTC_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP4_PORT GPIO_PORTE_BASE
|
|
#define CCP4_PIN GPIO_PIN_2
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP5_PORT GPIO_PORTE_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S600
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S601 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S601
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP4_PORT GPIO_PORTE_BASE
|
|
#define CCP4_PIN GPIO_PIN_2
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP5_PORT GPIO_PORTE_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX_PORT GPIO_PORTD_BASE
|
|
#define IDX_PIN GPIO_PIN_7
|
|
|
|
#define PHA_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA_PORT GPIO_PORTC_BASE
|
|
#define PHA_PIN GPIO_PIN_4
|
|
|
|
#define PHB_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB_PORT GPIO_PORTC_BASE
|
|
#define PHB_PIN GPIO_PIN_6
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S601
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S608 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S608
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S608
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S610 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S610
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S610
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S611 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S611
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S611
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S612 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S612
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S612
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S613 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S613
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S613
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S615 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S615
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP4_PORT GPIO_PORTE_BASE
|
|
#define CCP4_PIN GPIO_PIN_2
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S615
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S617 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S617
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT_PORT GPIO_PORTB_BASE
|
|
#define FAULT_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S617
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S618 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S618
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT_PORT GPIO_PORTB_BASE
|
|
#define FAULT_PIN GPIO_PIN_3
|
|
|
|
#define IDX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define IDX_PORT GPIO_PORTB_BASE
|
|
#define IDX_PIN GPIO_PIN_2
|
|
|
|
#define PHA_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA_PORT GPIO_PORTC_BASE
|
|
#define PHA_PIN GPIO_PIN_4
|
|
|
|
#define PHB_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB_PORT GPIO_PORTC_BASE
|
|
#define PHB_PIN GPIO_PIN_6
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S618
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S628 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S628
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S628
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S800 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S800
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2O_PORT GPIO_PORTC_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP4_PORT GPIO_PORTE_BASE
|
|
#define CCP4_PIN GPIO_PIN_2
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP5_PORT GPIO_PORTE_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S800
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S801 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S801
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP4_PORT GPIO_PORTE_BASE
|
|
#define CCP4_PIN GPIO_PIN_2
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP5_PORT GPIO_PORTE_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX_PORT GPIO_PORTD_BASE
|
|
#define IDX_PIN GPIO_PIN_7
|
|
|
|
#define PHA_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA_PORT GPIO_PORTC_BASE
|
|
#define PHA_PIN GPIO_PIN_4
|
|
|
|
#define PHB_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB_PORT GPIO_PORTC_BASE
|
|
#define PHB_PIN GPIO_PIN_6
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S801
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S808 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S808
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S808
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S811 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S811
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S811
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S812 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S812
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S812
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S815 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S815
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP1_PORT GPIO_PORTE_BASE
|
|
#define CCP1_PIN GPIO_PIN_3
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP4_PORT GPIO_PORTE_BASE
|
|
#define CCP4_PIN GPIO_PIN_2
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSCL_PORT GPIO_PORTB_BASE
|
|
#define I2CSCL_PIN GPIO_PIN_2
|
|
|
|
#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2CSDA_PORT GPIO_PORTB_BASE
|
|
#define I2CSDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSICLK_PORT GPIO_PORTA_BASE
|
|
#define SSICLK_PIN GPIO_PIN_2
|
|
|
|
#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIFSS_PORT GPIO_PORTA_BASE
|
|
#define SSIFSS_PIN GPIO_PIN_3
|
|
|
|
#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSIRX_PORT GPIO_PORTA_BASE
|
|
#define SSIRX_PIN GPIO_PIN_4
|
|
|
|
#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSITX_PORT GPIO_PORTA_BASE
|
|
#define SSITX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S815
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S817 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S817
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0O_PORT GPIO_PORTB_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP0_PORT GPIO_PORTD_BASE
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#define CCP0_PIN GPIO_PIN_4
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP1_PORT GPIO_PORTC_BASE
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#define CCP1_PIN GPIO_PIN_5
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP2_PORT GPIO_PORTD_BASE
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#define CCP2_PIN GPIO_PIN_5
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP4_PORT GPIO_PORTC_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP5_PORT GPIO_PORTC_BASE
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#define CCP5_PIN GPIO_PIN_4
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOB
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#define FAULT_PORT GPIO_PORTB_BASE
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#define FAULT_PIN GPIO_PIN_3
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM0_PORT GPIO_PORTD_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM1_PORT GPIO_PORTD_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM2_PORT GPIO_PORTB_BASE
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#define PWM2_PIN GPIO_PIN_0
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#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM3_PORT GPIO_PORTB_BASE
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#define PWM3_PIN GPIO_PIN_1
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#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM4_PORT GPIO_PORTE_BASE
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#define PWM4_PIN GPIO_PIN_0
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#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM5_PORT GPIO_PORTE_BASE
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#define PWM5_PIN GPIO_PIN_1
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#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSICLK_PORT GPIO_PORTA_BASE
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#define SSICLK_PIN GPIO_PIN_2
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#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIFSS_PORT GPIO_PORTA_BASE
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#define SSIFSS_PIN GPIO_PIN_3
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#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIRX_PORT GPIO_PORTA_BASE
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#define SSIRX_PIN GPIO_PIN_4
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#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSITX_PORT GPIO_PORTA_BASE
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#define SSITX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S817
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//*****************************************************************************
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//
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// LM3S818 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S818
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0O_PORT GPIO_PORTB_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP0_PORT GPIO_PORTD_BASE
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#define CCP0_PIN GPIO_PIN_4
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP1_PORT GPIO_PORTC_BASE
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#define CCP1_PIN GPIO_PIN_5
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP2_PORT GPIO_PORTD_BASE
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#define CCP2_PIN GPIO_PIN_5
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP4_PORT GPIO_PORTC_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOB
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#define FAULT_PORT GPIO_PORTB_BASE
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#define FAULT_PIN GPIO_PIN_3
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#define IDX_PERIPH SYSCTL_PERIPH_GPIOB
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#define IDX_PORT GPIO_PORTB_BASE
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#define IDX_PIN GPIO_PIN_2
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#define PHA_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHA_PORT GPIO_PORTC_BASE
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#define PHA_PIN GPIO_PIN_4
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#define PHB_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHB_PORT GPIO_PORTC_BASE
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#define PHB_PIN GPIO_PIN_6
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM0_PORT GPIO_PORTD_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM1_PORT GPIO_PORTD_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM2_PORT GPIO_PORTB_BASE
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#define PWM2_PIN GPIO_PIN_0
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#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM3_PORT GPIO_PORTB_BASE
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#define PWM3_PIN GPIO_PIN_1
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#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM4_PORT GPIO_PORTE_BASE
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#define PWM4_PIN GPIO_PIN_0
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#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM5_PORT GPIO_PORTE_BASE
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#define PWM5_PIN GPIO_PIN_1
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#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSICLK_PORT GPIO_PORTA_BASE
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#define SSICLK_PIN GPIO_PIN_2
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#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIFSS_PORT GPIO_PORTA_BASE
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#define SSIFSS_PIN GPIO_PIN_3
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#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIRX_PORT GPIO_PORTA_BASE
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#define SSIRX_PIN GPIO_PIN_4
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#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSITX_PORT GPIO_PORTA_BASE
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#define SSITX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S818
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//*****************************************************************************
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//
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// LM3S828 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S828
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP1_PORT GPIO_PORTC_BASE
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#define CCP1_PIN GPIO_PIN_5
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP4_PORT GPIO_PORTC_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP5_PORT GPIO_PORTB_BASE
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#define CCP5_PIN GPIO_PIN_5
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#define I2CSCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2CSCL_PORT GPIO_PORTB_BASE
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#define I2CSCL_PIN GPIO_PIN_2
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#define I2CSDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2CSDA_PORT GPIO_PORTB_BASE
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#define I2CSDA_PIN GPIO_PIN_3
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#define SSICLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSICLK_PORT GPIO_PORTA_BASE
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#define SSICLK_PIN GPIO_PIN_2
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#define SSIFSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIFSS_PORT GPIO_PORTA_BASE
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#define SSIFSS_PIN GPIO_PIN_3
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#define SSIRX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSIRX_PORT GPIO_PORTA_BASE
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#define SSIRX_PIN GPIO_PIN_4
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#define SSITX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSITX_PORT GPIO_PORTA_BASE
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#define SSITX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S828
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//*****************************************************************************
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//
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// LM3S1110 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S1110
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
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#define C1O_PORT GPIO_PORTE_BASE
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#define C1O_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1110
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1133 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1133
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1133
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1138 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1138
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2O_PORT GPIO_PORTC_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define CCP3_PORT GPIO_PORTG_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP4_PORT GPIO_PORTF_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1138
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1150 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1150
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PHA0_PORT GPIO_PORTD_BASE
|
|
#define PHA0_PIN GPIO_PIN_1
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1150
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1162 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1162
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1162
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1165 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1165
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP6_PORT GPIO_PORTB_BASE
|
|
#define CCP6_PIN GPIO_PIN_5
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1165
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1332 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1332
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1332
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1435 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1435
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1435
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1439 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1439
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1439
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1512 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1512
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C2O_PORT GPIO_PORTF_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP4_PORT GPIO_PORTD_BASE
|
|
#define CCP4_PIN GPIO_PIN_5
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_0
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PHA0_PORT GPIO_PORTD_BASE
|
|
#define PHA0_PIN GPIO_PIN_1
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1512
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1538 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1538
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_0
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1538
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1601 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1601
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1601
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1607 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1607
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_1
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_0
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_5
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U2RX_PORT GPIO_PORTB_BASE
|
|
#define U2RX_PIN GPIO_PIN_4
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define U2TX_PORT GPIO_PORTE_BASE
|
|
#define U2TX_PIN GPIO_PIN_4
|
|
|
|
#endif // PART_LM3S1607
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1608 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1608
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1608
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1620 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1620
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1620
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1621 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1621
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1621
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1625 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1625
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_7
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1625
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1626 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1626
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_6
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_5
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_0
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PHA0_PORT GPIO_PORTD_BASE
|
|
#define PHA0_PIN GPIO_PIN_1
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM0_PORT GPIO_PORTA_BASE
|
|
#define PWM0_PIN GPIO_PIN_6
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM1_PORT GPIO_PORTA_BASE
|
|
#define PWM1_PIN GPIO_PIN_7
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_4
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_5
|
|
|
|
#endif // PART_LM3S1626
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1627 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1627
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_6
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_5
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define IDX0_PORT GPIO_PORTB_BASE
|
|
#define IDX0_PIN GPIO_PIN_4
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM2_PORT GPIO_PORTD_BASE
|
|
#define PWM2_PIN GPIO_PIN_2
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM3_PORT GPIO_PORTD_BASE
|
|
#define PWM3_PIN GPIO_PIN_3
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM4_PORT GPIO_PORTA_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM5_PORT GPIO_PORTA_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1627
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1635 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1635
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define C0_PLUS_PORT GPIO_PORTB_BASE
|
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#define C0_PLUS_PIN GPIO_PIN_6
|
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|
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
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#define C1O_PORT GPIO_PORTF_BASE
|
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#define C1O_PIN GPIO_PIN_5
|
|
|
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
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#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define C1_PLUS_PORT GPIO_PORTC_BASE
|
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#define C1_PLUS_PIN GPIO_PIN_5
|
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|
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define CCP0_PORT GPIO_PORTD_BASE
|
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#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define CCP3_PORT GPIO_PORTC_BASE
|
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#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
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#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
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#define CCP6_PORT GPIO_PORTH_BASE
|
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#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
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#define CCP7_PORT GPIO_PORTH_BASE
|
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#define CCP7_PIN GPIO_PIN_1
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|
|
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SDA_PORT GPIO_PORTB_BASE
|
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#define I2C0SDA_PIN GPIO_PIN_3
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|
|
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#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
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#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
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|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
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#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1635
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1637 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1637
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1637
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1651 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1651
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S1651
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1751 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1751
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1751
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1776 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1776
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define FAULT1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT1_PORT GPIO_PORTB_BASE
|
|
#define FAULT1_PIN GPIO_PIN_6
|
|
|
|
#define FAULT2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define FAULT2_PORT GPIO_PORTC_BASE
|
|
#define FAULT2_PIN GPIO_PIN_5
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM4_PORT GPIO_PORTA_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM5_PORT GPIO_PORTA_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define PWM6_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PWM6_PORT GPIO_PORTC_BASE
|
|
#define PWM6_PIN GPIO_PIN_4
|
|
|
|
#define PWM7_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PWM7_PORT GPIO_PORTC_BASE
|
|
#define PWM7_PIN GPIO_PIN_6
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1776
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1811 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1811
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1811
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1816 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1816
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1816
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1850 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1850
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PHA0_PORT GPIO_PORTD_BASE
|
|
#define PHA0_PIN GPIO_PIN_1
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1850
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1911 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1911
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1911
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1918 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1918
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1918
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1937 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1937
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S1937
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1958 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1958
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1958
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1960 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1960
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C2O_PORT GPIO_PORTF_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP4_PORT GPIO_PORTF_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_0
|
|
|
|
#define IDX1_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define IDX1_PORT GPIO_PORTH_BASE
|
|
#define IDX1_PIN GPIO_PIN_2
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PHA0_PORT GPIO_PORTD_BASE
|
|
#define PHA0_PIN GPIO_PIN_1
|
|
|
|
#define PHA1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PHA1_PORT GPIO_PORTG_BASE
|
|
#define PHA1_PIN GPIO_PIN_6
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PHB0_PORT GPIO_PORTH_BASE
|
|
#define PHB0_PIN GPIO_PIN_3
|
|
|
|
#define PHB1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PHB1_PORT GPIO_PORTG_BASE
|
|
#define PHB1_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1960
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1968 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1968
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define CCP3_PORT GPIO_PORTG_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define FAULT_PORT GPIO_PORTH_BASE
|
|
#define FAULT_PIN GPIO_PIN_3
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_0
|
|
|
|
#define IDX1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define IDX1_PORT GPIO_PORTF_BASE
|
|
#define IDX1_PIN GPIO_PIN_1
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHA1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PHA1_PORT GPIO_PORTG_BASE
|
|
#define PHA1_PIN GPIO_PIN_6
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define PHB1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PHB1_PORT GPIO_PORTG_BASE
|
|
#define PHB1_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM0_PORT GPIO_PORTG_BASE
|
|
#define PWM0_PIN GPIO_PIN_2
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S1968
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1B21 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1B21
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1B21
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1C21 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1C21
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1C21
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1C26 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1C26
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1C26
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1C58 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1C58
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
|
|
#endif // PART_LM3S1C58
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1D21 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1D21
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1D21
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1D26 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1D26
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1D26
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1F11 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1F11
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1F11
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1F16 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1F16
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1F16
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1G21 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1G21
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1G21
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1G58 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1G58
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
|
|
#endif // PART_LM3S1G58
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1H11 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1H11
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1H11
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1H16 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1H16
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1H16
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1J11 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1J11
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1J11
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1J16 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1J16
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1J16
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1N11 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1N11
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1N11
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1N16 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1N16
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1N16
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1P51 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1P51
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S1P51
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1R21 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1R21
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S1R21
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1R26 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1R26
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1R26
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1W16 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1W16
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1W16
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S1Z16 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S1Z16
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S1Z16
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2016 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2016
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S2016
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2110 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2110
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2110
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2139 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2139
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S2139
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2276 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2276
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0RX_PORT GPIO_PORTB_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_4
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0TX_PORT GPIO_PORTB_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_7
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define FAULT1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT1_PORT GPIO_PORTB_BASE
|
|
#define FAULT1_PIN GPIO_PIN_6
|
|
|
|
#define FAULT2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define FAULT2_PORT GPIO_PORTC_BASE
|
|
#define FAULT2_PIN GPIO_PIN_5
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM4_PORT GPIO_PORTA_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM5_PORT GPIO_PORTA_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define PWM6_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PWM6_PORT GPIO_PORTC_BASE
|
|
#define PWM6_PIN GPIO_PIN_4
|
|
|
|
#define PWM7_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PWM7_PORT GPIO_PORTC_BASE
|
|
#define PWM7_PIN GPIO_PIN_6
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2276
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2410 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2410
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2410
|
|
|
|
//*****************************************************************************
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//
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// LM3S2412 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S2412
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
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#define FAULT_PORT GPIO_PORTD_BASE
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#define FAULT_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM0_PORT GPIO_PORTF_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM1_PORT GPIO_PORTF_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S2412
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//*****************************************************************************
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//
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// LM3S2432 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S2432
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
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#define FAULT_PORT GPIO_PORTD_BASE
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#define FAULT_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM0_PORT GPIO_PORTF_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM1_PORT GPIO_PORTF_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S2432
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//*****************************************************************************
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//
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// LM3S2533 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S2533
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_MINUS_PORT GPIO_PORTC_BASE
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#define C2_MINUS_PIN GPIO_PIN_7
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#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_PLUS_PORT GPIO_PORTC_BASE
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#define C2_PLUS_PIN GPIO_PIN_6
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP3_PORT GPIO_PORTD_BASE
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#define CCP3_PIN GPIO_PIN_4
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP4_PORT GPIO_PORTA_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP5_PORT GPIO_PORTC_BASE
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#define CCP5_PIN GPIO_PIN_4
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
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#define FAULT_PORT GPIO_PORTD_BASE
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#define FAULT_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM0_PORT GPIO_PORTF_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM1_PORT GPIO_PORTF_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
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#define PWM2_PORT GPIO_PORTH_BASE
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#define PWM2_PIN GPIO_PIN_0
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#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
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#define PWM3_PORT GPIO_PORTH_BASE
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#define PWM3_PIN GPIO_PIN_1
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#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM4_PORT GPIO_PORTE_BASE
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#define PWM4_PIN GPIO_PIN_0
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#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM5_PORT GPIO_PORTE_BASE
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#define PWM5_PIN GPIO_PIN_1
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S2533
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//*****************************************************************************
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//
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// LM3S2601 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S2601
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
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#define C0O_PORT GPIO_PORTF_BASE
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#define C0O_PIN GPIO_PIN_4
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
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#define C1O_PORT GPIO_PORTE_BASE
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#define C1O_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP1_PORT GPIO_PORTD_BASE
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#define CCP1_PIN GPIO_PIN_7
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP4_PORT GPIO_PORTC_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP5_PORT GPIO_PORTC_BASE
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#define CCP5_PIN GPIO_PIN_4
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#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
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#define CCP6_PORT GPIO_PORTH_BASE
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#define CCP6_PIN GPIO_PIN_0
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#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
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#define CCP7_PORT GPIO_PORTH_BASE
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#define CCP7_PIN GPIO_PIN_1
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SCL_PORT GPIO_PORTA_BASE
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#define I2C1SCL_PIN GPIO_PIN_6
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#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SDA_PORT GPIO_PORTA_BASE
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#define I2C1SDA_PIN GPIO_PIN_7
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1CLK_PORT GPIO_PORTE_BASE
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#define SSI1CLK_PIN GPIO_PIN_0
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#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1FSS_PORT GPIO_PORTE_BASE
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#define SSI1FSS_PIN GPIO_PIN_1
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#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1RX_PORT GPIO_PORTE_BASE
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#define SSI1RX_PIN GPIO_PIN_2
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#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1TX_PORT GPIO_PORTE_BASE
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#define SSI1TX_PIN GPIO_PIN_3
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
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#define U2RX_PORT GPIO_PORTG_BASE
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#define U2RX_PIN GPIO_PIN_0
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#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
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#define U2TX_PORT GPIO_PORTG_BASE
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#define U2TX_PIN GPIO_PIN_1
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#endif // PART_LM3S2601
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//*****************************************************************************
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//
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// LM3S2608 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S2608
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
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#define C0O_PORT GPIO_PORTF_BASE
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#define C0O_PIN GPIO_PIN_4
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
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#define C1O_PORT GPIO_PORTF_BASE
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#define C1O_PIN GPIO_PIN_5
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
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#define CCP1_PORT GPIO_PORTF_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP4_PORT GPIO_PORTC_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP5_PORT GPIO_PORTC_BASE
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#define CCP5_PIN GPIO_PIN_4
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#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
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#define CCP6_PORT GPIO_PORTH_BASE
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#define CCP6_PIN GPIO_PIN_0
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#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
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#define CCP7_PORT GPIO_PORTH_BASE
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#define CCP7_PIN GPIO_PIN_1
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SCL_PORT GPIO_PORTA_BASE
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#define I2C1SCL_PIN GPIO_PIN_6
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#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SDA_PORT GPIO_PORTA_BASE
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#define I2C1SDA_PIN GPIO_PIN_7
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1CLK_PORT GPIO_PORTE_BASE
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#define SSI1CLK_PIN GPIO_PIN_0
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#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1FSS_PORT GPIO_PORTE_BASE
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#define SSI1FSS_PIN GPIO_PIN_1
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#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1RX_PORT GPIO_PORTE_BASE
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#define SSI1RX_PIN GPIO_PIN_2
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#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1TX_PORT GPIO_PORTE_BASE
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#define SSI1TX_PIN GPIO_PIN_3
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S2608
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//*****************************************************************************
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//
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// LM3S2616 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S2616
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#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
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#define ADC0_PORT GPIO_PORTE_BASE
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#define ADC0_PIN GPIO_PIN_3
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#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
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#define ADC1_PORT GPIO_PORTE_BASE
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#define ADC1_PIN GPIO_PIN_2
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#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
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#define ADC2_PORT GPIO_PORTE_BASE
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#define ADC2_PIN GPIO_PIN_1
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#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
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#define ADC3_PORT GPIO_PORTE_BASE
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#define ADC3_PIN GPIO_PIN_0
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#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
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#define ADC4_PORT GPIO_PORTD_BASE
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#define ADC4_PIN GPIO_PIN_3
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#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
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#define ADC5_PORT GPIO_PORTD_BASE
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#define ADC5_PIN GPIO_PIN_2
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C0O_PORT GPIO_PORTC_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1O_PORT GPIO_PORTC_BASE
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#define C1O_PIN GPIO_PIN_7
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_7
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define CAN0RX_PORT GPIO_PORTA_BASE
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#define CAN0RX_PIN GPIO_PIN_4
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define CAN0TX_PORT GPIO_PORTA_BASE
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#define CAN0TX_PIN GPIO_PIN_5
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#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
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#define FAULT0_PORT GPIO_PORTE_BASE
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#define FAULT0_PIN GPIO_PIN_4
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
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#define IDX0_PORT GPIO_PORTD_BASE
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#define IDX0_PIN GPIO_PIN_0
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#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
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#define NMI_PORT GPIO_PORTB_BASE
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#define NMI_PIN GPIO_PIN_7
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#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHA0_PORT GPIO_PORTC_BASE
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#define PHA0_PIN GPIO_PIN_4
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#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHB0_PORT GPIO_PORTC_BASE
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#define PHB0_PIN GPIO_PIN_6
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOA
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#define PWM0_PORT GPIO_PORTA_BASE
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#define PWM0_PIN GPIO_PIN_6
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOA
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#define PWM1_PORT GPIO_PORTA_BASE
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#define PWM1_PIN GPIO_PIN_7
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#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM2_PORT GPIO_PORTB_BASE
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#define PWM2_PIN GPIO_PIN_0
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#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM3_PORT GPIO_PORTB_BASE
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#define PWM3_PIN GPIO_PIN_1
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#define PWM4_PERIPH SYSCTL_PERIPH_GPIOA
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#define PWM4_PORT GPIO_PORTA_BASE
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#define PWM4_PIN GPIO_PIN_2
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#define PWM5_PERIPH SYSCTL_PERIPH_GPIOA
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#define PWM5_PORT GPIO_PORTA_BASE
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#define PWM5_PIN GPIO_PIN_3
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#endif // PART_LM3S2616
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//*****************************************************************************
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//
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// LM3S2620 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S2620
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
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#define C0O_PORT GPIO_PORTF_BASE
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#define C0O_PIN GPIO_PIN_4
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
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#define C1O_PORT GPIO_PORTE_BASE
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#define C1O_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define C2O_PERIPH SYSCTL_PERIPH_GPIOE
|
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#define C2O_PORT GPIO_PORTE_BASE
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#define C2O_PIN GPIO_PIN_7
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#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_MINUS_PORT GPIO_PORTC_BASE
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#define C2_MINUS_PIN GPIO_PIN_7
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#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_PLUS_PORT GPIO_PORTC_BASE
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#define C2_PLUS_PIN GPIO_PIN_6
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
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#define CAN1RX_PORT GPIO_PORTF_BASE
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#define CAN1RX_PIN GPIO_PIN_0
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#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
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#define CAN1TX_PORT GPIO_PORTF_BASE
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#define CAN1TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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|
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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|
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define CCP2_PORT GPIO_PORTB_BASE
|
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#define CCP2_PIN GPIO_PIN_1
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|
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
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|
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
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#define CCP4_PORT GPIO_PORTA_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
|
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#define CCP5_PORT GPIO_PORTE_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
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|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
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|
#define FAULT_PIN GPIO_PIN_6
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|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
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|
#define IDX0_PORT GPIO_PORTD_BASE
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|
#define IDX0_PIN GPIO_PIN_7
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|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
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|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
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|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PHB0_PORT GPIO_PORTH_BASE
|
|
#define PHB0_PIN GPIO_PIN_3
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|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM0_PORT GPIO_PORTG_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM1_PORT GPIO_PORTG_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM2_PORT GPIO_PORTD_BASE
|
|
#define PWM2_PIN GPIO_PIN_2
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|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM3_PORT GPIO_PORTD_BASE
|
|
#define PWM3_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
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|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
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|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
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|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2620
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2637 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2637
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S2637
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2651 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2651
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2651
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2671 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2671
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_6
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_7
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_7
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2O_PORT GPIO_PORTC_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_1
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM0_PORT GPIO_PORTA_BASE
|
|
#define PWM0_PIN GPIO_PIN_6
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM1_PORT GPIO_PORTA_BASE
|
|
#define PWM1_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2671
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2678 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2678
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_1
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_0
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0RX_PORT GPIO_PORTB_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_4
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0TX_PORT GPIO_PORTB_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_6
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP1_PORT GPIO_PORTC_BASE
|
|
#define CCP1_PIN GPIO_PIN_5
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT0_PORT GPIO_PORTB_BASE
|
|
#define FAULT0_PIN GPIO_PIN_3
|
|
|
|
#define FAULT1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT1_PORT GPIO_PORTB_BASE
|
|
#define FAULT1_PIN GPIO_PIN_6
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define IDX0_PORT GPIO_PORTB_BASE
|
|
#define IDX0_PIN GPIO_PIN_2
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM0_PORT GPIO_PORTA_BASE
|
|
#define PWM0_PIN GPIO_PIN_6
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM1_PORT GPIO_PORTA_BASE
|
|
#define PWM1_PIN GPIO_PIN_7
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2678
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2730 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2730
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2730
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2739 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2739
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S2739
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2776 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2776
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0RX_PORT GPIO_PORTB_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_4
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0TX_PORT GPIO_PORTB_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_7
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define FAULT1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT1_PORT GPIO_PORTB_BASE
|
|
#define FAULT1_PIN GPIO_PIN_6
|
|
|
|
#define FAULT2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define FAULT2_PORT GPIO_PORTC_BASE
|
|
#define FAULT2_PIN GPIO_PIN_5
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM4_PORT GPIO_PORTA_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM5_PORT GPIO_PORTA_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define PWM6_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PWM6_PORT GPIO_PORTC_BASE
|
|
#define PWM6_PIN GPIO_PIN_4
|
|
|
|
#define PWM7_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PWM7_PORT GPIO_PORTC_BASE
|
|
#define PWM7_PIN GPIO_PIN_6
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2776
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2793 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2793
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S2793
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2911 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2911
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2911
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2918 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2918
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S2918
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2939 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2939
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PHB0_PORT GPIO_PORTH_BASE
|
|
#define PHB0_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2939
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2948 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2948
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1RX_PORT GPIO_PORTF_BASE
|
|
#define CAN1RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1TX_PORT GPIO_PORTF_BASE
|
|
#define CAN1TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define CCP3_PORT GPIO_PORTG_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2948
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2950 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2950
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C2O_PORT GPIO_PORTF_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1RX_PORT GPIO_PORTF_BASE
|
|
#define CAN1RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1TX_PORT GPIO_PORTF_BASE
|
|
#define CAN1TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP5_PORT GPIO_PORTE_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PHB0_PORT GPIO_PORTH_BASE
|
|
#define PHB0_PIN GPIO_PIN_3
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM0_PORT GPIO_PORTG_BASE
|
|
#define PWM0_PIN GPIO_PIN_2
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM1_PORT GPIO_PORTG_BASE
|
|
#define PWM1_PIN GPIO_PIN_3
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2950
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2965 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2965
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1RX_PORT GPIO_PORTF_BASE
|
|
#define CAN1RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1TX_PORT GPIO_PORTF_BASE
|
|
#define CAN1TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP4_PORT GPIO_PORTD_BASE
|
|
#define CCP4_PIN GPIO_PIN_5
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define CCP5_PORT GPIO_PORTG_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define IDX1_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define IDX1_PORT GPIO_PORTH_BASE
|
|
#define IDX1_PIN GPIO_PIN_2
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHA1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PHA1_PORT GPIO_PORTG_BASE
|
|
#define PHA1_PIN GPIO_PIN_6
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PHB0_PORT GPIO_PORTH_BASE
|
|
#define PHB0_PIN GPIO_PIN_3
|
|
|
|
#define PHB1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PHB1_PORT GPIO_PORTG_BASE
|
|
#define PHB1_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM0_PORT GPIO_PORTG_BASE
|
|
#define PWM0_PIN GPIO_PIN_2
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM1_PORT GPIO_PORTG_BASE
|
|
#define PWM1_PIN GPIO_PIN_3
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S2965
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2B93 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2B93
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S2B93
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2D93 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2D93
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S2D93
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S2U93 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S2U93
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S2U93
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3634 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3634
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_1
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_0
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_5
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#endif // PART_LM3S3634
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3651 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3651
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_6
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_7
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_3
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP5_PORT GPIO_PORTD_BASE
|
|
#define CCP5_PIN GPIO_PIN_2
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP6_PORT GPIO_PORTD_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP7_PORT GPIO_PORTD_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0ID_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0ID_PORT GPIO_PORTB_BASE
|
|
#define USB0ID_PIN GPIO_PIN_0
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#define USB0VBUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0VBUS_PORT GPIO_PORTB_BASE
|
|
#define USB0VBUS_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S3651
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3654 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3654
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S3654
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3739 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3739
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_7
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_6
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_5
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_4
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_7
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_6
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_5
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_4
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_6
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define CCP3_PORT GPIO_PORTG_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP5_PORT GPIO_PORTD_BASE
|
|
#define CCP5_PIN GPIO_PIN_2
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP7_PORT GPIO_PORTD_BASE
|
|
#define CCP7_PIN GPIO_PIN_3
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U2RX_PORT GPIO_PORTD_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U2TX_PORT GPIO_PORTD_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0EPEN_PORT GPIO_PORTH_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_3
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0PFLT_PORT GPIO_PORTH_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_4
|
|
|
|
#endif // PART_LM3S3739
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3748 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3748
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_7
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_6
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_5
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_4
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_7
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_6
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_5
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_3
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP2_PORT GPIO_PORTF_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define CCP3_PORT GPIO_PORTG_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_4
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP5_PORT GPIO_PORTD_BASE
|
|
#define CCP5_PIN GPIO_PIN_2
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP7_PORT GPIO_PORTH_BASE
|
|
#define CCP7_PIN GPIO_PIN_1
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define FAULT0_PORT GPIO_PORTF_BASE
|
|
#define FAULT0_PIN GPIO_PIN_4
|
|
|
|
#define FAULT1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT1_PORT GPIO_PORTG_BASE
|
|
#define FAULT1_PIN GPIO_PIN_5
|
|
|
|
#define FAULT2_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT2_PORT GPIO_PORTG_BASE
|
|
#define FAULT2_PIN GPIO_PIN_3
|
|
|
|
#define FAULT3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define FAULT3_PORT GPIO_PORTH_BASE
|
|
#define FAULT3_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_0
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PHA0_PORT GPIO_PORTD_BASE
|
|
#define PHA0_PIN GPIO_PIN_1
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM2_PORT GPIO_PORTF_BASE
|
|
#define PWM2_PIN GPIO_PIN_2
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM3_PORT GPIO_PORTF_BASE
|
|
#define PWM3_PIN GPIO_PIN_3
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM4_PORT GPIO_PORTG_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM5_PORT GPIO_PORTG_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define PWM6_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM6_PORT GPIO_PORTG_BASE
|
|
#define PWM6_PIN GPIO_PIN_6
|
|
|
|
#define PWM7_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM7_PORT GPIO_PORTG_BASE
|
|
#define PWM7_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define U1RX_PORT GPIO_PORTC_BASE
|
|
#define U1RX_PIN GPIO_PIN_6
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define U1TX_PORT GPIO_PORTC_BASE
|
|
#define U1TX_PIN GPIO_PIN_7
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0EPEN_PORT GPIO_PORTH_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_3
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0PFLT_PORT GPIO_PORTH_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_4
|
|
|
|
#endif // PART_LM3S3748
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3749 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3749
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_7
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_6
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_5
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_4
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_7
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_6
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_5
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_4
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_7
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_3
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP2_PORT GPIO_PORTF_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP3_PORT GPIO_PORTA_BASE
|
|
#define CCP3_PIN GPIO_PIN_7
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP4_PORT GPIO_PORTF_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP6_PORT GPIO_PORTD_BASE
|
|
#define CCP6_PIN GPIO_PIN_2
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT0_PORT GPIO_PORTG_BASE
|
|
#define FAULT0_PIN GPIO_PIN_2
|
|
|
|
#define FAULT1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT1_PORT GPIO_PORTG_BASE
|
|
#define FAULT1_PIN GPIO_PIN_4
|
|
|
|
#define FAULT2_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT2_PORT GPIO_PORTG_BASE
|
|
#define FAULT2_PIN GPIO_PIN_3
|
|
|
|
#define FAULT3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define FAULT3_PORT GPIO_PORTH_BASE
|
|
#define FAULT3_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define I2C1SCL_PORT GPIO_PORTG_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_0
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define I2C1SDA_PORT GPIO_PORTG_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_1
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define IDX0_PORT GPIO_PORTG_BASE
|
|
#define IDX0_PIN GPIO_PIN_5
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHA0_PORT GPIO_PORTF_BASE
|
|
#define PHA0_PIN GPIO_PIN_6
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_6
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define PWM6_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM6_PORT GPIO_PORTG_BASE
|
|
#define PWM6_PIN GPIO_PIN_6
|
|
|
|
#define PWM7_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM7_PORT GPIO_PORTG_BASE
|
|
#define PWM7_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U2RX_PORT GPIO_PORTD_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U2TX_PORT GPIO_PORTD_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0EPEN_PORT GPIO_PORTH_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_3
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0PFLT_PORT GPIO_PORTH_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_4
|
|
|
|
#endif // PART_LM3S3749
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3826 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3826
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S3826
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3J26 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3J26
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S3J26
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3N26 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3N26
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S3N26
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3W26 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3W26
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S3W26
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S3Z26 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S3Z26
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S3Z26
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5632 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5632
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_5
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#endif // PART_LM3S5632
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5651 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5651
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5651
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5652 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5652
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_5
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP2_PORT GPIO_PORTE_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP3_PORT GPIO_PORTA_BASE
|
|
#define CCP3_PIN GPIO_PIN_7
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0ID_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0ID_PORT GPIO_PORTB_BASE
|
|
#define USB0ID_PIN GPIO_PIN_0
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#define USB0VBUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0VBUS_PORT GPIO_PORTB_BASE
|
|
#define USB0VBUS_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S5652
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5656 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5656
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5656
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5662 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5662
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0RX_PORT GPIO_PORTB_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_4
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0TX_PORT GPIO_PORTB_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_2
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT0_PORT GPIO_PORTB_BASE
|
|
#define FAULT0_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM2_PORT GPIO_PORTD_BASE
|
|
#define PWM2_PIN GPIO_PIN_2
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM3_PORT GPIO_PORTD_BASE
|
|
#define PWM3_PIN GPIO_PIN_3
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM4_PORT GPIO_PORTA_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM5_PORT GPIO_PORTA_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0ID_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0ID_PORT GPIO_PORTB_BASE
|
|
#define USB0ID_PIN GPIO_PIN_0
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#define USB0VBUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0VBUS_PORT GPIO_PORTB_BASE
|
|
#define USB0VBUS_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S5662
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5732 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5732
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_5
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#endif // PART_LM3S5732
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5737 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5737
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_7
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_6
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_5
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_4
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_7
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_6
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_5
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_4
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_1
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#endif // PART_LM3S5737
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5739 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5739
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_7
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_6
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_5
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_4
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_7
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_6
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_5
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_4
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CAN0RX_PORT GPIO_PORTA_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_6
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CAN0TX_PORT GPIO_PORTA_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_7
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP0_PORT GPIO_PORTC_BASE
|
|
#define CCP0_PIN GPIO_PIN_6
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CCP1_PORT GPIO_PORTF_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define CCP3_PORT GPIO_PORTG_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP5_PORT GPIO_PORTD_BASE
|
|
#define CCP5_PIN GPIO_PIN_2
|
|
|
|
#define CCP6_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define CCP6_PORT GPIO_PORTH_BASE
|
|
#define CCP6_PIN GPIO_PIN_0
|
|
|
|
#define CCP7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP7_PORT GPIO_PORTD_BASE
|
|
#define CCP7_PIN GPIO_PIN_3
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define I2C1SCL_PORT GPIO_PORTG_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_0
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define I2C1SDA_PORT GPIO_PORTG_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_1
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1RX_PORT GPIO_PORTB_BASE
|
|
#define U1RX_PIN GPIO_PIN_0
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define U1TX_PORT GPIO_PORTB_BASE
|
|
#define U1TX_PIN GPIO_PIN_1
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U2RX_PORT GPIO_PORTD_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U2TX_PORT GPIO_PORTD_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0EPEN_PORT GPIO_PORTH_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_3
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0PFLT_PORT GPIO_PORTH_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_4
|
|
|
|
#endif // PART_LM3S5739
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5747 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5747
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_7
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_6
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_5
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_4
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_7
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_6
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_5
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_4
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0RX_PORT GPIO_PORTB_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_4
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0TX_PORT GPIO_PORTB_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT0_PORT GPIO_PORTE_BASE
|
|
#define FAULT0_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM2_PORT GPIO_PORTD_BASE
|
|
#define PWM2_PIN GPIO_PIN_2
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM3_PORT GPIO_PORTD_BASE
|
|
#define PWM3_PIN GPIO_PIN_3
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#endif // PART_LM3S5747
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5749 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5749
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_7
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_6
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_5
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_4
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_7
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_6
|
|
|
|
#define ADC6_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC6_PORT GPIO_PORTD_BASE
|
|
#define ADC6_PIN GPIO_PIN_5
|
|
|
|
#define ADC7_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC7_PORT GPIO_PORTD_BASE
|
|
#define ADC7_PIN GPIO_PIN_4
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C0O_PORT GPIO_PORTF_BASE
|
|
#define C0O_PIN GPIO_PIN_4
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define C1O_PORT GPIO_PORTF_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1RX_PORT GPIO_PORTF_BASE
|
|
#define CAN1RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1TX_PORT GPIO_PORTF_BASE
|
|
#define CAN1TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_1
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT0_PORT GPIO_PORTG_BASE
|
|
#define FAULT0_PIN GPIO_PIN_2
|
|
|
|
#define FAULT1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT1_PORT GPIO_PORTG_BASE
|
|
#define FAULT1_PIN GPIO_PIN_4
|
|
|
|
#define FAULT2_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define FAULT2_PORT GPIO_PORTG_BASE
|
|
#define FAULT2_PIN GPIO_PIN_3
|
|
|
|
#define FAULT3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define FAULT3_PORT GPIO_PORTH_BASE
|
|
#define FAULT3_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define IDX0_PORT GPIO_PORTG_BASE
|
|
#define IDX0_PIN GPIO_PIN_5
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHA0_PORT GPIO_PORTF_BASE
|
|
#define PHA0_PIN GPIO_PIN_6
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM0_PORT GPIO_PORTG_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM1_PORT GPIO_PORTG_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM2_PORT GPIO_PORTH_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define PWM3_PORT GPIO_PORTH_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM4_PORT GPIO_PORTF_BASE
|
|
#define PWM4_PIN GPIO_PIN_2
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM5_PORT GPIO_PORTF_BASE
|
|
#define PWM5_PIN GPIO_PIN_3
|
|
|
|
#define PWM6_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM6_PORT GPIO_PORTG_BASE
|
|
#define PWM6_PIN GPIO_PIN_6
|
|
|
|
#define PWM7_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define PWM7_PORT GPIO_PORTG_BASE
|
|
#define PWM7_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0EPEN_PORT GPIO_PORTH_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_3
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOH
|
|
#define USB0PFLT_PORT GPIO_PORTH_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_4
|
|
|
|
#endif // PART_LM3S5749
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5752 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5752
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define ADC4_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC4_PORT GPIO_PORTD_BASE
|
|
#define ADC4_PIN GPIO_PIN_3
|
|
|
|
#define ADC5_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define ADC5_PORT GPIO_PORTD_BASE
|
|
#define ADC5_PIN GPIO_PIN_2
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_5
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP2_PORT GPIO_PORTE_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP3_PORT GPIO_PORTA_BASE
|
|
#define CCP3_PIN GPIO_PIN_7
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0ID_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0ID_PORT GPIO_PORTB_BASE
|
|
#define USB0ID_PIN GPIO_PIN_0
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#define USB0VBUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0VBUS_PORT GPIO_PORTB_BASE
|
|
#define USB0VBUS_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S5752
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5762 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5762
|
|
|
|
#define ADC0_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC0_PORT GPIO_PORTE_BASE
|
|
#define ADC0_PIN GPIO_PIN_3
|
|
|
|
#define ADC1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC1_PORT GPIO_PORTE_BASE
|
|
#define ADC1_PIN GPIO_PIN_2
|
|
|
|
#define ADC2_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC2_PORT GPIO_PORTE_BASE
|
|
#define ADC2_PIN GPIO_PIN_1
|
|
|
|
#define ADC3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define ADC3_PORT GPIO_PORTE_BASE
|
|
#define ADC3_PIN GPIO_PIN_0
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0RX_PORT GPIO_PORTB_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_4
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CAN0TX_PORT GPIO_PORTB_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_2
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP1_PORT GPIO_PORTB_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP2_PORT GPIO_PORTC_BASE
|
|
#define CCP2_PIN GPIO_PIN_4
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define FAULT0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT0_PORT GPIO_PORTB_BASE
|
|
#define FAULT0_PIN GPIO_PIN_3
|
|
|
|
#define NMI_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define NMI_PORT GPIO_PORTB_BASE
|
|
#define NMI_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM2_PORT GPIO_PORTD_BASE
|
|
#define PWM2_PIN GPIO_PIN_2
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM3_PORT GPIO_PORTD_BASE
|
|
#define PWM3_PIN GPIO_PIN_3
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM4_PORT GPIO_PORTA_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define PWM5_PORT GPIO_PORTA_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define USB0EPEN_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0EPEN_PORT GPIO_PORTC_BASE
|
|
#define USB0EPEN_PIN GPIO_PIN_5
|
|
|
|
#define USB0ID_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0ID_PORT GPIO_PORTB_BASE
|
|
#define USB0ID_PIN GPIO_PIN_0
|
|
|
|
#define USB0PFLT_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define USB0PFLT_PORT GPIO_PORTC_BASE
|
|
#define USB0PFLT_PIN GPIO_PIN_6
|
|
|
|
#define USB0VBUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define USB0VBUS_PORT GPIO_PORTB_BASE
|
|
#define USB0VBUS_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S5762
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5791 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5791
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S5791
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5951 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5951
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5951
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5956 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5956
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5956
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5B91 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5B91
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S5B91
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5C31 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5C31
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5C31
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5C36 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5C36
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5C36
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5C51 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5C51
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5C51
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5C56 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5C56
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5C56
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5D51 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5D51
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5D51
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5D56 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5D56
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5D56
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5D91 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5D91
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S5D91
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5G31 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5G31
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5G31
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5G36 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5G36
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5G36
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5G51 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5G51
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5G51
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5G56 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5G56
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5G56
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5K31 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5K31
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5K31
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5K36 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5K36
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5K36
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5P31 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5P31
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5P31
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5P36 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5P36
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
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|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5P36
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5P3B Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5P3B
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5P3B
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5P51 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5P51
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5P51
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5P56 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5P56
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5P56
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5R31 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5R31
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S5R31
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5R36 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5R36
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5R36
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5T36 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5T36
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5T36
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5U91 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5U91
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S5U91
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S5Y36 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S5Y36
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#endif // PART_LM3S5Y36
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6100 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6100
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6100
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6110 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6110
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT_PORT GPIO_PORTB_BASE
|
|
#define FAULT_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6110
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6420 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6420
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6420
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6422 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6422
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6422
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6432 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6432
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S6432
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6537 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6537
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S6537
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6610 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6610
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
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#define C1O_PORT GPIO_PORTE_BASE
|
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#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define C1_MINUS_PORT GPIO_PORTB_BASE
|
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#define C1_MINUS_PIN GPIO_PIN_5
|
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|
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define C1_PLUS_PORT GPIO_PORTC_BASE
|
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#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
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#define C2O_PERIPH SYSCTL_PERIPH_GPIOE
|
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#define C2O_PORT GPIO_PORTE_BASE
|
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#define C2O_PIN GPIO_PIN_7
|
|
|
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#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define C2_MINUS_PORT GPIO_PORTC_BASE
|
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#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
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#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define C2_PLUS_PORT GPIO_PORTC_BASE
|
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#define C2_PLUS_PIN GPIO_PIN_6
|
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|
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define CCP0_PORT GPIO_PORTD_BASE
|
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#define CCP0_PIN GPIO_PIN_4
|
|
|
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
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#define CCP1_PORT GPIO_PORTA_BASE
|
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#define CCP1_PIN GPIO_PIN_6
|
|
|
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define CCP2_PORT GPIO_PORTD_BASE
|
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#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
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#define CCP3_PIN GPIO_PIN_0
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|
|
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
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#define CCP4_PORT GPIO_PORTA_BASE
|
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#define CCP4_PIN GPIO_PIN_7
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|
|
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define CCP5_PORT GPIO_PORTC_BASE
|
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#define CCP5_PIN GPIO_PIN_4
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|
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define FAULT_PORT GPIO_PORTD_BASE
|
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#define FAULT_PIN GPIO_PIN_6
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|
|
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SCL_PORT GPIO_PORTB_BASE
|
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#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SDA_PORT GPIO_PORTB_BASE
|
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#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
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#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define IDX0_PORT GPIO_PORTD_BASE
|
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#define IDX0_PIN GPIO_PIN_7
|
|
|
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
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#define LED0_PIN GPIO_PIN_3
|
|
|
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
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#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
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#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define PHA0_PORT GPIO_PORTD_BASE
|
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#define PHA0_PIN GPIO_PIN_1
|
|
|
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#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
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#define PHB0_PORT GPIO_PORTF_BASE
|
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#define PHB0_PIN GPIO_PIN_0
|
|
|
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6610
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6611 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6611
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6611
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6618 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6618
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define I2C1SCL_PORT GPIO_PORTG_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_0
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
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#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1RX_PORT GPIO_PORTE_BASE
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#define SSI1RX_PIN GPIO_PIN_2
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|
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#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
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#define SSI1TX_PORT GPIO_PORTE_BASE
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#define SSI1TX_PIN GPIO_PIN_3
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S6618
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//*****************************************************************************
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//
|
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// LM3S6633 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
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#ifdef PART_LM3S6633
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|
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C0O_PORT GPIO_PORTC_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
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#define CCP1_PORT GPIO_PORTA_BASE
|
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#define CCP1_PIN GPIO_PIN_6
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|
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define CCP2_PORT GPIO_PORTB_BASE
|
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define CCP3_PORT GPIO_PORTC_BASE
|
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#define CCP3_PIN GPIO_PIN_6
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|
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
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#define CCP4_PORT GPIO_PORTA_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define CCP5_PORT GPIO_PORTB_BASE
|
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#define CCP5_PIN GPIO_PIN_5
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|
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SCL_PORT GPIO_PORTB_BASE
|
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#define I2C0SCL_PIN GPIO_PIN_2
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|
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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|
|
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
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#define LED0_PORT GPIO_PORTF_BASE
|
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#define LED0_PIN GPIO_PIN_3
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|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
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|
|
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
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|
|
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
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|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
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|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
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|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
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|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
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|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
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|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S6633
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6637 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6637
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2O_PORT GPIO_PORTC_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S6637
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6730 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6730
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define C1O_PORT GPIO_PORTE_BASE
|
|
#define C1O_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6730
|
|
|
|
//*****************************************************************************
|
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//
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// LM3S6753 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S6753
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP0_PORT GPIO_PORTD_BASE
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#define CCP0_PIN GPIO_PIN_4
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP2_PORT GPIO_PORTD_BASE
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#define CCP2_PIN GPIO_PIN_5
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
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#define FAULT_PORT GPIO_PORTD_BASE
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#define FAULT_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
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#define IDX0_PORT GPIO_PORTD_BASE
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#define IDX0_PIN GPIO_PIN_0
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHA0_PORT GPIO_PORTC_BASE
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#define PHA0_PIN GPIO_PIN_4
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#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHB0_PORT GPIO_PORTC_BASE
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#define PHB0_PIN GPIO_PIN_7
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM0_PORT GPIO_PORTF_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM1_PORT GPIO_PORTD_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM2_PORT GPIO_PORTB_BASE
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#define PWM2_PIN GPIO_PIN_0
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#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM3_PORT GPIO_PORTB_BASE
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#define PWM3_PIN GPIO_PIN_1
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#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM4_PORT GPIO_PORTE_BASE
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#define PWM4_PIN GPIO_PIN_0
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#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM5_PORT GPIO_PORTE_BASE
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#define PWM5_PIN GPIO_PIN_1
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S6753
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//*****************************************************************************
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//
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// LM3S6816 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S6816
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP4_PORT GPIO_PORTA_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP5_PORT GPIO_PORTB_BASE
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#define CCP5_PIN GPIO_PIN_5
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOE
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#define FAULT_PORT GPIO_PORTE_BASE
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#define FAULT_PIN GPIO_PIN_1
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM0_PORT GPIO_PORTD_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
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#define PWM1_PORT GPIO_PORTD_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
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#define U2RX_PORT GPIO_PORTG_BASE
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#define U2RX_PIN GPIO_PIN_0
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#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
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#define U2TX_PORT GPIO_PORTG_BASE
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#define U2TX_PIN GPIO_PIN_1
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#endif // PART_LM3S6816
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//*****************************************************************************
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//
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// LM3S6911 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S6911
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C0O_PORT GPIO_PORTC_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOE
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#define C1O_PORT GPIO_PORTE_BASE
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#define C1O_PIN GPIO_PIN_6
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP1_PORT GPIO_PORTD_BASE
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#define CCP1_PIN GPIO_PIN_7
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP3_PORT GPIO_PORTC_BASE
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#define CCP3_PIN GPIO_PIN_6
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP4_PORT GPIO_PORTC_BASE
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#define CCP4_PIN GPIO_PIN_7
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP5_PORT GPIO_PORTC_BASE
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#define CCP5_PIN GPIO_PIN_4
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SCL_PORT GPIO_PORTA_BASE
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#define I2C1SCL_PIN GPIO_PIN_6
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#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SDA_PORT GPIO_PORTA_BASE
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#define I2C1SDA_PIN GPIO_PIN_7
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1CLK_PORT GPIO_PORTE_BASE
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#define SSI1CLK_PIN GPIO_PIN_0
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#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1FSS_PORT GPIO_PORTE_BASE
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#define SSI1FSS_PIN GPIO_PIN_1
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#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1RX_PORT GPIO_PORTE_BASE
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#define SSI1RX_PIN GPIO_PIN_2
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#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1TX_PORT GPIO_PORTE_BASE
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#define SSI1TX_PIN GPIO_PIN_3
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6911
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6916 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6916
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define FAULT_PORT GPIO_PORTE_BASE
|
|
#define FAULT_PIN GPIO_PIN_1
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6916
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6918 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6918
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP4_PORT GPIO_PORTC_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define I2C1SCL_PORT GPIO_PORTG_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_0
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S6918
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6938 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6938
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_6
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_0
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6938
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6950 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6950
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_6
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2O_PORT GPIO_PORTC_BASE
|
|
#define C2O_PIN GPIO_PIN_6
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP5_PORT GPIO_PORTC_BASE
|
|
#define CCP5_PIN GPIO_PIN_4
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PHA0_PORT GPIO_PORTD_BASE
|
|
#define PHA0_PIN GPIO_PIN_1
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_6
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_7
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6950
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6952 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6952
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0O_PORT GPIO_PORTB_BASE
|
|
#define C0O_PIN GPIO_PIN_6
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP2_PORT GPIO_PORTD_BASE
|
|
#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CCP3_PORT GPIO_PORTE_BASE
|
|
#define CCP3_PIN GPIO_PIN_0
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
|
#define IDX0_PIN GPIO_PIN_7
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PHB0_PORT GPIO_PORTF_BASE
|
|
#define PHB0_PIN GPIO_PIN_0
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM0_PORT GPIO_PORTD_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6952
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6965 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6965
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP0_PORT GPIO_PORTD_BASE
|
|
#define CCP0_PIN GPIO_PIN_4
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP1_PORT GPIO_PORTD_BASE
|
|
#define CCP1_PIN GPIO_PIN_7
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define CCP2_PORT GPIO_PORTD_BASE
|
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#define CCP2_PIN GPIO_PIN_5
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
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#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
|
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#define FAULT_PORT GPIO_PORTD_BASE
|
|
#define FAULT_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
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#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SCL_PORT GPIO_PORTA_BASE
|
|
#define I2C1SCL_PIN GPIO_PIN_6
|
|
|
|
#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define I2C1SDA_PORT GPIO_PORTA_BASE
|
|
#define I2C1SDA_PIN GPIO_PIN_7
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define IDX0_PORT GPIO_PORTD_BASE
|
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#define IDX0_PIN GPIO_PIN_0
|
|
|
|
#define IDX1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define IDX1_PORT GPIO_PORTF_BASE
|
|
#define IDX1_PIN GPIO_PIN_1
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
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#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHA1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PHA1_PORT GPIO_PORTE_BASE
|
|
#define PHA1_PIN GPIO_PIN_3
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PHB1_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PHB1_PORT GPIO_PORTE_BASE
|
|
#define PHB1_PIN GPIO_PIN_2
|
|
|
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM1_PORT GPIO_PORTD_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM2_PORT GPIO_PORTB_BASE
|
|
#define PWM2_PIN GPIO_PIN_0
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define PWM3_PORT GPIO_PORTB_BASE
|
|
#define PWM3_PIN GPIO_PIN_1
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S6965
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6C11 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6C11
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
|
|
#endif // PART_LM3S6C11
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6C65 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6C65
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#endif // PART_LM3S6C65
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6G11 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6G11
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
|
|
#endif // PART_LM3S6G11
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S6G65 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S6G65
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#endif // PART_LM3S6G65
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8530 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S8530
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
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#define CAN1RX_PORT GPIO_PORTF_BASE
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#define CAN1RX_PIN GPIO_PIN_0
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#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
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#define CAN1TX_PORT GPIO_PORTF_BASE
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#define CAN1TX_PIN GPIO_PIN_1
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#define CAN2RX_PERIPH SYSCTL_PERIPH_GPIOE
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#define CAN2RX_PORT GPIO_PORTE_BASE
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#define CAN2RX_PIN GPIO_PIN_4
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#define CAN2TX_PERIPH SYSCTL_PERIPH_GPIOE
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#define CAN2TX_PORT GPIO_PORTE_BASE
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#define CAN2TX_PIN GPIO_PIN_5
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1CLK_PORT GPIO_PORTE_BASE
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#define SSI1CLK_PIN GPIO_PIN_0
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#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1FSS_PORT GPIO_PORTE_BASE
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#define SSI1FSS_PIN GPIO_PIN_1
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#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1RX_PORT GPIO_PORTE_BASE
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#define SSI1RX_PIN GPIO_PIN_2
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#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
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#define SSI1TX_PORT GPIO_PORTE_BASE
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#define SSI1TX_PIN GPIO_PIN_3
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#endif // PART_LM3S8530
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//*****************************************************************************
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//
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// LM3S8538 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S8538
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0O_PORT GPIO_PORTB_BASE
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#define C0O_PIN GPIO_PIN_6
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1O_PORT GPIO_PORTC_BASE
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#define C1O_PIN GPIO_PIN_5
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_MINUS_PORT GPIO_PORTC_BASE
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#define C2_MINUS_PIN GPIO_PIN_7
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#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_PLUS_PORT GPIO_PORTC_BASE
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#define C2_PLUS_PIN GPIO_PIN_6
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP3_PORT GPIO_PORTE_BASE
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#define CCP3_PIN GPIO_PIN_0
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S8538
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//*****************************************************************************
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//
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// LM3S8630 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S8630
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S8630
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//*****************************************************************************
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//
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// LM3S8730 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S8730
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S8730
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8733 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8733
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define C0O_PORT GPIO_PORTD_BASE
|
|
#define C0O_PIN GPIO_PIN_7
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1O_PORT GPIO_PORTC_BASE
|
|
#define C1O_PIN GPIO_PIN_5
|
|
|
|
#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C1_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C1_MINUS_PIN GPIO_PIN_5
|
|
|
|
#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C1_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C1_PLUS_PIN GPIO_PIN_5
|
|
|
|
#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_MINUS_PORT GPIO_PORTC_BASE
|
|
#define C2_MINUS_PIN GPIO_PIN_7
|
|
|
|
#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C2_PLUS_PORT GPIO_PORTC_BASE
|
|
#define C2_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CCP3_PORT GPIO_PORTD_BASE
|
|
#define CCP3_PIN GPIO_PIN_4
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S8733
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8738 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8738
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2RX_PORT GPIO_PORTG_BASE
|
|
#define U2RX_PIN GPIO_PIN_0
|
|
|
|
#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
|
|
#define U2TX_PORT GPIO_PORTG_BASE
|
|
#define U2TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S8738
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8930 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8930
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1RX_PORT GPIO_PORTF_BASE
|
|
#define CAN1RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1TX_PORT GPIO_PORTF_BASE
|
|
#define CAN1TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S8930
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8933 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8933
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOD
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#define C0O_PORT GPIO_PORTD_BASE
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#define C0O_PIN GPIO_PIN_7
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1O_PORT GPIO_PORTC_BASE
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#define C1O_PIN GPIO_PIN_5
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_MINUS_PORT GPIO_PORTC_BASE
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#define C2_MINUS_PIN GPIO_PIN_7
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#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_PLUS_PORT GPIO_PORTC_BASE
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#define C2_PLUS_PIN GPIO_PIN_6
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP3_PORT GPIO_PORTD_BASE
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#define CCP3_PIN GPIO_PIN_4
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#endif // PART_LM3S8933
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//*****************************************************************************
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//
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// LM3S8938 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S8938
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0O_PORT GPIO_PORTB_BASE
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#define C0O_PIN GPIO_PIN_6
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define C1O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1O_PORT GPIO_PORTC_BASE
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#define C1O_PIN GPIO_PIN_5
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#define C1_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C1_MINUS_PORT GPIO_PORTB_BASE
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#define C1_MINUS_PIN GPIO_PIN_5
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#define C1_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C1_PLUS_PORT GPIO_PORTC_BASE
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#define C1_PLUS_PIN GPIO_PIN_5
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#define C2O_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2O_PORT GPIO_PORTC_BASE
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#define C2O_PIN GPIO_PIN_6
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#define C2_MINUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_MINUS_PORT GPIO_PORTC_BASE
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#define C2_MINUS_PIN GPIO_PIN_7
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#define C2_PLUS_PERIPH SYSCTL_PERIPH_GPIOC
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#define C2_PLUS_PORT GPIO_PORTC_BASE
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#define C2_PLUS_PIN GPIO_PIN_6
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP0_PORT GPIO_PORTB_BASE
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#define CCP0_PIN GPIO_PIN_0
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP1_PORT GPIO_PORTE_BASE
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#define CCP1_PIN GPIO_PIN_3
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#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
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#define CCP2_PORT GPIO_PORTB_BASE
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#define CCP2_PIN GPIO_PIN_1
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#define CCP3_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP3_PORT GPIO_PORTE_BASE
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#define CCP3_PIN GPIO_PIN_0
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#define CCP4_PERIPH SYSCTL_PERIPH_GPIOE
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#define CCP4_PORT GPIO_PORTE_BASE
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#define CCP4_PIN GPIO_PIN_2
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#define CCP5_PERIPH SYSCTL_PERIPH_GPIOC
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#define CCP5_PORT GPIO_PORTC_BASE
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#define CCP5_PIN GPIO_PIN_4
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define I2C1SCL_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SCL_PORT GPIO_PORTA_BASE
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#define I2C1SCL_PIN GPIO_PIN_6
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#define I2C1SDA_PERIPH SYSCTL_PERIPH_GPIOA
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#define I2C1SDA_PORT GPIO_PORTA_BASE
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#define I2C1SDA_PIN GPIO_PIN_7
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWO_PORT GPIO_PORTC_BASE
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#define SWO_PIN GPIO_PIN_3
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#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
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#define TCK_PORT GPIO_PORTC_BASE
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#define TCK_PIN GPIO_PIN_0
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#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDI_PORT GPIO_PORTC_BASE
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#define TDI_PIN GPIO_PIN_2
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#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
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#define TDO_PORT GPIO_PORTC_BASE
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#define TDO_PIN GPIO_PIN_3
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#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
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#define TMS_PORT GPIO_PORTC_BASE
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#define TMS_PIN GPIO_PIN_1
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#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
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#define TRST_PORT GPIO_PORTB_BASE
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#define TRST_PIN GPIO_PIN_7
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#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0RX_PORT GPIO_PORTA_BASE
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#define U0RX_PIN GPIO_PIN_0
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#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define U0TX_PORT GPIO_PORTA_BASE
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#define U0TX_PIN GPIO_PIN_1
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#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1RX_PORT GPIO_PORTD_BASE
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#define U1RX_PIN GPIO_PIN_2
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#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define U1TX_PORT GPIO_PORTD_BASE
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#define U1TX_PIN GPIO_PIN_3
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#define U2RX_PERIPH SYSCTL_PERIPH_GPIOG
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#define U2RX_PORT GPIO_PORTG_BASE
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#define U2RX_PIN GPIO_PIN_0
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#define U2TX_PERIPH SYSCTL_PERIPH_GPIOG
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#define U2TX_PORT GPIO_PORTG_BASE
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#define U2TX_PIN GPIO_PIN_1
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#endif // PART_LM3S8938
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//*****************************************************************************
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//
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// LM3S8962 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S8962
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#define C0O_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0O_PORT GPIO_PORTB_BASE
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#define C0O_PIN GPIO_PIN_5
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#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_MINUS_PORT GPIO_PORTB_BASE
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#define C0_MINUS_PIN GPIO_PIN_4
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#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
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#define C0_PLUS_PORT GPIO_PORTB_BASE
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#define C0_PLUS_PIN GPIO_PIN_6
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#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0RX_PORT GPIO_PORTD_BASE
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#define CAN0RX_PIN GPIO_PIN_0
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#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
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#define CAN0TX_PORT GPIO_PORTD_BASE
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#define CAN0TX_PIN GPIO_PIN_1
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#define CCP0_PERIPH SYSCTL_PERIPH_GPIOD
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#define CCP0_PORT GPIO_PORTD_BASE
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#define CCP0_PIN GPIO_PIN_4
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#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
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#define CCP1_PORT GPIO_PORTA_BASE
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#define CCP1_PIN GPIO_PIN_6
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#define FAULT_PERIPH SYSCTL_PERIPH_GPIOD
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#define FAULT_PORT GPIO_PORTD_BASE
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#define FAULT_PIN GPIO_PIN_6
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#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SCL_PORT GPIO_PORTB_BASE
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#define I2C0SCL_PIN GPIO_PIN_2
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#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
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#define I2C0SDA_PORT GPIO_PORTB_BASE
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#define I2C0SDA_PIN GPIO_PIN_3
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#define IDX0_PERIPH SYSCTL_PERIPH_GPIOD
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#define IDX0_PORT GPIO_PORTD_BASE
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#define IDX0_PIN GPIO_PIN_7
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#define IDX1_PERIPH SYSCTL_PERIPH_GPIOF
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#define IDX1_PORT GPIO_PORTF_BASE
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#define IDX1_PIN GPIO_PIN_1
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#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED0_PORT GPIO_PORTF_BASE
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#define LED0_PIN GPIO_PIN_3
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#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
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#define LED1_PORT GPIO_PORTF_BASE
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#define LED1_PIN GPIO_PIN_2
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#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHA0_PORT GPIO_PORTC_BASE
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#define PHA0_PIN GPIO_PIN_4
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#define PHA1_PERIPH SYSCTL_PERIPH_GPIOE
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#define PHA1_PORT GPIO_PORTE_BASE
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#define PHA1_PIN GPIO_PIN_3
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#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
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#define PHB0_PORT GPIO_PORTC_BASE
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#define PHB0_PIN GPIO_PIN_6
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#define PHB1_PERIPH SYSCTL_PERIPH_GPIOE
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#define PHB1_PORT GPIO_PORTE_BASE
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#define PHB1_PIN GPIO_PIN_2
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#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
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#define PWM0_PORT GPIO_PORTF_BASE
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#define PWM0_PIN GPIO_PIN_0
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#define PWM1_PERIPH SYSCTL_PERIPH_GPIOG
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#define PWM1_PORT GPIO_PORTG_BASE
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#define PWM1_PIN GPIO_PIN_1
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#define PWM2_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM2_PORT GPIO_PORTB_BASE
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#define PWM2_PIN GPIO_PIN_0
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#define PWM3_PERIPH SYSCTL_PERIPH_GPIOB
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#define PWM3_PORT GPIO_PORTB_BASE
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#define PWM3_PIN GPIO_PIN_1
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#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM4_PORT GPIO_PORTE_BASE
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#define PWM4_PIN GPIO_PIN_0
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#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
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#define PWM5_PORT GPIO_PORTE_BASE
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#define PWM5_PIN GPIO_PIN_1
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#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0CLK_PORT GPIO_PORTA_BASE
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#define SSI0CLK_PIN GPIO_PIN_2
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#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0FSS_PORT GPIO_PORTA_BASE
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#define SSI0FSS_PIN GPIO_PIN_3
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#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0RX_PORT GPIO_PORTA_BASE
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#define SSI0RX_PIN GPIO_PIN_4
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#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
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#define SSI0TX_PORT GPIO_PORTA_BASE
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#define SSI0TX_PIN GPIO_PIN_5
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#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWCLK_PORT GPIO_PORTC_BASE
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#define SWCLK_PIN GPIO_PIN_0
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#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
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#define SWDIO_PORT GPIO_PORTC_BASE
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#define SWDIO_PIN GPIO_PIN_1
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|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S8962
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8970 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8970
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CAN1RX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1RX_PORT GPIO_PORTF_BASE
|
|
#define CAN1RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN1TX_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define CAN1TX_PORT GPIO_PORTF_BASE
|
|
#define CAN1TX_PIN GPIO_PIN_1
|
|
|
|
#define CAN2RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CAN2RX_PORT GPIO_PORTE_BASE
|
|
#define CAN2RX_PIN GPIO_PIN_4
|
|
|
|
#define CAN2TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define CAN2TX_PORT GPIO_PORTE_BASE
|
|
#define CAN2TX_PIN GPIO_PIN_5
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define I2C0SCL_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SCL_PORT GPIO_PORTB_BASE
|
|
#define I2C0SCL_PIN GPIO_PIN_2
|
|
|
|
#define I2C0SDA_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define I2C0SDA_PORT GPIO_PORTB_BASE
|
|
#define I2C0SDA_PIN GPIO_PIN_3
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SSI1CLK_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1CLK_PORT GPIO_PORTE_BASE
|
|
#define SSI1CLK_PIN GPIO_PIN_0
|
|
|
|
#define SSI1FSS_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1FSS_PORT GPIO_PORTE_BASE
|
|
#define SSI1FSS_PIN GPIO_PIN_1
|
|
|
|
#define SSI1RX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1RX_PORT GPIO_PORTE_BASE
|
|
#define SSI1RX_PIN GPIO_PIN_2
|
|
|
|
#define SSI1TX_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define SSI1TX_PORT GPIO_PORTE_BASE
|
|
#define SSI1TX_PIN GPIO_PIN_3
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#define U1RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1RX_PORT GPIO_PORTD_BASE
|
|
#define U1RX_PIN GPIO_PIN_2
|
|
|
|
#define U1TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define U1TX_PORT GPIO_PORTD_BASE
|
|
#define U1TX_PIN GPIO_PIN_3
|
|
|
|
#endif // PART_LM3S8970
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8971 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8971
|
|
|
|
#define C0O_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define C0O_PORT GPIO_PORTC_BASE
|
|
#define C0O_PIN GPIO_PIN_5
|
|
|
|
#define C0_MINUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_MINUS_PORT GPIO_PORTB_BASE
|
|
#define C0_MINUS_PIN GPIO_PIN_4
|
|
|
|
#define C0_PLUS_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define C0_PLUS_PORT GPIO_PORTB_BASE
|
|
#define C0_PLUS_PIN GPIO_PIN_6
|
|
|
|
#define CAN0RX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0RX_PORT GPIO_PORTD_BASE
|
|
#define CAN0RX_PIN GPIO_PIN_0
|
|
|
|
#define CAN0TX_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define CAN0TX_PORT GPIO_PORTD_BASE
|
|
#define CAN0TX_PIN GPIO_PIN_1
|
|
|
|
#define CCP0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP0_PORT GPIO_PORTB_BASE
|
|
#define CCP0_PIN GPIO_PIN_0
|
|
|
|
#define CCP1_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP1_PORT GPIO_PORTA_BASE
|
|
#define CCP1_PIN GPIO_PIN_6
|
|
|
|
#define CCP2_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP2_PORT GPIO_PORTB_BASE
|
|
#define CCP2_PIN GPIO_PIN_1
|
|
|
|
#define CCP3_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define CCP3_PORT GPIO_PORTC_BASE
|
|
#define CCP3_PIN GPIO_PIN_6
|
|
|
|
#define CCP4_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define CCP4_PORT GPIO_PORTA_BASE
|
|
#define CCP4_PIN GPIO_PIN_7
|
|
|
|
#define CCP5_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define CCP5_PORT GPIO_PORTB_BASE
|
|
#define CCP5_PIN GPIO_PIN_5
|
|
|
|
#define FAULT_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define FAULT_PORT GPIO_PORTB_BASE
|
|
#define FAULT_PIN GPIO_PIN_3
|
|
|
|
#define IDX0_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define IDX0_PORT GPIO_PORTB_BASE
|
|
#define IDX0_PIN GPIO_PIN_2
|
|
|
|
#define LED0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED0_PORT GPIO_PORTF_BASE
|
|
#define LED0_PIN GPIO_PIN_3
|
|
|
|
#define LED1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define LED1_PORT GPIO_PORTF_BASE
|
|
#define LED1_PIN GPIO_PIN_2
|
|
|
|
#define PHA0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHA0_PORT GPIO_PORTC_BASE
|
|
#define PHA0_PIN GPIO_PIN_4
|
|
|
|
#define PHB0_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define PHB0_PORT GPIO_PORTC_BASE
|
|
#define PHB0_PIN GPIO_PIN_7
|
|
|
|
#define PWM0_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM0_PORT GPIO_PORTF_BASE
|
|
#define PWM0_PIN GPIO_PIN_0
|
|
|
|
#define PWM1_PERIPH SYSCTL_PERIPH_GPIOF
|
|
#define PWM1_PORT GPIO_PORTF_BASE
|
|
#define PWM1_PIN GPIO_PIN_1
|
|
|
|
#define PWM2_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM2_PORT GPIO_PORTD_BASE
|
|
#define PWM2_PIN GPIO_PIN_2
|
|
|
|
#define PWM3_PERIPH SYSCTL_PERIPH_GPIOD
|
|
#define PWM3_PORT GPIO_PORTD_BASE
|
|
#define PWM3_PIN GPIO_PIN_3
|
|
|
|
#define PWM4_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM4_PORT GPIO_PORTE_BASE
|
|
#define PWM4_PIN GPIO_PIN_0
|
|
|
|
#define PWM5_PERIPH SYSCTL_PERIPH_GPIOE
|
|
#define PWM5_PORT GPIO_PORTE_BASE
|
|
#define PWM5_PIN GPIO_PIN_1
|
|
|
|
#define SSI0CLK_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0CLK_PORT GPIO_PORTA_BASE
|
|
#define SSI0CLK_PIN GPIO_PIN_2
|
|
|
|
#define SSI0FSS_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0FSS_PORT GPIO_PORTA_BASE
|
|
#define SSI0FSS_PIN GPIO_PIN_3
|
|
|
|
#define SSI0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0RX_PORT GPIO_PORTA_BASE
|
|
#define SSI0RX_PIN GPIO_PIN_4
|
|
|
|
#define SSI0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define SSI0TX_PORT GPIO_PORTA_BASE
|
|
#define SSI0TX_PIN GPIO_PIN_5
|
|
|
|
#define SWCLK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWCLK_PORT GPIO_PORTC_BASE
|
|
#define SWCLK_PIN GPIO_PIN_0
|
|
|
|
#define SWDIO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWDIO_PORT GPIO_PORTC_BASE
|
|
#define SWDIO_PIN GPIO_PIN_1
|
|
|
|
#define SWO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define SWO_PORT GPIO_PORTC_BASE
|
|
#define SWO_PIN GPIO_PIN_3
|
|
|
|
#define TCK_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TCK_PORT GPIO_PORTC_BASE
|
|
#define TCK_PIN GPIO_PIN_0
|
|
|
|
#define TDI_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDI_PORT GPIO_PORTC_BASE
|
|
#define TDI_PIN GPIO_PIN_2
|
|
|
|
#define TDO_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TDO_PORT GPIO_PORTC_BASE
|
|
#define TDO_PIN GPIO_PIN_3
|
|
|
|
#define TMS_PERIPH SYSCTL_PERIPH_GPIOC
|
|
#define TMS_PORT GPIO_PORTC_BASE
|
|
#define TMS_PIN GPIO_PIN_1
|
|
|
|
#define TRST_PERIPH SYSCTL_PERIPH_GPIOB
|
|
#define TRST_PORT GPIO_PORTB_BASE
|
|
#define TRST_PIN GPIO_PIN_7
|
|
|
|
#define U0RX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0RX_PORT GPIO_PORTA_BASE
|
|
#define U0RX_PIN GPIO_PIN_0
|
|
|
|
#define U0TX_PERIPH SYSCTL_PERIPH_GPIOA
|
|
#define U0TX_PORT GPIO_PORTA_BASE
|
|
#define U0TX_PIN GPIO_PIN_1
|
|
|
|
#endif // PART_LM3S8971
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8C62 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8C62
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#endif // PART_LM3S8C62
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S8G62 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S8G62
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#endif // PART_LM3S8G62
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9781 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9781
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_CAN2RX 0x00041002
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_CAN2TX 0x00041402
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9781
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9790 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9790
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S9790
|
|
|
|
//*****************************************************************************
|
|
//
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// LM3S9792 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S9792
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#define GPIO_PA0_U0RX 0x00000001
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#define GPIO_PA0_I2C1SCL 0x00000008
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#define GPIO_PA0_U1RX 0x00000009
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#define GPIO_PA1_U0TX 0x00000401
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#define GPIO_PA1_I2C1SDA 0x00000408
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#define GPIO_PA1_U1TX 0x00000409
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#define GPIO_PA2_SSI0CLK 0x00000801
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#define GPIO_PA2_PWM4 0x00000804
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#define GPIO_PA2_I2S0RXSD 0x00000809
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#define GPIO_PA3_SSI0FSS 0x00000C01
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#define GPIO_PA3_PWM5 0x00000C04
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#define GPIO_PA3_I2S0RXMCLK 0x00000C09
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#define GPIO_PA4_SSI0RX 0x00001001
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#define GPIO_PA4_PWM6 0x00001004
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#define GPIO_PA4_CAN0RX 0x00001005
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#define GPIO_PA4_I2S0TXSCK 0x00001009
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#define GPIO_PA5_SSI0TX 0x00001401
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#define GPIO_PA5_PWM7 0x00001404
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#define GPIO_PA5_CAN0TX 0x00001405
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#define GPIO_PA5_I2S0TXWS 0x00001409
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#define GPIO_PA6_I2C1SCL 0x00001801
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#define GPIO_PA6_CCP1 0x00001802
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#define GPIO_PA6_PWM0 0x00001804
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#define GPIO_PA6_PWM4 0x00001805
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#define GPIO_PA6_CAN0RX 0x00001806
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#define GPIO_PA6_USB0EPEN 0x00001808
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#define GPIO_PA6_U1CTS 0x00001809
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#define GPIO_PA7_I2C1SDA 0x00001C01
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#define GPIO_PA7_CCP4 0x00001C02
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#define GPIO_PA7_PWM1 0x00001C04
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#define GPIO_PA7_PWM5 0x00001C05
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#define GPIO_PA7_CAN0TX 0x00001C06
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#define GPIO_PA7_CCP3 0x00001C07
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#define GPIO_PA7_USB0PFLT 0x00001C08
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#define GPIO_PA7_U1DCD 0x00001C09
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#define GPIO_PB0_CCP0 0x00010001
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#define GPIO_PB0_PWM2 0x00010002
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#define GPIO_PB0_U1RX 0x00010005
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#define GPIO_PB1_CCP2 0x00010401
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#define GPIO_PB1_PWM3 0x00010402
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#define GPIO_PB1_CCP1 0x00010404
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#define GPIO_PB1_U1TX 0x00010405
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#define GPIO_PB2_I2C0SCL 0x00010801
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#define GPIO_PB2_IDX0 0x00010802
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#define GPIO_PB2_CCP3 0x00010804
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#define GPIO_PB2_CCP0 0x00010805
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#define GPIO_PB2_USB0EPEN 0x00010808
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#define GPIO_PB3_I2C0SDA 0x00010C01
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#define GPIO_PB3_FAULT0 0x00010C02
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#define GPIO_PB3_FAULT3 0x00010C04
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#define GPIO_PB3_USB0PFLT 0x00010C08
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#define GPIO_PB4_U2RX 0x00011004
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#define GPIO_PB4_CAN0RX 0x00011005
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#define GPIO_PB4_IDX0 0x00011006
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#define GPIO_PB4_U1RX 0x00011007
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#define GPIO_PB4_EPI0S23 0x00011008
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#define GPIO_PB5_C0O 0x00011401
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#define GPIO_PB5_CCP5 0x00011402
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#define GPIO_PB5_CCP6 0x00011403
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#define GPIO_PB5_CCP0 0x00011404
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#define GPIO_PB5_CAN0TX 0x00011405
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#define GPIO_PB5_CCP2 0x00011406
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#define GPIO_PB5_U1TX 0x00011407
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#define GPIO_PB5_EPI0S22 0x00011408
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#define GPIO_PB6_CCP1 0x00011801
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#define GPIO_PB6_CCP7 0x00011802
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#define GPIO_PB6_C0O 0x00011803
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#define GPIO_PB6_FAULT1 0x00011804
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#define GPIO_PB6_IDX0 0x00011805
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#define GPIO_PB6_CCP5 0x00011806
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#define GPIO_PB6_I2S0TXSCK 0x00011809
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#define GPIO_PB7_NMI 0x00011C04
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#define GPIO_PC0_TCK 0x00020003
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#define GPIO_PC0_SWCLK 0x00020003
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#define GPIO_PC1_TMS 0x00020403
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#define GPIO_PC1_SWDIO 0x00020403
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#define GPIO_PC2_TDI 0x00020803
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#define GPIO_PC3_SWO 0x00020C03
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#define GPIO_PC3_TDO 0x00020C03
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#define GPIO_PC4_CCP5 0x00021001
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#define GPIO_PC4_PHA0 0x00021002
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#define GPIO_PC4_PWM6 0x00021004
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#define GPIO_PC4_CCP2 0x00021005
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#define GPIO_PC4_CCP4 0x00021006
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#define GPIO_PC4_EPI0S2 0x00021008
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#define GPIO_PC4_CCP1 0x00021009
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#define GPIO_PC5_CCP1 0x00021401
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#define GPIO_PC5_C1O 0x00021402
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#define GPIO_PC5_C0O 0x00021403
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#define GPIO_PC5_FAULT2 0x00021404
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#define GPIO_PC5_CCP3 0x00021405
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#define GPIO_PC5_USB0EPEN 0x00021406
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#define GPIO_PC5_EPI0S3 0x00021408
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#define GPIO_PC6_CCP3 0x00021801
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#define GPIO_PC6_PHB0 0x00021802
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#define GPIO_PC6_C2O 0x00021803
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#define GPIO_PC6_PWM7 0x00021804
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#define GPIO_PC6_U1RX 0x00021805
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#define GPIO_PC6_CCP0 0x00021806
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#define GPIO_PC6_USB0PFLT 0x00021807
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#define GPIO_PC6_EPI0S4 0x00021808
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#define GPIO_PC7_CCP4 0x00021C01
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#define GPIO_PC7_PHB0 0x00021C02
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#define GPIO_PC7_CCP0 0x00021C04
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#define GPIO_PC7_U1TX 0x00021C05
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#define GPIO_PC7_USB0PFLT 0x00021C06
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#define GPIO_PC7_C1O 0x00021C07
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#define GPIO_PC7_EPI0S5 0x00021C08
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#define GPIO_PD0_PWM0 0x00030001
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#define GPIO_PD0_CAN0RX 0x00030002
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#define GPIO_PD0_IDX0 0x00030003
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#define GPIO_PD0_U2RX 0x00030004
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#define GPIO_PD0_U1RX 0x00030005
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#define GPIO_PD0_CCP6 0x00030006
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#define GPIO_PD0_I2S0RXSCK 0x00030008
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#define GPIO_PD0_U1CTS 0x00030009
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#define GPIO_PD1_PWM1 0x00030401
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#define GPIO_PD1_CAN0TX 0x00030402
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#define GPIO_PD1_PHA0 0x00030403
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#define GPIO_PD1_U2TX 0x00030404
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#define GPIO_PD1_U1TX 0x00030405
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#define GPIO_PD1_CCP7 0x00030406
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#define GPIO_PD1_I2S0RXWS 0x00030408
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#define GPIO_PD1_U1DCD 0x00030409
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#define GPIO_PD1_CCP2 0x0003040A
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#define GPIO_PD1_PHB1 0x0003040B
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#define GPIO_PD2_U1RX 0x00030801
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#define GPIO_PD2_CCP6 0x00030802
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#define GPIO_PD2_PWM2 0x00030803
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#define GPIO_PD2_CCP5 0x00030804
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#define GPIO_PD2_EPI0S20 0x00030808
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#define GPIO_PD3_U1TX 0x00030C01
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#define GPIO_PD3_CCP7 0x00030C02
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#define GPIO_PD3_PWM3 0x00030C03
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#define GPIO_PD3_CCP0 0x00030C04
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#define GPIO_PD3_EPI0S21 0x00030C08
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#define GPIO_PD4_CCP0 0x00031001
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#define GPIO_PD4_CCP3 0x00031002
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#define GPIO_PD4_I2S0RXSD 0x00031008
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#define GPIO_PD4_U1RI 0x00031009
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#define GPIO_PD4_EPI0S19 0x0003100A
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#define GPIO_PD5_CCP2 0x00031401
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#define GPIO_PD5_CCP4 0x00031402
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#define GPIO_PD5_I2S0RXMCLK 0x00031408
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#define GPIO_PD5_U2RX 0x00031409
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#define GPIO_PD5_EPI0S28 0x0003140A
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#define GPIO_PD6_FAULT0 0x00031801
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#define GPIO_PD6_I2S0TXSCK 0x00031808
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#define GPIO_PD6_U2TX 0x00031809
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#define GPIO_PD6_EPI0S29 0x0003180A
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#define GPIO_PD7_IDX0 0x00031C01
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#define GPIO_PD7_C0O 0x00031C02
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#define GPIO_PD7_CCP1 0x00031C03
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#define GPIO_PD7_I2S0TXWS 0x00031C08
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#define GPIO_PD7_U1DTR 0x00031C09
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#define GPIO_PD7_EPI0S30 0x00031C0A
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#define GPIO_PE0_PWM4 0x00040001
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#define GPIO_PE0_SSI1CLK 0x00040002
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#define GPIO_PE0_CCP3 0x00040003
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#define GPIO_PE0_EPI0S8 0x00040008
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#define GPIO_PE0_USB0PFLT 0x00040009
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#define GPIO_PE1_PWM5 0x00040401
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#define GPIO_PE1_SSI1FSS 0x00040402
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#define GPIO_PE1_FAULT0 0x00040403
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#define GPIO_PE1_CCP2 0x00040404
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#define GPIO_PE1_CCP6 0x00040405
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#define GPIO_PE1_EPI0S9 0x00040408
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#define GPIO_PE2_CCP4 0x00040801
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#define GPIO_PE2_SSI1RX 0x00040802
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#define GPIO_PE2_PHB1 0x00040803
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#define GPIO_PE2_PHA0 0x00040804
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#define GPIO_PE2_CCP2 0x00040805
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#define GPIO_PE2_EPI0S24 0x00040808
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#define GPIO_PE3_CCP1 0x00040C01
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#define GPIO_PE3_SSI1TX 0x00040C02
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#define GPIO_PE3_PHA1 0x00040C03
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#define GPIO_PE3_PHB0 0x00040C04
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#define GPIO_PE3_CCP7 0x00040C05
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#define GPIO_PE3_EPI0S25 0x00040C08
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#define GPIO_PE4_CCP3 0x00041001
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#define GPIO_PE4_FAULT0 0x00041004
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#define GPIO_PE4_U2TX 0x00041005
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#define GPIO_PE4_CCP2 0x00041006
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#define GPIO_PE4_I2S0TXWS 0x00041009
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#define GPIO_PE5_CCP5 0x00041401
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#define GPIO_PE5_I2S0TXSD 0x00041409
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#define GPIO_PE6_PWM4 0x00041801
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#define GPIO_PE6_C1O 0x00041802
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#define GPIO_PE6_U1CTS 0x00041809
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#define GPIO_PE7_PWM5 0x00041C01
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#define GPIO_PE7_C2O 0x00041C02
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#define GPIO_PE7_U1DCD 0x00041C09
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#define GPIO_PF0_CAN1RX 0x00050001
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#define GPIO_PF0_PHB0 0x00050002
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#define GPIO_PF0_PWM0 0x00050003
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#define GPIO_PF0_I2S0TXSD 0x00050008
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#define GPIO_PF0_U1DSR 0x00050009
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#define GPIO_PF1_CAN1TX 0x00050401
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#define GPIO_PF1_IDX1 0x00050402
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#define GPIO_PF1_PWM1 0x00050403
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#define GPIO_PF1_I2S0TXMCLK 0x00050408
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#define GPIO_PF1_U1RTS 0x00050409
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#define GPIO_PF1_CCP3 0x0005040A
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#define GPIO_PF2_LED1 0x00050801
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#define GPIO_PF2_PWM4 0x00050802
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#define GPIO_PF2_PWM2 0x00050804
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#define GPIO_PF2_SSI1CLK 0x00050809
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#define GPIO_PF3_LED0 0x00050C01
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#define GPIO_PF3_PWM5 0x00050C02
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#define GPIO_PF3_PWM3 0x00050C04
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#define GPIO_PF3_SSI1FSS 0x00050C09
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#define GPIO_PF4_CCP0 0x00051001
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#define GPIO_PF4_C0O 0x00051002
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#define GPIO_PF4_FAULT0 0x00051004
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#define GPIO_PF4_EPI0S12 0x00051008
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#define GPIO_PF4_SSI1RX 0x00051009
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#define GPIO_PF5_CCP2 0x00051401
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#define GPIO_PF5_C1O 0x00051402
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#define GPIO_PF5_EPI0S15 0x00051408
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#define GPIO_PF5_SSI1TX 0x00051409
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#define GPIO_PG0_U2RX 0x00060001
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#define GPIO_PG0_PWM0 0x00060002
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#define GPIO_PG0_I2C1SCL 0x00060003
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#define GPIO_PG0_PWM4 0x00060004
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#define GPIO_PG0_USB0EPEN 0x00060007
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#define GPIO_PG0_EPI0S13 0x00060008
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#define GPIO_PG1_U2TX 0x00060401
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#define GPIO_PG1_PWM1 0x00060402
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#define GPIO_PG1_I2C1SDA 0x00060403
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#define GPIO_PG1_PWM5 0x00060404
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#define GPIO_PG1_EPI0S14 0x00060408
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#define GPIO_PG7_PHB1 0x00061C01
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#define GPIO_PG7_PWM7 0x00061C04
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#define GPIO_PG7_CCP5 0x00061C08
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#define GPIO_PG7_EPI0S31 0x00061C09
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#define GPIO_PH0_CCP6 0x00070001
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#define GPIO_PH0_PWM2 0x00070002
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#define GPIO_PH0_EPI0S6 0x00070008
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#define GPIO_PH0_PWM4 0x00070009
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#define GPIO_PH1_CCP7 0x00070401
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#define GPIO_PH1_PWM3 0x00070402
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#define GPIO_PH1_EPI0S7 0x00070408
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#define GPIO_PH1_PWM5 0x00070409
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#define GPIO_PH2_IDX1 0x00070801
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#define GPIO_PH2_C1O 0x00070802
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#define GPIO_PH2_FAULT3 0x00070804
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#define GPIO_PH2_EPI0S1 0x00070808
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#define GPIO_PH3_PHB0 0x00070C01
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#define GPIO_PH3_FAULT0 0x00070C02
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#define GPIO_PH3_USB0EPEN 0x00070C04
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#define GPIO_PH3_EPI0S0 0x00070C08
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#define GPIO_PH4_USB0PFLT 0x00071004
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#define GPIO_PH4_EPI0S10 0x00071008
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#define GPIO_PH4_SSI1CLK 0x0007100B
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#define GPIO_PH5_EPI0S11 0x00071408
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#define GPIO_PH5_FAULT2 0x0007140A
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#define GPIO_PH5_SSI1FSS 0x0007140B
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#define GPIO_PH6_EPI0S26 0x00071808
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#define GPIO_PH6_PWM4 0x0007180A
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#define GPIO_PH6_SSI1RX 0x0007180B
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#define GPIO_PH7_EPI0S27 0x00071C08
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#define GPIO_PH7_PWM5 0x00071C0A
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#define GPIO_PH7_SSI1TX 0x00071C0B
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#define GPIO_PJ0_EPI0S16 0x00080008
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#define GPIO_PJ0_PWM0 0x0008000A
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#define GPIO_PJ0_I2C1SCL 0x0008000B
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#define GPIO_PJ1_EPI0S17 0x00080408
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#define GPIO_PJ1_USB0PFLT 0x00080409
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#define GPIO_PJ1_PWM1 0x0008040A
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#define GPIO_PJ1_I2C1SDA 0x0008040B
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#define GPIO_PJ2_EPI0S18 0x00080808
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#define GPIO_PJ2_CCP0 0x00080809
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#define GPIO_PJ2_FAULT0 0x0008080A
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#define GPIO_PJ3_EPI0S19 0x00080C08
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#define GPIO_PJ3_U1CTS 0x00080C09
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#define GPIO_PJ3_CCP6 0x00080C0A
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#define GPIO_PJ4_EPI0S28 0x00081008
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#define GPIO_PJ4_U1DCD 0x00081009
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#define GPIO_PJ4_CCP4 0x0008100A
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#define GPIO_PJ5_EPI0S29 0x00081408
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#define GPIO_PJ5_U1DSR 0x00081409
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#define GPIO_PJ5_CCP2 0x0008140A
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#define GPIO_PJ6_EPI0S30 0x00081808
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#define GPIO_PJ6_U1RTS 0x00081809
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#define GPIO_PJ6_CCP1 0x0008180A
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#define GPIO_PJ7_U1DTR 0x00081C09
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#define GPIO_PJ7_CCP0 0x00081C0A
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#endif // PART_LM3S9792
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//*****************************************************************************
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//
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// LM3S9971 Port/Pin Mapping Definitions
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//
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//*****************************************************************************
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#ifdef PART_LM3S9971
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#define GPIO_PA0_U0RX 0x00000001
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#define GPIO_PA0_I2C1SCL 0x00000008
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#define GPIO_PA0_U1RX 0x00000009
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#define GPIO_PA1_U0TX 0x00000401
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#define GPIO_PA1_I2C1SDA 0x00000408
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#define GPIO_PA1_U1TX 0x00000409
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#define GPIO_PA2_SSI0CLK 0x00000801
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#define GPIO_PA2_TXD2 0x00000803
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#define GPIO_PA2_PWM4 0x00000804
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#define GPIO_PA2_I2S0RXSD 0x00000809
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#define GPIO_PA3_SSI0FSS 0x00000C01
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#define GPIO_PA3_TXD1 0x00000C03
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#define GPIO_PA3_PWM5 0x00000C04
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#define GPIO_PA3_I2S0RXMCLK 0x00000C09
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#define GPIO_PA4_SSI0RX 0x00001001
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#define GPIO_PA4_TXD0 0x00001003
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#define GPIO_PA4_CAN0RX 0x00001005
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#define GPIO_PA4_I2S0TXSCK 0x00001009
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#define GPIO_PA5_SSI0TX 0x00001401
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#define GPIO_PA5_RXDV 0x00001403
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#define GPIO_PA5_CAN0TX 0x00001405
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#define GPIO_PA5_I2S0TXWS 0x00001409
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#define GPIO_PA6_I2C1SCL 0x00001801
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#define GPIO_PA6_CCP1 0x00001802
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#define GPIO_PA6_RXCK 0x00001803
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#define GPIO_PA6_PWM0 0x00001804
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#define GPIO_PA6_PWM4 0x00001805
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#define GPIO_PA6_CAN0RX 0x00001806
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#define GPIO_PA6_USB0EPEN 0x00001808
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#define GPIO_PA6_U1CTS 0x00001809
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#define GPIO_PA7_I2C1SDA 0x00001C01
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#define GPIO_PA7_CCP4 0x00001C02
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#define GPIO_PA7_RXER 0x00001C03
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|
#define GPIO_PA7_PWM1 0x00001C04
|
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#define GPIO_PA7_PWM5 0x00001C05
|
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#define GPIO_PA7_CAN0TX 0x00001C06
|
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#define GPIO_PA7_CCP3 0x00001C07
|
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#define GPIO_PA7_USB0PFLT 0x00001C08
|
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#define GPIO_PA7_U1DCD 0x00001C09
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|
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#define GPIO_PB0_CCP0 0x00010001
|
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#define GPIO_PB0_PWM2 0x00010002
|
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#define GPIO_PB0_U1RX 0x00010005
|
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|
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#define GPIO_PB1_CCP2 0x00010401
|
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#define GPIO_PB1_PWM3 0x00010402
|
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#define GPIO_PB1_CCP1 0x00010404
|
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#define GPIO_PB1_U1TX 0x00010405
|
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|
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#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
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#define GPIO_PB2_CCP0 0x00010805
|
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#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
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#define GPIO_PB3_FAULT0 0x00010C02
|
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#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
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|
|
#define GPIO_PB4_U2RX 0x00011004
|
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#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
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#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
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#define GPIO_PB5_CCP5 0x00011402
|
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#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
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#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
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#define GPIO_PB6_CCP7 0x00011802
|
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#define GPIO_PB6_C0O 0x00011803
|
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#define GPIO_PB6_FAULT1 0x00011804
|
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#define GPIO_PB6_IDX0 0x00011805
|
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#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
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|
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#define GPIO_PB7_NMI 0x00011C04
|
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#define GPIO_PB7_RXD1 0x00011C07
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|
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#define GPIO_PC0_TCK 0x00020003
|
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#define GPIO_PC0_SWCLK 0x00020003
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|
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#define GPIO_PC1_TMS 0x00020403
|
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#define GPIO_PC1_SWDIO 0x00020403
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|
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#define GPIO_PC2_TDI 0x00020803
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|
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#define GPIO_PC3_SWO 0x00020C03
|
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#define GPIO_PC3_TDO 0x00020C03
|
|
|
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#define GPIO_PC4_CCP5 0x00021001
|
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#define GPIO_PC4_PHA0 0x00021002
|
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#define GPIO_PC4_TXD3 0x00021003
|
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#define GPIO_PC4_CCP2 0x00021005
|
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#define GPIO_PC4_CCP4 0x00021006
|
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#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
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#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9971
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9997 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9997
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S9997
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9B81 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9B81
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_CAN2RX 0x00041002
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_CAN2TX 0x00041402
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9B81
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9B90 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9B90
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S9B90
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9B92 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9B92
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9B92
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9B95 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9B95
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9B95
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9B96 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9B96
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9B96
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9BN2 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9BN2
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9BN2
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9BN5 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9BN5
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9BN5
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9BN6 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9BN6
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9BN6
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9C97 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9C97
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S9C97
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9CN5 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9CN5
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9CN5
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9D81 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9D81
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_CAN2RX 0x00041002
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_CAN2TX 0x00041402
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9D81
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9D90 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9D90
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S9D90
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9D92 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9D92
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9D92
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9D95 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9D95
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9D95
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9D96 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9D96
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9D96
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9DN5 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9DN5
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9DN5
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9DN6 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9DN6
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9DN6
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9G97 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9G97
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S9G97
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9GN5 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9GN5
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_C2O 0x00051802
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_EPI0S12 0x00051C08
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_EPI0S15 0x00061008
|
|
#define GPIO_PG4_PWM6 0x00061009
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_PWM7 0x00061408
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_PWM6 0x00061804
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9GN5
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9L71 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9L71
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_TXD2 0x00000803
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_TXD1 0x00000C03
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_TXD0 0x00001003
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_RXDV 0x00001403
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_RXCK 0x00001803
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_RXER 0x00001C03
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
#define GPIO_PB7_RXD1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_TXD3 0x00021003
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_RXDV 0x00030007
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_TXER 0x00030407
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_TXD3 0x00031004
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_TXD2 0x00031404
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_TXD1 0x00031804
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_TXD0 0x00031C04
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_RXD0 0x00041007
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_RXCK 0x00050004
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_RXER 0x00050404
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PHYINT 0x00050803
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_MDC 0x00050C03
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_MDIO 0x00051003
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_RXD3 0x00051403
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PF6_CCP1 0x00051801
|
|
#define GPIO_PF6_RXD2 0x00051803
|
|
#define GPIO_PF6_PHA0 0x00051804
|
|
#define GPIO_PF6_I2S0TXMCLK 0x00051809
|
|
#define GPIO_PF6_U1RTS 0x0005180A
|
|
|
|
#define GPIO_PF7_CCP4 0x00051C01
|
|
#define GPIO_PF7_RXD1 0x00051C03
|
|
#define GPIO_PF7_PHB0 0x00051C04
|
|
#define GPIO_PF7_FAULT1 0x00051C09
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG2_PWM0 0x00060801
|
|
#define GPIO_PG2_COL 0x00060803
|
|
#define GPIO_PG2_FAULT0 0x00060804
|
|
#define GPIO_PG2_IDX1 0x00060808
|
|
#define GPIO_PG2_I2S0RXSD 0x00060809
|
|
|
|
#define GPIO_PG3_PWM1 0x00060C01
|
|
#define GPIO_PG3_CRS 0x00060C03
|
|
#define GPIO_PG3_FAULT2 0x00060C04
|
|
#define GPIO_PG3_FAULT0 0x00060C08
|
|
#define GPIO_PG3_I2S0RXMCLK 0x00060C09
|
|
|
|
#define GPIO_PG4_CCP3 0x00061001
|
|
#define GPIO_PG4_RXD0 0x00061003
|
|
#define GPIO_PG4_FAULT1 0x00061004
|
|
#define GPIO_PG4_U1RI 0x0006100A
|
|
|
|
#define GPIO_PG5_CCP5 0x00061401
|
|
#define GPIO_PG5_TXEN 0x00061403
|
|
#define GPIO_PG5_IDX0 0x00061404
|
|
#define GPIO_PG5_FAULT1 0x00061405
|
|
#define GPIO_PG5_I2S0RXSCK 0x00061409
|
|
#define GPIO_PG5_U1DTR 0x0006140A
|
|
|
|
#define GPIO_PG6_PHA1 0x00061801
|
|
#define GPIO_PG6_TXCK 0x00061803
|
|
#define GPIO_PG6_FAULT1 0x00061808
|
|
#define GPIO_PG6_I2S0RXWS 0x00061809
|
|
#define GPIO_PG6_U1RI 0x0006180A
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_TXER 0x00061C03
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_TXD3 0x00070809
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_TXD2 0x00070C09
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_TXD1 0x00071009
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_TXD0 0x00071409
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_RXDV 0x00071809
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_RXCK 0x00071C03
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_RXER 0x00080003
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9L71
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9L97 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9L97
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#endif // PART_LM3S9L97
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9U81 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9U81
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_CAN2RX 0x00041002
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_CAN2TX 0x00041402
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9U81
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9U90 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9U90
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
|
|
#endif // PART_LM3S9U90
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9U92 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9U92
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9U92
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9U95 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9U95
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9U95
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM3S9U96 Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM3S9U96
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_I2C1SCL 0x00000008
|
|
#define GPIO_PA0_U1RX 0x00000009
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_I2C1SDA 0x00000408
|
|
#define GPIO_PA1_U1TX 0x00000409
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000801
|
|
#define GPIO_PA2_PWM4 0x00000804
|
|
#define GPIO_PA2_I2S0RXSD 0x00000809
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C01
|
|
#define GPIO_PA3_PWM5 0x00000C04
|
|
#define GPIO_PA3_I2S0RXMCLK 0x00000C09
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001001
|
|
#define GPIO_PA4_PWM6 0x00001004
|
|
#define GPIO_PA4_CAN0RX 0x00001005
|
|
#define GPIO_PA4_I2S0TXSCK 0x00001009
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001401
|
|
#define GPIO_PA5_PWM7 0x00001404
|
|
#define GPIO_PA5_CAN0TX 0x00001405
|
|
#define GPIO_PA5_I2S0TXWS 0x00001409
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001801
|
|
#define GPIO_PA6_CCP1 0x00001802
|
|
#define GPIO_PA6_PWM0 0x00001804
|
|
#define GPIO_PA6_PWM4 0x00001805
|
|
#define GPIO_PA6_CAN0RX 0x00001806
|
|
#define GPIO_PA6_USB0EPEN 0x00001808
|
|
#define GPIO_PA6_U1CTS 0x00001809
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C01
|
|
#define GPIO_PA7_CCP4 0x00001C02
|
|
#define GPIO_PA7_PWM1 0x00001C04
|
|
#define GPIO_PA7_PWM5 0x00001C05
|
|
#define GPIO_PA7_CAN0TX 0x00001C06
|
|
#define GPIO_PA7_CCP3 0x00001C07
|
|
#define GPIO_PA7_USB0PFLT 0x00001C08
|
|
#define GPIO_PA7_U1DCD 0x00001C09
|
|
|
|
#define GPIO_PB0_CCP0 0x00010001
|
|
#define GPIO_PB0_PWM2 0x00010002
|
|
#define GPIO_PB0_U1RX 0x00010005
|
|
|
|
#define GPIO_PB1_CCP2 0x00010401
|
|
#define GPIO_PB1_PWM3 0x00010402
|
|
#define GPIO_PB1_CCP1 0x00010404
|
|
#define GPIO_PB1_U1TX 0x00010405
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010801
|
|
#define GPIO_PB2_IDX0 0x00010802
|
|
#define GPIO_PB2_CCP3 0x00010804
|
|
#define GPIO_PB2_CCP0 0x00010805
|
|
#define GPIO_PB2_USB0EPEN 0x00010808
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C01
|
|
#define GPIO_PB3_FAULT0 0x00010C02
|
|
#define GPIO_PB3_FAULT3 0x00010C04
|
|
#define GPIO_PB3_USB0PFLT 0x00010C08
|
|
|
|
#define GPIO_PB4_U2RX 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011005
|
|
#define GPIO_PB4_IDX0 0x00011006
|
|
#define GPIO_PB4_U1RX 0x00011007
|
|
#define GPIO_PB4_EPI0S23 0x00011008
|
|
|
|
#define GPIO_PB5_C0O 0x00011401
|
|
#define GPIO_PB5_CCP5 0x00011402
|
|
#define GPIO_PB5_CCP6 0x00011403
|
|
#define GPIO_PB5_CCP0 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011405
|
|
#define GPIO_PB5_CCP2 0x00011406
|
|
#define GPIO_PB5_U1TX 0x00011407
|
|
#define GPIO_PB5_EPI0S22 0x00011408
|
|
|
|
#define GPIO_PB6_CCP1 0x00011801
|
|
#define GPIO_PB6_CCP7 0x00011802
|
|
#define GPIO_PB6_C0O 0x00011803
|
|
#define GPIO_PB6_FAULT1 0x00011804
|
|
#define GPIO_PB6_IDX0 0x00011805
|
|
#define GPIO_PB6_CCP5 0x00011806
|
|
#define GPIO_PB6_I2S0TXSCK 0x00011809
|
|
|
|
#define GPIO_PB7_NMI 0x00011C04
|
|
|
|
#define GPIO_PC0_TCK 0x00020003
|
|
#define GPIO_PC0_SWCLK 0x00020003
|
|
|
|
#define GPIO_PC1_TMS 0x00020403
|
|
#define GPIO_PC1_SWDIO 0x00020403
|
|
|
|
#define GPIO_PC2_TDI 0x00020803
|
|
|
|
#define GPIO_PC3_SWO 0x00020C03
|
|
#define GPIO_PC3_TDO 0x00020C03
|
|
|
|
#define GPIO_PC4_CCP5 0x00021001
|
|
#define GPIO_PC4_PHA0 0x00021002
|
|
#define GPIO_PC4_PWM6 0x00021004
|
|
#define GPIO_PC4_CCP2 0x00021005
|
|
#define GPIO_PC4_CCP4 0x00021006
|
|
#define GPIO_PC4_EPI0S2 0x00021008
|
|
#define GPIO_PC4_CCP1 0x00021009
|
|
|
|
#define GPIO_PC5_CCP1 0x00021401
|
|
#define GPIO_PC5_C1O 0x00021402
|
|
#define GPIO_PC5_C0O 0x00021403
|
|
#define GPIO_PC5_FAULT2 0x00021404
|
|
#define GPIO_PC5_CCP3 0x00021405
|
|
#define GPIO_PC5_USB0EPEN 0x00021406
|
|
#define GPIO_PC5_EPI0S3 0x00021408
|
|
|
|
#define GPIO_PC6_CCP3 0x00021801
|
|
#define GPIO_PC6_PHB0 0x00021802
|
|
#define GPIO_PC6_C2O 0x00021803
|
|
#define GPIO_PC6_PWM7 0x00021804
|
|
#define GPIO_PC6_U1RX 0x00021805
|
|
#define GPIO_PC6_CCP0 0x00021806
|
|
#define GPIO_PC6_USB0PFLT 0x00021807
|
|
#define GPIO_PC6_EPI0S4 0x00021808
|
|
|
|
#define GPIO_PC7_CCP4 0x00021C01
|
|
#define GPIO_PC7_PHB0 0x00021C02
|
|
#define GPIO_PC7_CCP0 0x00021C04
|
|
#define GPIO_PC7_U1TX 0x00021C05
|
|
#define GPIO_PC7_USB0PFLT 0x00021C06
|
|
#define GPIO_PC7_C1O 0x00021C07
|
|
#define GPIO_PC7_EPI0S5 0x00021C08
|
|
|
|
#define GPIO_PD0_PWM0 0x00030001
|
|
#define GPIO_PD0_CAN0RX 0x00030002
|
|
#define GPIO_PD0_IDX0 0x00030003
|
|
#define GPIO_PD0_U2RX 0x00030004
|
|
#define GPIO_PD0_U1RX 0x00030005
|
|
#define GPIO_PD0_CCP6 0x00030006
|
|
#define GPIO_PD0_I2S0RXSCK 0x00030008
|
|
#define GPIO_PD0_U1CTS 0x00030009
|
|
|
|
#define GPIO_PD1_PWM1 0x00030401
|
|
#define GPIO_PD1_CAN0TX 0x00030402
|
|
#define GPIO_PD1_PHA0 0x00030403
|
|
#define GPIO_PD1_U2TX 0x00030404
|
|
#define GPIO_PD1_U1TX 0x00030405
|
|
#define GPIO_PD1_CCP7 0x00030406
|
|
#define GPIO_PD1_I2S0RXWS 0x00030408
|
|
#define GPIO_PD1_U1DCD 0x00030409
|
|
#define GPIO_PD1_CCP2 0x0003040A
|
|
#define GPIO_PD1_PHB1 0x0003040B
|
|
|
|
#define GPIO_PD2_U1RX 0x00030801
|
|
#define GPIO_PD2_CCP6 0x00030802
|
|
#define GPIO_PD2_PWM2 0x00030803
|
|
#define GPIO_PD2_CCP5 0x00030804
|
|
#define GPIO_PD2_EPI0S20 0x00030808
|
|
|
|
#define GPIO_PD3_U1TX 0x00030C01
|
|
#define GPIO_PD3_CCP7 0x00030C02
|
|
#define GPIO_PD3_PWM3 0x00030C03
|
|
#define GPIO_PD3_CCP0 0x00030C04
|
|
#define GPIO_PD3_EPI0S21 0x00030C08
|
|
|
|
#define GPIO_PD4_CCP0 0x00031001
|
|
#define GPIO_PD4_CCP3 0x00031002
|
|
#define GPIO_PD4_I2S0RXSD 0x00031008
|
|
#define GPIO_PD4_U1RI 0x00031009
|
|
#define GPIO_PD4_EPI0S19 0x0003100A
|
|
|
|
#define GPIO_PD5_CCP2 0x00031401
|
|
#define GPIO_PD5_CCP4 0x00031402
|
|
#define GPIO_PD5_I2S0RXMCLK 0x00031408
|
|
#define GPIO_PD5_U2RX 0x00031409
|
|
#define GPIO_PD5_EPI0S28 0x0003140A
|
|
|
|
#define GPIO_PD6_FAULT0 0x00031801
|
|
#define GPIO_PD6_I2S0TXSCK 0x00031808
|
|
#define GPIO_PD6_U2TX 0x00031809
|
|
#define GPIO_PD6_EPI0S29 0x0003180A
|
|
|
|
#define GPIO_PD7_IDX0 0x00031C01
|
|
#define GPIO_PD7_C0O 0x00031C02
|
|
#define GPIO_PD7_CCP1 0x00031C03
|
|
#define GPIO_PD7_I2S0TXWS 0x00031C08
|
|
#define GPIO_PD7_U1DTR 0x00031C09
|
|
#define GPIO_PD7_EPI0S30 0x00031C0A
|
|
|
|
#define GPIO_PE0_PWM4 0x00040001
|
|
#define GPIO_PE0_SSI1CLK 0x00040002
|
|
#define GPIO_PE0_CCP3 0x00040003
|
|
#define GPIO_PE0_EPI0S8 0x00040008
|
|
#define GPIO_PE0_USB0PFLT 0x00040009
|
|
|
|
#define GPIO_PE1_PWM5 0x00040401
|
|
#define GPIO_PE1_SSI1FSS 0x00040402
|
|
#define GPIO_PE1_FAULT0 0x00040403
|
|
#define GPIO_PE1_CCP2 0x00040404
|
|
#define GPIO_PE1_CCP6 0x00040405
|
|
#define GPIO_PE1_EPI0S9 0x00040408
|
|
|
|
#define GPIO_PE2_CCP4 0x00040801
|
|
#define GPIO_PE2_SSI1RX 0x00040802
|
|
#define GPIO_PE2_PHB1 0x00040803
|
|
#define GPIO_PE2_PHA0 0x00040804
|
|
#define GPIO_PE2_CCP2 0x00040805
|
|
#define GPIO_PE2_EPI0S24 0x00040808
|
|
|
|
#define GPIO_PE3_CCP1 0x00040C01
|
|
#define GPIO_PE3_SSI1TX 0x00040C02
|
|
#define GPIO_PE3_PHA1 0x00040C03
|
|
#define GPIO_PE3_PHB0 0x00040C04
|
|
#define GPIO_PE3_CCP7 0x00040C05
|
|
#define GPIO_PE3_EPI0S25 0x00040C08
|
|
|
|
#define GPIO_PE4_CCP3 0x00041001
|
|
#define GPIO_PE4_FAULT0 0x00041004
|
|
#define GPIO_PE4_U2TX 0x00041005
|
|
#define GPIO_PE4_CCP2 0x00041006
|
|
#define GPIO_PE4_I2S0TXWS 0x00041009
|
|
|
|
#define GPIO_PE5_CCP5 0x00041401
|
|
#define GPIO_PE5_I2S0TXSD 0x00041409
|
|
|
|
#define GPIO_PE6_PWM4 0x00041801
|
|
#define GPIO_PE6_C1O 0x00041802
|
|
#define GPIO_PE6_U1CTS 0x00041809
|
|
|
|
#define GPIO_PE7_PWM5 0x00041C01
|
|
#define GPIO_PE7_C2O 0x00041C02
|
|
#define GPIO_PE7_U1DCD 0x00041C09
|
|
|
|
#define GPIO_PF0_CAN1RX 0x00050001
|
|
#define GPIO_PF0_PHB0 0x00050002
|
|
#define GPIO_PF0_PWM0 0x00050003
|
|
#define GPIO_PF0_I2S0TXSD 0x00050008
|
|
#define GPIO_PF0_U1DSR 0x00050009
|
|
|
|
#define GPIO_PF1_CAN1TX 0x00050401
|
|
#define GPIO_PF1_IDX1 0x00050402
|
|
#define GPIO_PF1_PWM1 0x00050403
|
|
#define GPIO_PF1_I2S0TXMCLK 0x00050408
|
|
#define GPIO_PF1_U1RTS 0x00050409
|
|
#define GPIO_PF1_CCP3 0x0005040A
|
|
|
|
#define GPIO_PF2_LED1 0x00050801
|
|
#define GPIO_PF2_PWM4 0x00050802
|
|
#define GPIO_PF2_PWM2 0x00050804
|
|
#define GPIO_PF2_SSI1CLK 0x00050809
|
|
|
|
#define GPIO_PF3_LED0 0x00050C01
|
|
#define GPIO_PF3_PWM5 0x00050C02
|
|
#define GPIO_PF3_PWM3 0x00050C04
|
|
#define GPIO_PF3_SSI1FSS 0x00050C09
|
|
|
|
#define GPIO_PF4_CCP0 0x00051001
|
|
#define GPIO_PF4_C0O 0x00051002
|
|
#define GPIO_PF4_FAULT0 0x00051004
|
|
#define GPIO_PF4_EPI0S12 0x00051008
|
|
#define GPIO_PF4_SSI1RX 0x00051009
|
|
|
|
#define GPIO_PF5_CCP2 0x00051401
|
|
#define GPIO_PF5_C1O 0x00051402
|
|
#define GPIO_PF5_EPI0S15 0x00051408
|
|
#define GPIO_PF5_SSI1TX 0x00051409
|
|
|
|
#define GPIO_PG0_U2RX 0x00060001
|
|
#define GPIO_PG0_PWM0 0x00060002
|
|
#define GPIO_PG0_I2C1SCL 0x00060003
|
|
#define GPIO_PG0_PWM4 0x00060004
|
|
#define GPIO_PG0_USB0EPEN 0x00060007
|
|
#define GPIO_PG0_EPI0S13 0x00060008
|
|
|
|
#define GPIO_PG1_U2TX 0x00060401
|
|
#define GPIO_PG1_PWM1 0x00060402
|
|
#define GPIO_PG1_I2C1SDA 0x00060403
|
|
#define GPIO_PG1_PWM5 0x00060404
|
|
#define GPIO_PG1_EPI0S14 0x00060408
|
|
|
|
#define GPIO_PG7_PHB1 0x00061C01
|
|
#define GPIO_PG7_PWM7 0x00061C04
|
|
#define GPIO_PG7_CCP5 0x00061C08
|
|
#define GPIO_PG7_EPI0S31 0x00061C09
|
|
|
|
#define GPIO_PH0_CCP6 0x00070001
|
|
#define GPIO_PH0_PWM2 0x00070002
|
|
#define GPIO_PH0_EPI0S6 0x00070008
|
|
#define GPIO_PH0_PWM4 0x00070009
|
|
|
|
#define GPIO_PH1_CCP7 0x00070401
|
|
#define GPIO_PH1_PWM3 0x00070402
|
|
#define GPIO_PH1_EPI0S7 0x00070408
|
|
#define GPIO_PH1_PWM5 0x00070409
|
|
|
|
#define GPIO_PH2_IDX1 0x00070801
|
|
#define GPIO_PH2_C1O 0x00070802
|
|
#define GPIO_PH2_FAULT3 0x00070804
|
|
#define GPIO_PH2_EPI0S1 0x00070808
|
|
|
|
#define GPIO_PH3_PHB0 0x00070C01
|
|
#define GPIO_PH3_FAULT0 0x00070C02
|
|
#define GPIO_PH3_USB0EPEN 0x00070C04
|
|
#define GPIO_PH3_EPI0S0 0x00070C08
|
|
|
|
#define GPIO_PH4_USB0PFLT 0x00071004
|
|
#define GPIO_PH4_EPI0S10 0x00071008
|
|
#define GPIO_PH4_SSI1CLK 0x0007100B
|
|
|
|
#define GPIO_PH5_EPI0S11 0x00071408
|
|
#define GPIO_PH5_FAULT2 0x0007140A
|
|
#define GPIO_PH5_SSI1FSS 0x0007140B
|
|
|
|
#define GPIO_PH6_EPI0S26 0x00071808
|
|
#define GPIO_PH6_PWM4 0x0007180A
|
|
#define GPIO_PH6_SSI1RX 0x0007180B
|
|
|
|
#define GPIO_PH7_EPI0S27 0x00071C08
|
|
#define GPIO_PH7_PWM5 0x00071C0A
|
|
#define GPIO_PH7_SSI1TX 0x00071C0B
|
|
|
|
#define GPIO_PJ0_EPI0S16 0x00080008
|
|
#define GPIO_PJ0_PWM0 0x0008000A
|
|
#define GPIO_PJ0_I2C1SCL 0x0008000B
|
|
|
|
#define GPIO_PJ1_EPI0S17 0x00080408
|
|
#define GPIO_PJ1_USB0PFLT 0x00080409
|
|
#define GPIO_PJ1_PWM1 0x0008040A
|
|
#define GPIO_PJ1_I2C1SDA 0x0008040B
|
|
|
|
#define GPIO_PJ2_EPI0S18 0x00080808
|
|
#define GPIO_PJ2_CCP0 0x00080809
|
|
#define GPIO_PJ2_FAULT0 0x0008080A
|
|
|
|
#define GPIO_PJ3_EPI0S19 0x00080C08
|
|
#define GPIO_PJ3_U1CTS 0x00080C09
|
|
#define GPIO_PJ3_CCP6 0x00080C0A
|
|
|
|
#define GPIO_PJ4_EPI0S28 0x00081008
|
|
#define GPIO_PJ4_U1DCD 0x00081009
|
|
#define GPIO_PJ4_CCP4 0x0008100A
|
|
|
|
#define GPIO_PJ5_EPI0S29 0x00081408
|
|
#define GPIO_PJ5_U1DSR 0x00081409
|
|
#define GPIO_PJ5_CCP2 0x0008140A
|
|
|
|
#define GPIO_PJ6_EPI0S30 0x00081808
|
|
#define GPIO_PJ6_U1RTS 0x00081809
|
|
#define GPIO_PJ6_CCP1 0x0008180A
|
|
|
|
#define GPIO_PJ7_U1DTR 0x00081C09
|
|
#define GPIO_PJ7_CCP0 0x00081C0A
|
|
|
|
#endif // PART_LM3S9U96
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F110B2QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F110B2QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F110B2QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F110C4QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F110C4QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F110C4QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F110E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F110E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F110E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F110H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F110H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F110H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F111B2QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F111B2QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F111B2QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F111C4QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F111C4QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F111C4QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F111E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F111E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F111E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F111H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F111H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F111H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F112C4QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F112C4QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F112C4QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F112E5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F112E5QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F112E5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F112H5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F112H5QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F112H5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F112H5QD Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F112H5QD
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PJ3_U5TX 0x00080C01
|
|
#define GPIO_PJ3_T2CCP1 0x00080C07
|
|
|
|
#define GPIO_PJ4_U6RX 0x00081001
|
|
#define GPIO_PJ4_T3CCP0 0x00081007
|
|
|
|
#define GPIO_PJ5_U6TX 0x00081401
|
|
#define GPIO_PJ5_T3CCP1 0x00081407
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#define GPIO_PK4_U7RX 0x00091001
|
|
#define GPIO_PK4_RTCCLK 0x00091007
|
|
#define GPIO_PK4_C0O 0x00091008
|
|
|
|
#define GPIO_PK5_U7TX 0x00091401
|
|
#define GPIO_PK5_C1O 0x00091408
|
|
|
|
#define GPIO_PK6_WT1CCP0 0x00091807
|
|
#define GPIO_PK6_C2O 0x00091808
|
|
|
|
#define GPIO_PK7_WT1CCP1 0x00091C07
|
|
|
|
#define GPIO_PL0_T0CCP0 0x000A0007
|
|
#define GPIO_PL0_WT0CCP0 0x000A0008
|
|
|
|
#define GPIO_PL1_T0CCP1 0x000A0407
|
|
#define GPIO_PL1_WT0CCP1 0x000A0408
|
|
|
|
#define GPIO_PL2_T1CCP0 0x000A0807
|
|
#define GPIO_PL2_WT1CCP0 0x000A0808
|
|
|
|
#define GPIO_PL3_T1CCP1 0x000A0C07
|
|
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
|
|
|
#define GPIO_PL4_T2CCP0 0x000A1007
|
|
#define GPIO_PL4_WT2CCP0 0x000A1008
|
|
#define GPIO_PL4_LPC0FRAME_N 0x000A100F
|
|
|
|
#define GPIO_PL5_T2CCP1 0x000A1407
|
|
#define GPIO_PL5_WT2CCP1 0x000A1408
|
|
#define GPIO_PL5_LPC0RESET_N 0x000A140F
|
|
|
|
#define GPIO_PL6_T3CCP0 0x000A1807
|
|
#define GPIO_PL6_WT3CCP0 0x000A1808
|
|
|
|
#define GPIO_PL7_T3CCP1 0x000A1C07
|
|
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
|
|
|
#define GPIO_PM0_T4CCP0 0x000B0007
|
|
#define GPIO_PM0_WT4CCP0 0x000B0008
|
|
#define GPIO_PM0_LPC0PD_N 0x000B000F
|
|
|
|
#define GPIO_PM1_T4CCP1 0x000B0407
|
|
#define GPIO_PM1_WT4CCP1 0x000B0408
|
|
#define GPIO_PM1_LPC0SCI_N 0x000B040F
|
|
|
|
#define GPIO_PM2_T5CCP0 0x000B0807
|
|
#define GPIO_PM2_WT5CCP0 0x000B0808
|
|
#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
|
|
|
|
#define GPIO_PM3_T5CCP1 0x000B0C07
|
|
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
|
|
|
#define GPIO_PM6_WT0CCP0 0x000B1807
|
|
|
|
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
|
|
|
#define GPIO_PN0_CAN0RX 0x000C0001
|
|
|
|
#define GPIO_PN1_CAN0TX 0x000C0401
|
|
|
|
#define GPIO_PN2_WT2CCP0 0x000C0807
|
|
|
|
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
|
|
|
#define GPIO_PN4_WT3CCP0 0x000C1007
|
|
|
|
#define GPIO_PN5_WT3CCP1 0x000C1407
|
|
|
|
#define GPIO_PN6_WT4CCP0 0x000C1807
|
|
|
|
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
|
|
|
#define GPIO_PP0_T4CCP0 0x000D0007
|
|
|
|
#define GPIO_PP1_T4CCP1 0x000D0407
|
|
|
|
#define GPIO_PP2_T5CCP0 0x000D0807
|
|
|
|
#endif // PART_LM4F112H5QD
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F120B2QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F120B2QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F120B2QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F120C4QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F120C4QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F120C4QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F120E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F120E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F120E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F120H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F120H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#endif // PART_LM4F120H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F121B2QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F121B2QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F121B2QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F121C4QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F121C4QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F121C4QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F121E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F121E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F121E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F121H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F121H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#endif // PART_LM4F121H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F122C4QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F122C4QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F122C4QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F122E5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F122E5QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F122E5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F122H5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F122H5QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F122H5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F122H5QD Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F122H5QD
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PJ3_U5TX 0x00080C01
|
|
#define GPIO_PJ3_T2CCP1 0x00080C07
|
|
|
|
#define GPIO_PJ4_U6RX 0x00081001
|
|
#define GPIO_PJ4_T3CCP0 0x00081007
|
|
|
|
#define GPIO_PJ5_U6TX 0x00081401
|
|
#define GPIO_PJ5_T3CCP1 0x00081407
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#define GPIO_PK4_U7RX 0x00091001
|
|
#define GPIO_PK4_RTCCLK 0x00091007
|
|
#define GPIO_PK4_C0O 0x00091008
|
|
|
|
#define GPIO_PK5_U7TX 0x00091401
|
|
#define GPIO_PK5_C1O 0x00091408
|
|
|
|
#define GPIO_PK6_WT1CCP0 0x00091807
|
|
#define GPIO_PK6_C2O 0x00091808
|
|
|
|
#define GPIO_PK7_WT1CCP1 0x00091C07
|
|
|
|
#define GPIO_PL0_T0CCP0 0x000A0007
|
|
#define GPIO_PL0_WT0CCP0 0x000A0008
|
|
|
|
#define GPIO_PL1_T0CCP1 0x000A0407
|
|
#define GPIO_PL1_WT0CCP1 0x000A0408
|
|
|
|
#define GPIO_PL2_T1CCP0 0x000A0807
|
|
#define GPIO_PL2_WT1CCP0 0x000A0808
|
|
|
|
#define GPIO_PL3_T1CCP1 0x000A0C07
|
|
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
|
|
|
#define GPIO_PL4_T2CCP0 0x000A1007
|
|
#define GPIO_PL4_WT2CCP0 0x000A1008
|
|
#define GPIO_PL4_LPC0FRAME_N 0x000A100F
|
|
|
|
#define GPIO_PL5_T2CCP1 0x000A1407
|
|
#define GPIO_PL5_WT2CCP1 0x000A1408
|
|
#define GPIO_PL5_LPC0RESET_N 0x000A140F
|
|
|
|
#define GPIO_PL6_T3CCP0 0x000A1807
|
|
#define GPIO_PL6_WT3CCP0 0x000A1808
|
|
|
|
#define GPIO_PL7_T3CCP1 0x000A1C07
|
|
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
|
|
|
#define GPIO_PM0_T4CCP0 0x000B0007
|
|
#define GPIO_PM0_WT4CCP0 0x000B0008
|
|
#define GPIO_PM0_LPC0PD_N 0x000B000F
|
|
|
|
#define GPIO_PM1_T4CCP1 0x000B0407
|
|
#define GPIO_PM1_WT4CCP1 0x000B0408
|
|
#define GPIO_PM1_LPC0SCI_N 0x000B040F
|
|
|
|
#define GPIO_PM2_T5CCP0 0x000B0807
|
|
#define GPIO_PM2_WT5CCP0 0x000B0808
|
|
#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
|
|
|
|
#define GPIO_PM3_T5CCP1 0x000B0C07
|
|
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
|
|
|
#define GPIO_PM6_WT0CCP0 0x000B1807
|
|
|
|
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
|
|
|
#define GPIO_PN0_CAN0RX 0x000C0001
|
|
|
|
#define GPIO_PN1_CAN0TX 0x000C0401
|
|
|
|
#define GPIO_PN2_WT2CCP0 0x000C0807
|
|
|
|
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
|
|
|
#define GPIO_PN4_WT3CCP0 0x000C1007
|
|
|
|
#define GPIO_PN5_WT3CCP1 0x000C1407
|
|
|
|
#define GPIO_PN6_WT4CCP0 0x000C1807
|
|
|
|
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
|
|
|
#define GPIO_PP0_T4CCP0 0x000D0007
|
|
|
|
#define GPIO_PP1_T4CCP1 0x000D0407
|
|
|
|
#define GPIO_PP2_T5CCP0 0x000D0807
|
|
|
|
#endif // PART_LM4F122H5QD
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F130C4QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F130C4QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#endif // PART_LM4F130C4QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F130E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F130E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#endif // PART_LM4F130E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F130H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F130H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#endif // PART_LM4F130H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F131C4QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F131C4QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#endif // PART_LM4F131C4QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F131E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F131E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#endif // PART_LM4F131E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F131H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F131H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#endif // PART_LM4F131H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F132C4QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F132C4QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F132C4QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F132E5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F132E5QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F132E5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F132H5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F132H5QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#endif // PART_LM4F132H5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F132H5QD Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F132H5QD
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
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#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
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#define GPIO_PF2_T1CCP0 0x00050807
|
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#define GPIO_PF2_SSI1CLK 0x00050802
|
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#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
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#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
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#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
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#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
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#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
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#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
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#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
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#define GPIO_PG4_I2C1SCL 0x00061003
|
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#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
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#define GPIO_PG7_I2C5SDA 0x00061C03
|
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#define GPIO_PG7_WT1CCP1 0x00061C07
|
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|
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#define GPIO_PH0_SSI3CLK 0x00070002
|
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#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
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#define GPIO_PH1_SSI3FSS 0x00070402
|
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#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
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#define GPIO_PH2_SSI3RX 0x00070802
|
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#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
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#define GPIO_PH3_WT5CCP1 0x00070C07
|
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|
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#define GPIO_PH4_SSI2CLK 0x00071002
|
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#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PJ3_U5TX 0x00080C01
|
|
#define GPIO_PJ3_T2CCP1 0x00080C07
|
|
|
|
#define GPIO_PJ4_U6RX 0x00081001
|
|
#define GPIO_PJ4_T3CCP0 0x00081007
|
|
|
|
#define GPIO_PJ5_U6TX 0x00081401
|
|
#define GPIO_PJ5_T3CCP1 0x00081407
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
|
|
#define GPIO_PK4_U7RX 0x00091001
|
|
#define GPIO_PK4_RTCCLK 0x00091007
|
|
#define GPIO_PK4_C0O 0x00091008
|
|
|
|
#define GPIO_PK5_U7TX 0x00091401
|
|
#define GPIO_PK5_C1O 0x00091408
|
|
|
|
#define GPIO_PK6_WT1CCP0 0x00091807
|
|
#define GPIO_PK6_C2O 0x00091808
|
|
|
|
#define GPIO_PK7_WT1CCP1 0x00091C07
|
|
|
|
#define GPIO_PL0_T0CCP0 0x000A0007
|
|
#define GPIO_PL0_WT0CCP0 0x000A0008
|
|
|
|
#define GPIO_PL1_T0CCP1 0x000A0407
|
|
#define GPIO_PL1_WT0CCP1 0x000A0408
|
|
|
|
#define GPIO_PL2_T1CCP0 0x000A0807
|
|
#define GPIO_PL2_WT1CCP0 0x000A0808
|
|
|
|
#define GPIO_PL3_T1CCP1 0x000A0C07
|
|
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
|
|
|
#define GPIO_PL4_T2CCP0 0x000A1007
|
|
#define GPIO_PL4_WT2CCP0 0x000A1008
|
|
#define GPIO_PL4_LPC0FRAME_N 0x000A100F
|
|
|
|
#define GPIO_PL5_T2CCP1 0x000A1407
|
|
#define GPIO_PL5_WT2CCP1 0x000A1408
|
|
#define GPIO_PL5_LPC0RESET_N 0x000A140F
|
|
|
|
#define GPIO_PL6_T3CCP0 0x000A1807
|
|
#define GPIO_PL6_WT3CCP0 0x000A1808
|
|
|
|
#define GPIO_PL7_T3CCP1 0x000A1C07
|
|
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
|
|
|
#define GPIO_PM0_T4CCP0 0x000B0007
|
|
#define GPIO_PM0_WT4CCP0 0x000B0008
|
|
#define GPIO_PM0_LPC0PD_N 0x000B000F
|
|
|
|
#define GPIO_PM1_T4CCP1 0x000B0407
|
|
#define GPIO_PM1_WT4CCP1 0x000B0408
|
|
#define GPIO_PM1_LPC0SCI_N 0x000B040F
|
|
|
|
#define GPIO_PM2_T5CCP0 0x000B0807
|
|
#define GPIO_PM2_WT5CCP0 0x000B0808
|
|
#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
|
|
|
|
#define GPIO_PM3_T5CCP1 0x000B0C07
|
|
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
|
|
|
#define GPIO_PM6_WT0CCP0 0x000B1807
|
|
|
|
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
|
|
|
#define GPIO_PN0_CAN0RX 0x000C0001
|
|
|
|
#define GPIO_PN1_CAN0TX 0x000C0401
|
|
|
|
#define GPIO_PN2_WT2CCP0 0x000C0807
|
|
|
|
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
|
|
|
#define GPIO_PN4_WT3CCP0 0x000C1007
|
|
|
|
#define GPIO_PN5_WT3CCP1 0x000C1407
|
|
|
|
#define GPIO_PN6_WT4CCP0 0x000C1807
|
|
|
|
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
|
|
|
#define GPIO_PP0_T4CCP0 0x000D0007
|
|
|
|
#define GPIO_PP1_T4CCP1 0x000D0407
|
|
|
|
#define GPIO_PP2_T5CCP0 0x000D0807
|
|
|
|
#endif // PART_LM4F132H5QD
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F230E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F230E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_M0PWM0 0x00011804
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_M0PWM1 0x00011C04
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#endif // PART_LM4F230E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F230H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F230H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_M0PWM0 0x00011804
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_M0PWM1 0x00011C04
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#endif // PART_LM4F230H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F231E5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F231E5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_M0PWM0 0x00011804
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_M0PWM1 0x00011C04
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_M0FAULT1 0x00031C04
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M0FAULT1 0x00050C04
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_M0FAULT2 0x00051004
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_M1FAULT1 0x00060005
|
|
#define GPIO_PG0_PHA1 0x00060006
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_M1FAULT2 0x00060405
|
|
#define GPIO_PG1_PHB1 0x00060406
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_M0FAULT1 0x00060804
|
|
#define GPIO_PG2_M1PWM0 0x00060805
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_M0FAULT2 0x00060C04
|
|
#define GPIO_PG3_M1PWM1 0x00060C05
|
|
#define GPIO_PG3_PHA1 0x00060C06
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_M0PWM4 0x00061004
|
|
#define GPIO_PG4_M1PWM2 0x00061005
|
|
#define GPIO_PG4_PHB1 0x00061006
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_M0PWM5 0x00061404
|
|
#define GPIO_PG5_M1PWM3 0x00061405
|
|
#define GPIO_PG5_IDX1 0x00061406
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#endif // PART_LM4F231E5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F231H5QR Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F231H5QR
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_M0PWM0 0x00011804
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_M0PWM1 0x00011C04
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_M0FAULT1 0x00031C04
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M0FAULT1 0x00050C04
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_M0FAULT2 0x00051004
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_M1FAULT1 0x00060005
|
|
#define GPIO_PG0_PHA1 0x00060006
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_M1FAULT2 0x00060405
|
|
#define GPIO_PG1_PHB1 0x00060406
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_M0FAULT1 0x00060804
|
|
#define GPIO_PG2_M1PWM0 0x00060805
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_M0FAULT2 0x00060C04
|
|
#define GPIO_PG3_M1PWM1 0x00060C05
|
|
#define GPIO_PG3_PHA1 0x00060C06
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_M0PWM4 0x00061004
|
|
#define GPIO_PG4_M1PWM2 0x00061005
|
|
#define GPIO_PG4_PHB1 0x00061006
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_M0PWM5 0x00061404
|
|
#define GPIO_PG5_M1PWM3 0x00061405
|
|
#define GPIO_PG5_IDX1 0x00061406
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#endif // PART_LM4F231H5QR
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F232E5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F232E5QC
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_M0FAULT1 0x00031C04
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE6_CAN1RX 0x00041808
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
#define GPIO_PE7_CAN1TX 0x00041C08
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M0FAULT1 0x00050C04
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_M0FAULT2 0x00051004
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_M0FAULT3 0x00051404
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_M1FAULT0 0x00051C05
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_M1FAULT1 0x00060005
|
|
#define GPIO_PG0_PHA1 0x00060006
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_M1FAULT2 0x00060405
|
|
#define GPIO_PG1_PHB1 0x00060406
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_M0FAULT1 0x00060804
|
|
#define GPIO_PG2_M1PWM0 0x00060805
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_M0FAULT2 0x00060C04
|
|
#define GPIO_PG3_M1PWM1 0x00060C05
|
|
#define GPIO_PG3_PHA1 0x00060C06
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_M0PWM4 0x00061004
|
|
#define GPIO_PG4_M1PWM2 0x00061005
|
|
#define GPIO_PG4_PHB1 0x00061006
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_M0PWM5 0x00061404
|
|
#define GPIO_PG5_M1PWM3 0x00061405
|
|
#define GPIO_PG5_IDX1 0x00061406
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_M0PWM6 0x00061804
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_M0PWM7 0x00061C04
|
|
#define GPIO_PG7_IDX1 0x00061C05
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_M0PWM0 0x00070004
|
|
#define GPIO_PH0_M0FAULT0 0x00070006
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_M0PWM1 0x00070404
|
|
#define GPIO_PH1_IDX0 0x00070405
|
|
#define GPIO_PH1_M0FAULT1 0x00070406
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_M0PWM2 0x00070804
|
|
#define GPIO_PH2_M0FAULT2 0x00070806
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_M0PWM3 0x00070C04
|
|
#define GPIO_PH3_M0FAULT3 0x00070C06
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_M0PWM4 0x00071004
|
|
#define GPIO_PH4_PHA0 0x00071005
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_M0PWM5 0x00071404
|
|
#define GPIO_PH5_PHB0 0x00071405
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_M0PWM6 0x00071804
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_M0PWM7 0x00071C04
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_IDX0 0x00080805
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
#define GPIO_PK0_M1FAULT0 0x00090006
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
#define GPIO_PK1_M1FAULT1 0x00090406
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
#define GPIO_PK2_M1FAULT2 0x00090806
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
#define GPIO_PK3_M1FAULT3 0x00090C06
|
|
|
|
#endif // PART_LM4F232E5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F232H5BB Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F232H5BB
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_M0PWM0 0x00011804
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_M0PWM1 0x00011C04
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_M0FAULT1 0x00031C04
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE6_CAN1RX 0x00041808
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
#define GPIO_PE7_CAN1TX 0x00041C08
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M0FAULT1 0x00050C04
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_M0FAULT2 0x00051004
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_M0FAULT3 0x00051404
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_M1FAULT0 0x00051C05
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_M1FAULT1 0x00060005
|
|
#define GPIO_PG0_PHA1 0x00060006
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_M1FAULT2 0x00060405
|
|
#define GPIO_PG1_PHB1 0x00060406
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_M0FAULT1 0x00060804
|
|
#define GPIO_PG2_M1PWM0 0x00060805
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_M0FAULT2 0x00060C04
|
|
#define GPIO_PG3_M1PWM1 0x00060C05
|
|
#define GPIO_PG3_PHA1 0x00060C06
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_M0PWM4 0x00061004
|
|
#define GPIO_PG4_M1PWM2 0x00061005
|
|
#define GPIO_PG4_PHB1 0x00061006
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_M0PWM5 0x00061404
|
|
#define GPIO_PG5_M1PWM3 0x00061405
|
|
#define GPIO_PG5_IDX1 0x00061406
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_M0PWM6 0x00061804
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_M0PWM7 0x00061C04
|
|
#define GPIO_PG7_IDX1 0x00061C05
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_M0PWM0 0x00070004
|
|
#define GPIO_PH0_M0FAULT0 0x00070006
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_M0PWM1 0x00070404
|
|
#define GPIO_PH1_IDX0 0x00070405
|
|
#define GPIO_PH1_M0FAULT1 0x00070406
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_M0PWM2 0x00070804
|
|
#define GPIO_PH2_M0FAULT2 0x00070806
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_M0PWM3 0x00070C04
|
|
#define GPIO_PH3_M0FAULT3 0x00070C06
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_M0PWM4 0x00071004
|
|
#define GPIO_PH4_PHA0 0x00071005
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_M0PWM5 0x00071404
|
|
#define GPIO_PH5_PHB0 0x00071405
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_M0PWM6 0x00071804
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_M0PWM7 0x00071C04
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
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#define GPIO_PJ1_T1CCP1 0x00080407
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#define GPIO_PJ2_U5RX 0x00080801
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#define GPIO_PJ2_IDX0 0x00080805
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#define GPIO_PJ2_T2CCP0 0x00080807
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#define GPIO_PJ3_U5TX 0x00080C01
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#define GPIO_PJ3_T2CCP1 0x00080C07
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#define GPIO_PJ4_U6RX 0x00081001
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#define GPIO_PJ4_T3CCP0 0x00081007
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#define GPIO_PJ5_U6TX 0x00081401
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#define GPIO_PJ5_T3CCP1 0x00081407
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#define GPIO_PK0_SSI3CLK 0x00090002
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#define GPIO_PK0_M1FAULT0 0x00090006
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#define GPIO_PK1_SSI3FSS 0x00090402
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#define GPIO_PK1_M1FAULT1 0x00090406
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#define GPIO_PK2_SSI3RX 0x00090802
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#define GPIO_PK2_M1FAULT2 0x00090806
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#define GPIO_PK3_SSI3TX 0x00090C02
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#define GPIO_PK3_M1FAULT3 0x00090C06
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#define GPIO_PK4_U7RX 0x00091001
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#define GPIO_PK4_M0FAULT0 0x00091006
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#define GPIO_PK4_RTCCLK 0x00091007
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#define GPIO_PK4_C0O 0x00091008
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#define GPIO_PK5_U7TX 0x00091401
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#define GPIO_PK5_M0FAULT1 0x00091406
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#define GPIO_PK5_C1O 0x00091408
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#define GPIO_PK6_M0FAULT2 0x00091806
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#define GPIO_PK6_WT1CCP0 0x00091807
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#define GPIO_PK6_C2O 0x00091808
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#define GPIO_PK7_M0FAULT3 0x00091C06
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#define GPIO_PK7_WT1CCP1 0x00091C07
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#define GPIO_PL0_T0CCP0 0x000A0007
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#define GPIO_PL0_WT0CCP0 0x000A0008
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#define GPIO_PL1_T0CCP1 0x000A0407
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#define GPIO_PL1_WT0CCP1 0x000A0408
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#define GPIO_PL2_T1CCP0 0x000A0807
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#define GPIO_PL2_WT1CCP0 0x000A0808
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#define GPIO_PL3_T1CCP1 0x000A0C07
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#define GPIO_PL3_WT1CCP1 0x000A0C08
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#define GPIO_PL4_T2CCP0 0x000A1007
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#define GPIO_PL4_WT2CCP0 0x000A1008
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#define GPIO_PL4_LPC0FRAME_N 0x000A100F
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#define GPIO_PL5_T2CCP1 0x000A1407
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#define GPIO_PL5_WT2CCP1 0x000A1408
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#define GPIO_PL5_LPC0RESET_N 0x000A140F
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#define GPIO_PL6_T3CCP0 0x000A1807
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#define GPIO_PL6_WT3CCP0 0x000A1808
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#define GPIO_PL7_T3CCP1 0x000A1C07
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#define GPIO_PL7_WT3CCP1 0x000A1C08
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#define GPIO_PM0_T4CCP0 0x000B0007
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#define GPIO_PM0_WT4CCP0 0x000B0008
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#define GPIO_PM0_LPC0PD_N 0x000B000F
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#define GPIO_PM1_T4CCP1 0x000B0407
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#define GPIO_PM1_WT4CCP1 0x000B0408
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#define GPIO_PM1_LPC0SCI_N 0x000B040F
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#define GPIO_PM2_T5CCP0 0x000B0807
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#define GPIO_PM2_WT5CCP0 0x000B0808
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#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
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#define GPIO_PM3_T5CCP1 0x000B0C07
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#define GPIO_PM3_WT5CCP1 0x000B0C08
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#define GPIO_PM6_M0PWM4 0x000B1802
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#define GPIO_PM6_WT0CCP0 0x000B1807
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#define GPIO_PM7_M0PWM5 0x000B1C02
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#define GPIO_PM7_WT0CCP1 0x000B1C07
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#define GPIO_PN0_CAN0RX 0x000C0001
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#define GPIO_PN1_CAN0TX 0x000C0401
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#define GPIO_PN2_M0PWM6 0x000C0802
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#define GPIO_PN2_WT2CCP0 0x000C0807
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#define GPIO_PN3_M0PWM7 0x000C0C02
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#define GPIO_PN3_WT2CCP1 0x000C0C07
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#define GPIO_PN4_M1PWM4 0x000C1002
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#define GPIO_PN4_WT3CCP0 0x000C1007
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#define GPIO_PN5_M1PWM5 0x000C1402
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#define GPIO_PN5_WT3CCP1 0x000C1407
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#define GPIO_PN6_M1PWM6 0x000C1802
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#define GPIO_PN6_WT4CCP0 0x000C1807
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#define GPIO_PN7_M1PWM7 0x000C1C02
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#define GPIO_PN7_WT4CCP1 0x000C1C07
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#define GPIO_PP0_M0PWM0 0x000D0001
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#define GPIO_PP0_T4CCP0 0x000D0007
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#define GPIO_PP1_M0PWM1 0x000D0401
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#define GPIO_PP1_T4CCP1 0x000D0407
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#define GPIO_PP2_M0PWM2 0x000D0801
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#define GPIO_PP2_T5CCP0 0x000D0807
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#define GPIO_PP3_M0PWM3 0x000D0C01
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#define GPIO_PP3_T5CCP1 0x000D0C07
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#define GPIO_PP4_M0PWM4 0x000D1001
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#define GPIO_PP4_WT0CCP0 0x000D1007
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#define GPIO_PP5_M0PWM5 0x000D1401
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#define GPIO_PP5_WT0CCP1 0x000D1407
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#define GPIO_PP6_M0PWM6 0x000D1801
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#define GPIO_PP6_WT1CCP0 0x000D1807
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#define GPIO_PP7_M0PWM7 0x000D1C01
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#define GPIO_PP7_WT1CCP1 0x000D1C07
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#define GPIO_PQ0_M1PWM0 0x000E0001
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#define GPIO_PQ0_WT2CCP0 0x000E0007
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#define GPIO_PQ1_M1PWM1 0x000E0401
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#define GPIO_PQ1_WT2CCP1 0x000E0407
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#define GPIO_PQ2_M1PWM2 0x000E0801
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#define GPIO_PQ2_WT3CCP0 0x000E0807
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#define GPIO_PQ3_M1PWM3 0x000E0C01
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#define GPIO_PQ3_WT3CCP1 0x000E0C07
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#define GPIO_PQ4_M1PWM4 0x000E1001
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#define GPIO_PQ4_WT4CCP0 0x000E1007
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#define GPIO_PQ5_M1PWM5 0x000E1401
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#define GPIO_PQ5_WT4CCP1 0x000E1407
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#define GPIO_PQ6_M1PWM6 0x000E1801
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#define GPIO_PQ6_WT5CCP0 0x000E1807
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#define GPIO_PQ7_M1PWM7 0x000E1C01
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#define GPIO_PQ7_WT5CCP1 0x000E1C07
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#endif // PART_LM4F232H5BB
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|
|
//*****************************************************************************
|
|
//
|
|
// LM4F232H5QC Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F232H5QC
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|
|
|
#define GPIO_PA0_U0RX 0x00000001
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|
#define GPIO_PA0_CAN1RX 0x00000008
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#define GPIO_PA1_U0TX 0x00000401
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|
#define GPIO_PA1_CAN1TX 0x00000408
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#define GPIO_PA2_SSI0CLK 0x00000802
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|
#define GPIO_PA3_SSI0FSS 0x00000C02
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|
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|
#define GPIO_PA4_SSI0RX 0x00001002
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#define GPIO_PA5_SSI0TX 0x00001402
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|
|
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#define GPIO_PA6_I2C1SCL 0x00001803
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#define GPIO_PA6_M1PWM2 0x00001805
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|
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#define GPIO_PA7_I2C1SDA 0x00001C03
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#define GPIO_PA7_M1PWM3 0x00001C05
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|
|
|
#define GPIO_PB0_U1RX 0x00010001
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|
#define GPIO_PB0_T2CCP0 0x00010007
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|
|
|
#define GPIO_PB1_U1TX 0x00010401
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|
#define GPIO_PB1_T2CCP1 0x00010407
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|
|
#define GPIO_PB2_I2C0SCL 0x00010803
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|
#define GPIO_PB2_T3CCP0 0x00010807
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|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
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#define GPIO_PB3_T3CCP1 0x00010C07
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|
#define GPIO_PB4_SSI2CLK 0x00011002
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|
#define GPIO_PB4_M0PWM2 0x00011004
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#define GPIO_PB4_CAN0RX 0x00011008
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|
#define GPIO_PB4_T1CCP0 0x00011007
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|
|
#define GPIO_PB5_SSI2FSS 0x00011402
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#define GPIO_PB5_M0PWM3 0x00011404
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|
#define GPIO_PB5_CAN0TX 0x00011408
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|
#define GPIO_PB5_T1CCP1 0x00011407
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|
|
|
#define GPIO_PC0_TCK 0x00020001
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|
#define GPIO_PC0_SWCLK 0x00020001
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|
#define GPIO_PC0_T4CCP0 0x00020007
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|
|
|
#define GPIO_PC1_TMS 0x00020401
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|
#define GPIO_PC1_SWDIO 0x00020401
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|
#define GPIO_PC1_T4CCP1 0x00020407
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|
|
#define GPIO_PC2_TDI 0x00020801
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#define GPIO_PC2_T5CCP0 0x00020807
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|
|
#define GPIO_PC3_SWO 0x00020C01
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#define GPIO_PC3_TDO 0x00020C01
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|
#define GPIO_PC3_T5CCP1 0x00020C07
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|
|
|
#define GPIO_PC4_U4RX 0x00021001
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#define GPIO_PC4_U1RX 0x00021002
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|
#define GPIO_PC4_M0PWM6 0x00021004
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|
#define GPIO_PC4_IDX1 0x00021006
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|
#define GPIO_PC4_WT0CCP0 0x00021007
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|
#define GPIO_PC4_U1RTS 0x00021008
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|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
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#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
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|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
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|
|
#define GPIO_PC7_U3TX 0x00021C01
|
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#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
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|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_M0FAULT1 0x00031C04
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE6_CAN1RX 0x00041808
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
#define GPIO_PE7_CAN1TX 0x00041C08
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M0FAULT1 0x00050C04
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_M0FAULT2 0x00051004
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_M0FAULT3 0x00051404
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_M1FAULT0 0x00051C05
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_M1FAULT1 0x00060005
|
|
#define GPIO_PG0_PHA1 0x00060006
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
#define GPIO_PG0_LPC0PD_N 0x0006000F
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_M1FAULT2 0x00060405
|
|
#define GPIO_PG1_PHB1 0x00060406
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
#define GPIO_PG1_LPC0SCI_N 0x0006040F
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_M0FAULT1 0x00060804
|
|
#define GPIO_PG2_M1PWM0 0x00060805
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
#define GPIO_PG2_LPC0CLKRUN_N 0x0006080F
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_M0FAULT2 0x00060C04
|
|
#define GPIO_PG3_M1PWM1 0x00060C05
|
|
#define GPIO_PG3_PHA1 0x00060C06
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_M0PWM4 0x00061004
|
|
#define GPIO_PG4_M1PWM2 0x00061005
|
|
#define GPIO_PG4_PHB1 0x00061006
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_M0PWM5 0x00061404
|
|
#define GPIO_PG5_M1PWM3 0x00061405
|
|
#define GPIO_PG5_IDX1 0x00061406
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_M0PWM6 0x00061804
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_M0PWM7 0x00061C04
|
|
#define GPIO_PG7_IDX1 0x00061C05
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_M0PWM0 0x00070004
|
|
#define GPIO_PH0_M0FAULT0 0x00070006
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_M0PWM1 0x00070404
|
|
#define GPIO_PH1_IDX0 0x00070405
|
|
#define GPIO_PH1_M0FAULT1 0x00070406
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_M0PWM2 0x00070804
|
|
#define GPIO_PH2_M0FAULT2 0x00070806
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_M0PWM3 0x00070C04
|
|
#define GPIO_PH3_M0FAULT3 0x00070C06
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_M0PWM4 0x00071004
|
|
#define GPIO_PH4_PHA0 0x00071005
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_M0PWM5 0x00071404
|
|
#define GPIO_PH5_PHB0 0x00071405
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_M0PWM6 0x00071804
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_M0PWM7 0x00071C04
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_IDX0 0x00080805
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
#define GPIO_PK0_M1FAULT0 0x00090006
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
#define GPIO_PK1_M1FAULT1 0x00090406
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
#define GPIO_PK2_M1FAULT2 0x00090806
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
#define GPIO_PK3_M1FAULT3 0x00090C06
|
|
|
|
#endif // PART_LM4F232H5QC
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4F232H5QD Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4F232H5QD
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_M0FAULT1 0x00031C04
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE6_CAN1RX 0x00041808
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
#define GPIO_PE7_CAN1TX 0x00041C08
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M0FAULT1 0x00050C04
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_M0FAULT2 0x00051004
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_M0FAULT3 0x00051404
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_M1FAULT0 0x00051C05
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_M1FAULT1 0x00060005
|
|
#define GPIO_PG0_PHA1 0x00060006
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_M1FAULT2 0x00060405
|
|
#define GPIO_PG1_PHB1 0x00060406
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_M0FAULT1 0x00060804
|
|
#define GPIO_PG2_M1PWM0 0x00060805
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_M0FAULT2 0x00060C04
|
|
#define GPIO_PG3_M1PWM1 0x00060C05
|
|
#define GPIO_PG3_PHA1 0x00060C06
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_M0PWM4 0x00061004
|
|
#define GPIO_PG4_M1PWM2 0x00061005
|
|
#define GPIO_PG4_PHB1 0x00061006
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_M0PWM5 0x00061404
|
|
#define GPIO_PG5_M1PWM3 0x00061405
|
|
#define GPIO_PG5_IDX1 0x00061406
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_M0PWM6 0x00061804
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_M0PWM7 0x00061C04
|
|
#define GPIO_PG7_IDX1 0x00061C05
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_M0PWM0 0x00070004
|
|
#define GPIO_PH0_M0FAULT0 0x00070006
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_M0PWM1 0x00070404
|
|
#define GPIO_PH1_IDX0 0x00070405
|
|
#define GPIO_PH1_M0FAULT1 0x00070406
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_M0PWM2 0x00070804
|
|
#define GPIO_PH2_M0FAULT2 0x00070806
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_M0PWM3 0x00070C04
|
|
#define GPIO_PH3_M0FAULT3 0x00070C06
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_M0PWM4 0x00071004
|
|
#define GPIO_PH4_PHA0 0x00071005
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_M0PWM5 0x00071404
|
|
#define GPIO_PH5_PHB0 0x00071405
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_M0PWM6 0x00071804
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_M0PWM7 0x00071C04
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_IDX0 0x00080805
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PJ3_U5TX 0x00080C01
|
|
#define GPIO_PJ3_T2CCP1 0x00080C07
|
|
|
|
#define GPIO_PJ4_U6RX 0x00081001
|
|
#define GPIO_PJ4_T3CCP0 0x00081007
|
|
|
|
#define GPIO_PJ5_U6TX 0x00081401
|
|
#define GPIO_PJ5_T3CCP1 0x00081407
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
#define GPIO_PK0_M1FAULT0 0x00090006
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
#define GPIO_PK1_M1FAULT1 0x00090406
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
#define GPIO_PK2_M1FAULT2 0x00090806
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
#define GPIO_PK3_M1FAULT3 0x00090C06
|
|
|
|
#define GPIO_PK4_U7RX 0x00091001
|
|
#define GPIO_PK4_M0FAULT0 0x00091006
|
|
#define GPIO_PK4_RTCCLK 0x00091007
|
|
#define GPIO_PK4_C0O 0x00091008
|
|
|
|
#define GPIO_PK5_U7TX 0x00091401
|
|
#define GPIO_PK5_M0FAULT1 0x00091406
|
|
#define GPIO_PK5_C1O 0x00091408
|
|
|
|
#define GPIO_PK6_M0FAULT2 0x00091806
|
|
#define GPIO_PK6_WT1CCP0 0x00091807
|
|
#define GPIO_PK6_C2O 0x00091808
|
|
|
|
#define GPIO_PK7_M0FAULT3 0x00091C06
|
|
#define GPIO_PK7_WT1CCP1 0x00091C07
|
|
|
|
#define GPIO_PL0_T0CCP0 0x000A0007
|
|
#define GPIO_PL0_WT0CCP0 0x000A0008
|
|
|
|
#define GPIO_PL1_T0CCP1 0x000A0407
|
|
#define GPIO_PL1_WT0CCP1 0x000A0408
|
|
|
|
#define GPIO_PL2_T1CCP0 0x000A0807
|
|
#define GPIO_PL2_WT1CCP0 0x000A0808
|
|
|
|
#define GPIO_PL3_T1CCP1 0x000A0C07
|
|
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
|
|
|
#define GPIO_PL4_T2CCP0 0x000A1007
|
|
#define GPIO_PL4_WT2CCP0 0x000A1008
|
|
#define GPIO_PL4_LPC0FRAME_N 0x000A100F
|
|
|
|
#define GPIO_PL5_T2CCP1 0x000A1407
|
|
#define GPIO_PL5_WT2CCP1 0x000A1408
|
|
#define GPIO_PL5_LPC0RESET_N 0x000A140F
|
|
|
|
#define GPIO_PL6_T3CCP0 0x000A1807
|
|
#define GPIO_PL6_WT3CCP0 0x000A1808
|
|
|
|
#define GPIO_PL7_T3CCP1 0x000A1C07
|
|
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
|
|
|
#define GPIO_PM0_T4CCP0 0x000B0007
|
|
#define GPIO_PM0_WT4CCP0 0x000B0008
|
|
#define GPIO_PM0_LPC0PD_N 0x000B000F
|
|
|
|
#define GPIO_PM1_T4CCP1 0x000B0407
|
|
#define GPIO_PM1_WT4CCP1 0x000B0408
|
|
#define GPIO_PM1_LPC0SCI_N 0x000B040F
|
|
|
|
#define GPIO_PM2_T5CCP0 0x000B0807
|
|
#define GPIO_PM2_WT5CCP0 0x000B0808
|
|
#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
|
|
|
|
#define GPIO_PM3_T5CCP1 0x000B0C07
|
|
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
|
|
|
#define GPIO_PM6_M0PWM4 0x000B1802
|
|
#define GPIO_PM6_WT0CCP0 0x000B1807
|
|
|
|
#define GPIO_PM7_M0PWM5 0x000B1C02
|
|
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
|
|
|
#define GPIO_PN0_CAN0RX 0x000C0001
|
|
|
|
#define GPIO_PN1_CAN0TX 0x000C0401
|
|
|
|
#define GPIO_PN2_M0PWM6 0x000C0802
|
|
#define GPIO_PN2_WT2CCP0 0x000C0807
|
|
|
|
#define GPIO_PN3_M0PWM7 0x000C0C02
|
|
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
|
|
|
#define GPIO_PN4_M1PWM4 0x000C1002
|
|
#define GPIO_PN4_WT3CCP0 0x000C1007
|
|
|
|
#define GPIO_PN5_M1PWM5 0x000C1402
|
|
#define GPIO_PN5_WT3CCP1 0x000C1407
|
|
|
|
#define GPIO_PN6_M1PWM6 0x000C1802
|
|
#define GPIO_PN6_WT4CCP0 0x000C1807
|
|
|
|
#define GPIO_PN7_M1PWM7 0x000C1C02
|
|
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
|
|
|
#define GPIO_PP0_M0PWM0 0x000D0001
|
|
#define GPIO_PP0_T4CCP0 0x000D0007
|
|
|
|
#define GPIO_PP1_M0PWM1 0x000D0401
|
|
#define GPIO_PP1_T4CCP1 0x000D0407
|
|
|
|
#define GPIO_PP2_M0PWM2 0x000D0801
|
|
#define GPIO_PP2_T5CCP0 0x000D0807
|
|
|
|
#endif // PART_LM4F232H5QD
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4FS1AH5BB Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4FS1AH5BB
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_FAN0PWM5 0x00070801
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_FAN0TACH5 0x00070C01
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PJ3_U5TX 0x00080C01
|
|
#define GPIO_PJ3_T2CCP1 0x00080C07
|
|
|
|
#define GPIO_PJ4_T3CCP0 0x00081007
|
|
|
|
#define GPIO_PJ5_T3CCP1 0x00081407
|
|
|
|
#define GPIO_PJ6_PECI0TX 0x00081801
|
|
|
|
#define GPIO_PK4_RTCCLK 0x00091007
|
|
|
|
#define GPIO_PK6_FAN0PWM1 0x00091801
|
|
#define GPIO_PK6_WT1CCP0 0x00091807
|
|
|
|
#define GPIO_PK7_FAN0TACH1 0x00091C01
|
|
#define GPIO_PK7_WT1CCP1 0x00091C07
|
|
|
|
#define GPIO_PL0_T0CCP0 0x000A0007
|
|
#define GPIO_PL0_WT0CCP0 0x000A0008
|
|
#define GPIO_PL0_LPC0AD3 0x000A000F
|
|
|
|
#define GPIO_PL1_T0CCP1 0x000A0407
|
|
#define GPIO_PL1_WT0CCP1 0x000A0408
|
|
#define GPIO_PL1_LPC0AD2 0x000A040F
|
|
|
|
#define GPIO_PL2_T1CCP0 0x000A0807
|
|
#define GPIO_PL2_WT1CCP0 0x000A0808
|
|
#define GPIO_PL2_LPC0AD1 0x000A080F
|
|
|
|
#define GPIO_PL3_T1CCP1 0x000A0C07
|
|
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
|
#define GPIO_PL3_LPC0AD0 0x000A0C0F
|
|
|
|
#define GPIO_PL4_T2CCP0 0x000A1007
|
|
#define GPIO_PL4_WT2CCP0 0x000A1008
|
|
#define GPIO_PL4_LPC0FRAME_N 0x000A100F
|
|
|
|
#define GPIO_PL5_T2CCP1 0x000A1407
|
|
#define GPIO_PL5_WT2CCP1 0x000A1408
|
|
#define GPIO_PL5_LPC0RESET_N 0x000A140F
|
|
|
|
#define GPIO_PL6_T3CCP0 0x000A1807
|
|
#define GPIO_PL6_WT3CCP0 0x000A1808
|
|
|
|
#define GPIO_PL7_T3CCP1 0x000A1C07
|
|
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
|
|
|
#define GPIO_PM0_T4CCP0 0x000B0007
|
|
#define GPIO_PM0_WT4CCP0 0x000B0008
|
|
#define GPIO_PM0_LPC0PD_N 0x000B000F
|
|
|
|
#define GPIO_PM1_T4CCP1 0x000B0407
|
|
#define GPIO_PM1_WT4CCP1 0x000B0408
|
|
#define GPIO_PM1_LPC0SCI_N 0x000B040F
|
|
|
|
#define GPIO_PM2_T5CCP0 0x000B0807
|
|
#define GPIO_PM2_WT5CCP0 0x000B0808
|
|
#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
|
|
|
|
#define GPIO_PM3_T5CCP1 0x000B0C07
|
|
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
|
|
|
#define GPIO_PM4_LPC0SERIRQ 0x000B100F
|
|
|
|
#define GPIO_PM5_LPC0CLK 0x000B140F
|
|
|
|
#define GPIO_PM6_FAN0PWM0 0x000B1801
|
|
#define GPIO_PM6_WT0CCP0 0x000B1807
|
|
|
|
#define GPIO_PM7_FAN0TACH0 0x000B1C01
|
|
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
|
|
|
#define GPIO_PN2_FAN0PWM2 0x000C0801
|
|
#define GPIO_PN2_WT2CCP0 0x000C0807
|
|
|
|
#define GPIO_PN3_FAN0TACH2 0x000C0C01
|
|
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
|
|
|
#define GPIO_PN4_FAN0PWM3 0x000C1001
|
|
#define GPIO_PN4_WT3CCP0 0x000C1007
|
|
|
|
#define GPIO_PN5_FAN0TACH3 0x000C1401
|
|
#define GPIO_PN5_WT3CCP1 0x000C1407
|
|
|
|
#define GPIO_PN6_FAN0PWM4 0x000C1801
|
|
#define GPIO_PN6_WT4CCP0 0x000C1807
|
|
|
|
#define GPIO_PN7_FAN0TACH4 0x000C1C01
|
|
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
|
|
|
#define GPIO_PP0_T4CCP0 0x000D0007
|
|
|
|
#define GPIO_PP1_T4CCP1 0x000D0407
|
|
|
|
#define GPIO_PP2_T5CCP0 0x000D0807
|
|
|
|
#define GPIO_PP3_T5CCP1 0x000D0C07
|
|
|
|
#define GPIO_PP4_WT0CCP0 0x000D1007
|
|
|
|
#define GPIO_PP5_WT0CCP1 0x000D1407
|
|
|
|
#define GPIO_PP6_WT1CCP0 0x000D1807
|
|
|
|
#define GPIO_PP7_WT1CCP1 0x000D1C07
|
|
|
|
#define GPIO_PQ0_WT2CCP0 0x000E0007
|
|
|
|
#define GPIO_PQ1_WT2CCP1 0x000E0407
|
|
|
|
#define GPIO_PQ2_WT3CCP0 0x000E0807
|
|
|
|
#define GPIO_PQ3_WT3CCP1 0x000E0C07
|
|
|
|
#define GPIO_PQ4_WT4CCP0 0x000E1007
|
|
|
|
#define GPIO_PQ5_WT4CCP1 0x000E1407
|
|
|
|
#define GPIO_PQ6_WT5CCP0 0x000E1807
|
|
|
|
#define GPIO_PQ7_WT5CCP1 0x000E1C07
|
|
|
|
#endif // PART_LM4FS1AH5BB
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4FS99H5BB Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4FS99H5BB
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
#define GPIO_PA0_CAN1RX 0x00000008
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
#define GPIO_PA1_CAN1TX 0x00000408
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
#define GPIO_PA6_M1PWM2 0x00001805
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
#define GPIO_PA7_M1PWM3 0x00001C05
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_SSI2CLK 0x00011002
|
|
#define GPIO_PB4_M0PWM2 0x00011004
|
|
#define GPIO_PB4_CAN0RX 0x00011008
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_SSI2FSS 0x00011402
|
|
#define GPIO_PB5_M0PWM3 0x00011404
|
|
#define GPIO_PB5_CAN0TX 0x00011408
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_SSI2RX 0x00011802
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_M0PWM0 0x00011804
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_SSI2TX 0x00011C02
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_M0PWM1 0x00011C04
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
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#define GPIO_PC1_TMS 0x00020401
|
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#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
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|
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#define GPIO_PC2_TDI 0x00020801
|
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#define GPIO_PC2_T5CCP0 0x00020807
|
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|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U4RX 0x00021001
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_M0PWM6 0x00021004
|
|
#define GPIO_PC4_IDX1 0x00021006
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
#define GPIO_PC4_U1RTS 0x00021008
|
|
|
|
#define GPIO_PC5_U4TX 0x00021401
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_M0PWM7 0x00021404
|
|
#define GPIO_PC5_PHA1 0x00021406
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
#define GPIO_PC5_U1CTS 0x00021408
|
|
|
|
#define GPIO_PC6_U3RX 0x00021801
|
|
#define GPIO_PC6_PHB1 0x00021806
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
#define GPIO_PC6_USB0EPEN 0x00021808
|
|
|
|
#define GPIO_PC7_U3TX 0x00021C01
|
|
#define GPIO_PC7_USB0PFLT 0x00021C08
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI3CLK 0x00030001
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_M0PWM6 0x00030004
|
|
#define GPIO_PD0_M1PWM0 0x00030005
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI3FSS 0x00030401
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_M0PWM7 0x00030404
|
|
#define GPIO_PD1_M1PWM1 0x00030405
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI3RX 0x00030801
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_M0FAULT0 0x00030804
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
#define GPIO_PD2_USB0EPEN 0x00030808
|
|
|
|
#define GPIO_PD3_SSI3TX 0x00030C01
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_IDX0 0x00030C06
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
#define GPIO_PD3_USB0PFLT 0x00030C08
|
|
|
|
#define GPIO_PD4_U6RX 0x00031001
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_U6TX 0x00031401
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_U2RX 0x00031801
|
|
#define GPIO_PD6_M0FAULT0 0x00031804
|
|
#define GPIO_PD6_PHA0 0x00031806
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_U2TX 0x00031C01
|
|
#define GPIO_PD7_M0FAULT1 0x00031C04
|
|
#define GPIO_PD7_PHB0 0x00031C06
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE0_U7RX 0x00040001
|
|
|
|
#define GPIO_PE1_U7TX 0x00040401
|
|
|
|
#define GPIO_PE4_U5RX 0x00041001
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
#define GPIO_PE4_M0PWM4 0x00041004
|
|
#define GPIO_PE4_M1PWM2 0x00041005
|
|
#define GPIO_PE4_CAN0RX 0x00041008
|
|
|
|
#define GPIO_PE5_U5TX 0x00041401
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
#define GPIO_PE5_M0PWM5 0x00041404
|
|
#define GPIO_PE5_M1PWM3 0x00041405
|
|
#define GPIO_PE5_CAN0TX 0x00041408
|
|
|
|
#define GPIO_PE6_CAN1RX 0x00041808
|
|
|
|
#define GPIO_PE7_U1RI 0x00041C01
|
|
#define GPIO_PE7_CAN1TX 0x00041C08
|
|
|
|
#define GPIO_PF0_U1RTS 0x00050001
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_CAN0RX 0x00050003
|
|
#define GPIO_PF0_M1PWM4 0x00050005
|
|
#define GPIO_PF0_PHA0 0x00050006
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_C0O 0x00050009
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_U1CTS 0x00050401
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_M1PWM5 0x00050405
|
|
#define GPIO_PF1_PHB0 0x00050406
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_C1O 0x00050409
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_U1DCD 0x00050801
|
|
#define GPIO_PF2_M0FAULT0 0x00050804
|
|
#define GPIO_PF2_M1PWM6 0x00050805
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_C2O 0x00050809
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_U1DSR 0x00050C01
|
|
#define GPIO_PF3_CAN0TX 0x00050C03
|
|
#define GPIO_PF3_M0FAULT1 0x00050C04
|
|
#define GPIO_PF3_M1PWM7 0x00050C05
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_U1DTR 0x00051001
|
|
#define GPIO_PF4_M0FAULT2 0x00051004
|
|
#define GPIO_PF4_M1FAULT0 0x00051005
|
|
#define GPIO_PF4_IDX0 0x00051006
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_USB0EPEN 0x00051008
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_M0FAULT3 0x00051404
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
#define GPIO_PF5_USB0PFLT 0x00051408
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_M1FAULT0 0x00051C05
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_M1FAULT1 0x00060005
|
|
#define GPIO_PG0_PHA1 0x00060006
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_M1FAULT2 0x00060405
|
|
#define GPIO_PG1_PHB1 0x00060406
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_M0FAULT1 0x00060804
|
|
#define GPIO_PG2_M1PWM0 0x00060805
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_M0FAULT2 0x00060C04
|
|
#define GPIO_PG3_M1PWM1 0x00060C05
|
|
#define GPIO_PG3_PHA1 0x00060C06
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_U2RX 0x00061001
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_M0PWM4 0x00061004
|
|
#define GPIO_PG4_M1PWM2 0x00061005
|
|
#define GPIO_PG4_PHB1 0x00061006
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
#define GPIO_PG4_USB0EPEN 0x00061008
|
|
|
|
#define GPIO_PG5_U2TX 0x00061401
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_M0PWM5 0x00061404
|
|
#define GPIO_PG5_M1PWM3 0x00061405
|
|
#define GPIO_PG5_IDX1 0x00061406
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
#define GPIO_PG5_USB0PFLT 0x00061408
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_M0PWM6 0x00061804
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_M0PWM7 0x00061C04
|
|
#define GPIO_PG7_IDX1 0x00061C05
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_SSI3CLK 0x00070002
|
|
#define GPIO_PH0_M0PWM0 0x00070004
|
|
#define GPIO_PH0_M0FAULT0 0x00070006
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_SSI3FSS 0x00070402
|
|
#define GPIO_PH1_M0PWM1 0x00070404
|
|
#define GPIO_PH1_IDX0 0x00070405
|
|
#define GPIO_PH1_M0FAULT1 0x00070406
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_FAN0PWM5 0x00070801
|
|
#define GPIO_PH2_SSI3RX 0x00070802
|
|
#define GPIO_PH2_M0PWM2 0x00070804
|
|
#define GPIO_PH2_M0FAULT2 0x00070806
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_FAN0TACH5 0x00070C01
|
|
#define GPIO_PH3_SSI3TX 0x00070C02
|
|
#define GPIO_PH3_M0PWM3 0x00070C04
|
|
#define GPIO_PH3_M0FAULT3 0x00070C06
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_SSI2CLK 0x00071002
|
|
#define GPIO_PH4_M0PWM4 0x00071004
|
|
#define GPIO_PH4_PHA0 0x00071005
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_SSI2FSS 0x00071402
|
|
#define GPIO_PH5_M0PWM5 0x00071404
|
|
#define GPIO_PH5_PHB0 0x00071405
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_SSI2RX 0x00071802
|
|
#define GPIO_PH6_M0PWM6 0x00071804
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_SSI2TX 0x00071C02
|
|
#define GPIO_PH7_M0PWM7 0x00071C04
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_U4RX 0x00080001
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_U4TX 0x00080401
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_U5RX 0x00080801
|
|
#define GPIO_PJ2_FAN0PWM7 0x00080802
|
|
#define GPIO_PJ2_IDX0 0x00080805
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PJ3_U5TX 0x00080C01
|
|
#define GPIO_PJ3_FAN0TACH7 0x00080C02
|
|
#define GPIO_PJ3_T2CCP1 0x00080C07
|
|
|
|
#define GPIO_PJ4_U6RX 0x00081001
|
|
#define GPIO_PJ4_T3CCP0 0x00081007
|
|
|
|
#define GPIO_PJ5_U6TX 0x00081401
|
|
#define GPIO_PJ5_T3CCP1 0x00081407
|
|
|
|
#define GPIO_PJ6_PECI0TX 0x00081801
|
|
|
|
#define GPIO_PK0_SSI3CLK 0x00090002
|
|
#define GPIO_PK0_M1FAULT0 0x00090006
|
|
|
|
#define GPIO_PK1_SSI3FSS 0x00090402
|
|
#define GPIO_PK1_M1FAULT1 0x00090406
|
|
|
|
#define GPIO_PK2_SSI3RX 0x00090802
|
|
#define GPIO_PK2_M1FAULT2 0x00090806
|
|
|
|
#define GPIO_PK3_SSI3TX 0x00090C02
|
|
#define GPIO_PK3_M1FAULT3 0x00090C06
|
|
|
|
#define GPIO_PK4_U7RX 0x00091001
|
|
#define GPIO_PK4_FAN0PWM6 0x00091002
|
|
#define GPIO_PK4_M0FAULT0 0x00091006
|
|
#define GPIO_PK4_RTCCLK 0x00091007
|
|
#define GPIO_PK4_C0O 0x00091008
|
|
|
|
#define GPIO_PK5_U7TX 0x00091401
|
|
#define GPIO_PK5_FAN0TACH6 0x00091402
|
|
#define GPIO_PK5_M0FAULT1 0x00091406
|
|
#define GPIO_PK5_C1O 0x00091408
|
|
|
|
#define GPIO_PK6_FAN0PWM1 0x00091801
|
|
#define GPIO_PK6_M0FAULT2 0x00091806
|
|
#define GPIO_PK6_WT1CCP0 0x00091807
|
|
#define GPIO_PK6_C2O 0x00091808
|
|
|
|
#define GPIO_PK7_FAN0TACH1 0x00091C01
|
|
#define GPIO_PK7_M0FAULT3 0x00091C06
|
|
#define GPIO_PK7_WT1CCP1 0x00091C07
|
|
|
|
#define GPIO_PL0_T0CCP0 0x000A0007
|
|
#define GPIO_PL0_WT0CCP0 0x000A0008
|
|
#define GPIO_PL0_LPC0AD3 0x000A000F
|
|
|
|
#define GPIO_PL1_T0CCP1 0x000A0407
|
|
#define GPIO_PL1_WT0CCP1 0x000A0408
|
|
#define GPIO_PL1_LPC0AD2 0x000A040F
|
|
|
|
#define GPIO_PL2_T1CCP0 0x000A0807
|
|
#define GPIO_PL2_WT1CCP0 0x000A0808
|
|
#define GPIO_PL2_LPC0AD1 0x000A080F
|
|
|
|
#define GPIO_PL3_T1CCP1 0x000A0C07
|
|
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
|
#define GPIO_PL3_LPC0AD0 0x000A0C0F
|
|
|
|
#define GPIO_PL4_T2CCP0 0x000A1007
|
|
#define GPIO_PL4_WT2CCP0 0x000A1008
|
|
#define GPIO_PL4_LPC0FRAME_N 0x000A100F
|
|
|
|
#define GPIO_PL5_T2CCP1 0x000A1407
|
|
#define GPIO_PL5_WT2CCP1 0x000A1408
|
|
#define GPIO_PL5_LPC0RESET_N 0x000A140F
|
|
|
|
#define GPIO_PL6_T3CCP0 0x000A1807
|
|
#define GPIO_PL6_WT3CCP0 0x000A1808
|
|
|
|
#define GPIO_PL7_T3CCP1 0x000A1C07
|
|
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
|
|
|
#define GPIO_PM0_T4CCP0 0x000B0007
|
|
#define GPIO_PM0_WT4CCP0 0x000B0008
|
|
#define GPIO_PM0_LPC0PD_N 0x000B000F
|
|
|
|
#define GPIO_PM1_T4CCP1 0x000B0407
|
|
#define GPIO_PM1_WT4CCP1 0x000B0408
|
|
#define GPIO_PM1_LPC0SCI_N 0x000B040F
|
|
|
|
#define GPIO_PM2_T5CCP0 0x000B0807
|
|
#define GPIO_PM2_WT5CCP0 0x000B0808
|
|
#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
|
|
|
|
#define GPIO_PM3_T5CCP1 0x000B0C07
|
|
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
|
|
|
#define GPIO_PM4_LPC0SERIRQ 0x000B100F
|
|
|
|
#define GPIO_PM5_LPC0CLK 0x000B140F
|
|
|
|
#define GPIO_PM6_FAN0PWM0 0x000B1801
|
|
#define GPIO_PM6_M0PWM4 0x000B1802
|
|
#define GPIO_PM6_WT0CCP0 0x000B1807
|
|
|
|
#define GPIO_PM7_FAN0TACH0 0x000B1C01
|
|
#define GPIO_PM7_M0PWM5 0x000B1C02
|
|
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
|
|
|
#define GPIO_PN0_CAN0RX 0x000C0001
|
|
|
|
#define GPIO_PN1_CAN0TX 0x000C0401
|
|
|
|
#define GPIO_PN2_FAN0PWM2 0x000C0801
|
|
#define GPIO_PN2_M0PWM6 0x000C0802
|
|
#define GPIO_PN2_WT2CCP0 0x000C0807
|
|
|
|
#define GPIO_PN3_FAN0TACH2 0x000C0C01
|
|
#define GPIO_PN3_M0PWM7 0x000C0C02
|
|
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
|
|
|
#define GPIO_PN4_FAN0PWM3 0x000C1001
|
|
#define GPIO_PN4_M1PWM4 0x000C1002
|
|
#define GPIO_PN4_WT3CCP0 0x000C1007
|
|
|
|
#define GPIO_PN5_FAN0TACH3 0x000C1401
|
|
#define GPIO_PN5_M1PWM5 0x000C1402
|
|
#define GPIO_PN5_WT3CCP1 0x000C1407
|
|
|
|
#define GPIO_PN6_FAN0PWM4 0x000C1801
|
|
#define GPIO_PN6_M1PWM6 0x000C1802
|
|
#define GPIO_PN6_WT4CCP0 0x000C1807
|
|
|
|
#define GPIO_PN7_FAN0TACH4 0x000C1C01
|
|
#define GPIO_PN7_M1PWM7 0x000C1C02
|
|
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
|
|
|
#define GPIO_PP0_M0PWM0 0x000D0001
|
|
#define GPIO_PP0_T4CCP0 0x000D0007
|
|
|
|
#define GPIO_PP1_M0PWM1 0x000D0401
|
|
#define GPIO_PP1_T4CCP1 0x000D0407
|
|
|
|
#define GPIO_PP2_M0PWM2 0x000D0801
|
|
#define GPIO_PP2_T5CCP0 0x000D0807
|
|
|
|
#define GPIO_PP3_M0PWM3 0x000D0C01
|
|
#define GPIO_PP3_T5CCP1 0x000D0C07
|
|
|
|
#define GPIO_PP4_M0PWM4 0x000D1001
|
|
#define GPIO_PP4_WT0CCP0 0x000D1007
|
|
|
|
#define GPIO_PP5_M0PWM5 0x000D1401
|
|
#define GPIO_PP5_WT0CCP1 0x000D1407
|
|
|
|
#define GPIO_PP6_M0PWM6 0x000D1801
|
|
#define GPIO_PP6_WT1CCP0 0x000D1807
|
|
|
|
#define GPIO_PP7_M0PWM7 0x000D1C01
|
|
#define GPIO_PP7_WT1CCP1 0x000D1C07
|
|
|
|
#define GPIO_PQ0_M1PWM0 0x000E0001
|
|
#define GPIO_PQ0_WT2CCP0 0x000E0007
|
|
|
|
#define GPIO_PQ1_M1PWM1 0x000E0401
|
|
#define GPIO_PQ1_WT2CCP1 0x000E0407
|
|
|
|
#define GPIO_PQ2_M1PWM2 0x000E0801
|
|
#define GPIO_PQ2_WT3CCP0 0x000E0807
|
|
|
|
#define GPIO_PQ3_M1PWM3 0x000E0C01
|
|
#define GPIO_PQ3_WT3CCP1 0x000E0C07
|
|
|
|
#define GPIO_PQ4_M1PWM4 0x000E1001
|
|
#define GPIO_PQ4_WT4CCP0 0x000E1007
|
|
|
|
#define GPIO_PQ5_M1PWM5 0x000E1401
|
|
#define GPIO_PQ5_WT4CCP1 0x000E1407
|
|
|
|
#define GPIO_PQ6_M1PWM6 0x000E1801
|
|
#define GPIO_PQ6_WT5CCP0 0x000E1807
|
|
|
|
#define GPIO_PQ7_M1PWM7 0x000E1C01
|
|
#define GPIO_PQ7_WT5CCP1 0x000E1C07
|
|
|
|
#endif // PART_LM4FS99H5BB
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// LM4FSXAH5BB Port/Pin Mapping Definitions
|
|
//
|
|
//*****************************************************************************
|
|
#ifdef PART_LM4FSXAH5BB
|
|
|
|
#define GPIO_PA0_U0RX 0x00000001
|
|
|
|
#define GPIO_PA1_U0TX 0x00000401
|
|
|
|
#define GPIO_PA2_SSI0CLK 0x00000802
|
|
|
|
#define GPIO_PA3_SSI0FSS 0x00000C02
|
|
|
|
#define GPIO_PA4_SSI0RX 0x00001002
|
|
|
|
#define GPIO_PA5_SSI0TX 0x00001402
|
|
|
|
#define GPIO_PA6_I2C1SCL 0x00001803
|
|
|
|
#define GPIO_PA7_I2C1SDA 0x00001C03
|
|
|
|
#define GPIO_PB0_U1RX 0x00010001
|
|
#define GPIO_PB0_T2CCP0 0x00010007
|
|
|
|
#define GPIO_PB1_U1TX 0x00010401
|
|
#define GPIO_PB1_T2CCP1 0x00010407
|
|
|
|
#define GPIO_PB2_I2C0SCL 0x00010803
|
|
#define GPIO_PB2_T3CCP0 0x00010807
|
|
|
|
#define GPIO_PB3_I2C0SDA 0x00010C03
|
|
#define GPIO_PB3_T3CCP1 0x00010C07
|
|
|
|
#define GPIO_PB4_T1CCP0 0x00011007
|
|
|
|
#define GPIO_PB5_T1CCP1 0x00011407
|
|
|
|
#define GPIO_PB6_I2C5SCL 0x00011803
|
|
#define GPIO_PB6_T0CCP0 0x00011807
|
|
|
|
#define GPIO_PB7_I2C5SDA 0x00011C03
|
|
#define GPIO_PB7_T0CCP1 0x00011C07
|
|
|
|
#define GPIO_PC0_TCK 0x00020001
|
|
#define GPIO_PC0_SWCLK 0x00020001
|
|
#define GPIO_PC0_T4CCP0 0x00020007
|
|
|
|
#define GPIO_PC1_TMS 0x00020401
|
|
#define GPIO_PC1_SWDIO 0x00020401
|
|
#define GPIO_PC1_T4CCP1 0x00020407
|
|
|
|
#define GPIO_PC2_TDI 0x00020801
|
|
#define GPIO_PC2_T5CCP0 0x00020807
|
|
|
|
#define GPIO_PC3_SWO 0x00020C01
|
|
#define GPIO_PC3_TDO 0x00020C01
|
|
#define GPIO_PC3_T5CCP1 0x00020C07
|
|
|
|
#define GPIO_PC4_U1RX 0x00021002
|
|
#define GPIO_PC4_WT0CCP0 0x00021007
|
|
|
|
#define GPIO_PC5_U1TX 0x00021402
|
|
#define GPIO_PC5_WT0CCP1 0x00021407
|
|
|
|
#define GPIO_PC6_WT1CCP0 0x00021807
|
|
|
|
#define GPIO_PC7_WT1CCP1 0x00021C07
|
|
|
|
#define GPIO_PD0_SSI1CLK 0x00030002
|
|
#define GPIO_PD0_I2C3SCL 0x00030003
|
|
#define GPIO_PD0_WT2CCP0 0x00030007
|
|
|
|
#define GPIO_PD1_SSI1FSS 0x00030402
|
|
#define GPIO_PD1_I2C3SDA 0x00030403
|
|
#define GPIO_PD1_WT2CCP1 0x00030407
|
|
|
|
#define GPIO_PD2_SSI1RX 0x00030802
|
|
#define GPIO_PD2_WT3CCP0 0x00030807
|
|
|
|
#define GPIO_PD3_SSI1TX 0x00030C02
|
|
#define GPIO_PD3_WT3CCP1 0x00030C07
|
|
|
|
#define GPIO_PD4_WT4CCP0 0x00031007
|
|
|
|
#define GPIO_PD5_WT4CCP1 0x00031407
|
|
|
|
#define GPIO_PD6_WT5CCP0 0x00031807
|
|
|
|
#define GPIO_PD7_WT5CCP1 0x00031C07
|
|
#define GPIO_PD7_NMI 0x00031C08
|
|
|
|
#define GPIO_PE4_I2C2SCL 0x00041003
|
|
|
|
#define GPIO_PE5_I2C2SDA 0x00041403
|
|
|
|
#define GPIO_PF0_SSI1RX 0x00050002
|
|
#define GPIO_PF0_T0CCP0 0x00050007
|
|
#define GPIO_PF0_NMI 0x00050008
|
|
#define GPIO_PF0_TRD2 0x0005000E
|
|
|
|
#define GPIO_PF1_SSI1TX 0x00050402
|
|
#define GPIO_PF1_T0CCP1 0x00050407
|
|
#define GPIO_PF1_TRD1 0x0005040E
|
|
|
|
#define GPIO_PF2_T1CCP0 0x00050807
|
|
#define GPIO_PF2_SSI1CLK 0x00050802
|
|
#define GPIO_PF2_TRD0 0x0005080E
|
|
|
|
#define GPIO_PF3_T1CCP1 0x00050C07
|
|
#define GPIO_PF3_SSI1FSS 0x00050C02
|
|
#define GPIO_PF3_TRCLK 0x00050C0E
|
|
|
|
#define GPIO_PF4_T2CCP0 0x00051007
|
|
#define GPIO_PF4_TRD3 0x0005100E
|
|
|
|
#define GPIO_PF5_T2CCP1 0x00051407
|
|
|
|
#define GPIO_PF6_I2C2SCL 0x00051803
|
|
#define GPIO_PF6_T3CCP0 0x00051807
|
|
|
|
#define GPIO_PF7_I2C2SDA 0x00051C03
|
|
#define GPIO_PF7_T3CCP1 0x00051C07
|
|
|
|
#define GPIO_PG0_I2C3SCL 0x00060003
|
|
#define GPIO_PG0_T4CCP0 0x00060007
|
|
|
|
#define GPIO_PG1_I2C3SDA 0x00060403
|
|
#define GPIO_PG1_T4CCP1 0x00060407
|
|
|
|
#define GPIO_PG2_I2C4SCL 0x00060803
|
|
#define GPIO_PG2_T5CCP0 0x00060807
|
|
|
|
#define GPIO_PG3_I2C4SDA 0x00060C03
|
|
#define GPIO_PG3_T5CCP1 0x00060C07
|
|
|
|
#define GPIO_PG4_I2C1SCL 0x00061003
|
|
#define GPIO_PG4_WT0CCP0 0x00061007
|
|
|
|
#define GPIO_PG5_I2C1SDA 0x00061403
|
|
#define GPIO_PG5_WT0CCP1 0x00061407
|
|
|
|
#define GPIO_PG6_I2C5SCL 0x00061803
|
|
#define GPIO_PG6_WT1CCP0 0x00061807
|
|
|
|
#define GPIO_PG7_I2C5SDA 0x00061C03
|
|
#define GPIO_PG7_WT1CCP1 0x00061C07
|
|
|
|
#define GPIO_PH0_WT2CCP0 0x00070007
|
|
|
|
#define GPIO_PH1_WT2CCP1 0x00070407
|
|
|
|
#define GPIO_PH2_FAN0PWM5 0x00070801
|
|
#define GPIO_PH2_WT5CCP0 0x00070807
|
|
|
|
#define GPIO_PH3_FAN0TACH5 0x00070C01
|
|
#define GPIO_PH3_WT5CCP1 0x00070C07
|
|
|
|
#define GPIO_PH4_WT3CCP0 0x00071007
|
|
|
|
#define GPIO_PH5_WT3CCP1 0x00071407
|
|
|
|
#define GPIO_PH6_WT4CCP0 0x00071807
|
|
|
|
#define GPIO_PH7_WT4CCP1 0x00071C07
|
|
|
|
#define GPIO_PJ0_T1CCP0 0x00080007
|
|
|
|
#define GPIO_PJ1_T1CCP1 0x00080407
|
|
|
|
#define GPIO_PJ2_T2CCP0 0x00080807
|
|
|
|
#define GPIO_PJ3_T2CCP1 0x00080C07
|
|
|
|
#define GPIO_PJ4_T3CCP0 0x00081007
|
|
|
|
#define GPIO_PJ5_T3CCP1 0x00081407
|
|
|
|
#define GPIO_PJ6_PECI0TX 0x00081801
|
|
|
|
#define GPIO_PK4_RTCCLK 0x00091007
|
|
|
|
#define GPIO_PK6_FAN0PWM1 0x00091801
|
|
#define GPIO_PK6_WT1CCP0 0x00091807
|
|
|
|
#define GPIO_PK7_FAN0TACH1 0x00091C01
|
|
#define GPIO_PK7_WT1CCP1 0x00091C07
|
|
|
|
#define GPIO_PL0_T0CCP0 0x000A0007
|
|
#define GPIO_PL0_WT0CCP0 0x000A0008
|
|
#define GPIO_PL0_LPC0AD3 0x000A000F
|
|
|
|
#define GPIO_PL1_T0CCP1 0x000A0407
|
|
#define GPIO_PL1_WT0CCP1 0x000A0408
|
|
#define GPIO_PL1_LPC0AD2 0x000A040F
|
|
|
|
#define GPIO_PL2_T1CCP0 0x000A0807
|
|
#define GPIO_PL2_WT1CCP0 0x000A0808
|
|
#define GPIO_PL2_LPC0AD1 0x000A080F
|
|
|
|
#define GPIO_PL3_T1CCP1 0x000A0C07
|
|
#define GPIO_PL3_WT1CCP1 0x000A0C08
|
|
#define GPIO_PL3_LPC0AD0 0x000A0C0F
|
|
|
|
#define GPIO_PL4_T2CCP0 0x000A1007
|
|
#define GPIO_PL4_WT2CCP0 0x000A1008
|
|
#define GPIO_PL4_LPC0FRAME_N 0x000A100F
|
|
|
|
#define GPIO_PL5_T2CCP1 0x000A1407
|
|
#define GPIO_PL5_WT2CCP1 0x000A1408
|
|
#define GPIO_PL5_LPC0RESET_N 0x000A140F
|
|
|
|
#define GPIO_PL6_T3CCP0 0x000A1807
|
|
#define GPIO_PL6_WT3CCP0 0x000A1808
|
|
|
|
#define GPIO_PL7_T3CCP1 0x000A1C07
|
|
#define GPIO_PL7_WT3CCP1 0x000A1C08
|
|
|
|
#define GPIO_PM0_T4CCP0 0x000B0007
|
|
#define GPIO_PM0_WT4CCP0 0x000B0008
|
|
#define GPIO_PM0_LPC0PD_N 0x000B000F
|
|
|
|
#define GPIO_PM1_T4CCP1 0x000B0407
|
|
#define GPIO_PM1_WT4CCP1 0x000B0408
|
|
#define GPIO_PM1_LPC0SCI_N 0x000B040F
|
|
|
|
#define GPIO_PM2_T5CCP0 0x000B0807
|
|
#define GPIO_PM2_WT5CCP0 0x000B0808
|
|
#define GPIO_PM2_LPC0CLKRUN_N 0x000B080F
|
|
|
|
#define GPIO_PM3_T5CCP1 0x000B0C07
|
|
#define GPIO_PM3_WT5CCP1 0x000B0C08
|
|
|
|
#define GPIO_PM4_LPC0SERIRQ 0x000B100F
|
|
|
|
#define GPIO_PM5_LPC0CLK 0x000B140F
|
|
|
|
#define GPIO_PM6_FAN0PWM0 0x000B1801
|
|
#define GPIO_PM6_WT0CCP0 0x000B1807
|
|
|
|
#define GPIO_PM7_FAN0TACH0 0x000B1C01
|
|
#define GPIO_PM7_WT0CCP1 0x000B1C07
|
|
|
|
#define GPIO_PN2_FAN0PWM2 0x000C0801
|
|
#define GPIO_PN2_WT2CCP0 0x000C0807
|
|
|
|
#define GPIO_PN3_FAN0TACH2 0x000C0C01
|
|
#define GPIO_PN3_WT2CCP1 0x000C0C07
|
|
|
|
#define GPIO_PN4_FAN0PWM3 0x000C1001
|
|
#define GPIO_PN4_WT3CCP0 0x000C1007
|
|
|
|
#define GPIO_PN5_FAN0TACH3 0x000C1401
|
|
#define GPIO_PN5_WT3CCP1 0x000C1407
|
|
|
|
#define GPIO_PN6_FAN0PWM4 0x000C1801
|
|
#define GPIO_PN6_WT4CCP0 0x000C1807
|
|
|
|
#define GPIO_PN7_FAN0TACH4 0x000C1C01
|
|
#define GPIO_PN7_WT4CCP1 0x000C1C07
|
|
|
|
#define GPIO_PP0_T4CCP0 0x000D0007
|
|
|
|
#define GPIO_PP1_T4CCP1 0x000D0407
|
|
|
|
#define GPIO_PP2_T5CCP0 0x000D0807
|
|
|
|
#define GPIO_PP3_T5CCP1 0x000D0C07
|
|
|
|
#define GPIO_PP4_WT0CCP0 0x000D1007
|
|
|
|
#define GPIO_PP5_WT0CCP1 0x000D1407
|
|
|
|
#define GPIO_PP6_WT1CCP0 0x000D1807
|
|
|
|
#define GPIO_PP7_WT1CCP1 0x000D1C07
|
|
|
|
#define GPIO_PQ0_WT2CCP0 0x000E0007
|
|
|
|
#define GPIO_PQ1_WT2CCP1 0x000E0407
|
|
|
|
#define GPIO_PQ2_WT3CCP0 0x000E0807
|
|
|
|
#define GPIO_PQ3_WT3CCP1 0x000E0C07
|
|
|
|
#define GPIO_PQ4_WT4CCP0 0x000E1007
|
|
|
|
#define GPIO_PQ5_WT4CCP1 0x000E1407
|
|
|
|
#define GPIO_PQ6_WT5CCP0 0x000E1807
|
|
|
|
#define GPIO_PQ7_WT5CCP1 0x000E1C07
|
|
|
|
#endif // PART_LM4FSXAH5BB
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Pin Mapping Functions
|
|
//
|
|
// This section describes the code that is responsible for handling the
|
|
// mapping of peripheral functions to their physical location on the pins of
|
|
// a device.
|
|
//
|
|
//*****************************************************************************
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Definitions to support mapping GPIO Ports and Pins to their function.
|
|
//
|
|
//*****************************************************************************
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified ADC pin to function as an ADC pin.
|
|
//
|
|
// \param ulName is one of the valid names for the ADC pins.
|
|
//
|
|
// This function takes on of the valid names for an ADC pin and configures
|
|
// the pin for its ADC functionality depending on the part that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b ADC0, \b ADC1, \b ADC2,
|
|
// \b ADC3, \b ADC4, \b ADC5, \b ADC6, or \b ADC7.
|
|
//
|
|
// \sa GPIOPinTypeADC() in order to configure multiple ADC pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeADC(ulName) GPIOPinTypeADC(ulName##_PORT, ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified CAN pin to function as a CAN pin.
|
|
//
|
|
// \param ulName is one of the valid names for the CAN pins.
|
|
//
|
|
// This function takes one of the valid names for a CAN pin and configures
|
|
// the pin for its CAN functionality depending on the part that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b CAN0RX, \b CAN0TX,
|
|
// \b CAN1RX, \b CAN1TX, \b CAN2RX, or \b CAN2TX.
|
|
//
|
|
// \sa GPIOPinTypeCAN() in order to configure multiple CAN pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeCAN(ulName) GPIOPinTypeCAN(ulName##_PORT, ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified comparator pin to function as a comparator pin.
|
|
//
|
|
// \param ulName is one of the valid names for the Comparator pins.
|
|
//
|
|
// This function takes one of the valid names for a comparator pin and
|
|
// configures the pin for its comparator functionality depending on the part
|
|
// that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b C0_MINUS, \b C0_PLUS,
|
|
// \b C1_MINUS, \b C1_PLUS, \b C2_MINUS, or \b C2_PLUS.
|
|
//
|
|
// \sa GPIOPinTypeComparator() in order to configure multiple comparator pins
|
|
// at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeComparator(ulName) \
|
|
GPIOPinTypeComparator(ulName##_PORT, \
|
|
ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified I2C pin to function as an I2C pin.
|
|
//
|
|
// \param ulName is one of the valid names for the I2C pins.
|
|
//
|
|
// This function takes one of the valid names for an I2C pin and configures
|
|
// the pin for its I2C functionality depending on the part that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b I2C0SCL, \b I2C0SDA,
|
|
// \b I2C1SCL, or \b I2C1SDA.
|
|
//
|
|
// \sa GPIOPinTypeI2C() in order to configure multiple I2C pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeI2C(ulName) GPIOPinTypeI2C(ulName##_PORT, ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified Ethernet LED to function as an Ethernet LED pin.
|
|
//
|
|
// \param ulName is one of the valid names for the Ethernet LED pins.
|
|
//
|
|
// This function takes one of the valid names for an Ethernet LED pin and
|
|
// configures the pin for its Ethernet LED functionality depending on the part
|
|
// that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b LED0 or \b LED1.
|
|
//
|
|
// sa GPIOPinTypeEthernetLED() in order to configure multiple Ethernet LED
|
|
// pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeEthernetLED(ulName) \
|
|
GPIOPinTypeEthernetLED(ulName##_PORT, \
|
|
ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified PWM pin to function as a PWM pin.
|
|
//
|
|
// \param ulName is one of the valid names for the PWM pins.
|
|
//
|
|
// This function takes one of the valid names for a PWM pin and configures
|
|
// the pin for its PWM functionality depending on the part that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b PWM0, \b PWM1, \b PWM2,
|
|
// \b PWM3, \b PWM4, \b PWM5, or \b FAULT.
|
|
//
|
|
// \sa GPIOPinTypePWM() in order to configure multiple PWM pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypePWM(ulName) GPIOPinTypePWM(ulName##_PORT, ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified QEI pin to function as a QEI pin.
|
|
//
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|
// \param ulName is one of the valid names for the QEI pins.
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//
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|
// This function takes one of the valid names for a QEI pin and configures
|
|
// the pin for its QEI functionality depending on the part that is defined.
|
|
//
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|
// The valid names for the pins are as follows: \b PHA0, \b PHB0, \b IDX0,
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// \b PHA1, \b PHB1, or \b IDX1.
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|
//
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|
// \sa GPIOPinTypeQEI() in order to configure multiple QEI pins at once.
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|
//
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|
// \return None.
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|
//
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|
//*****************************************************************************
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|
#define PinTypeQEI(ulName) GPIOPinTypeQEI(ulName##_PORT, ulName##_PIN)
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|
|
|
//*****************************************************************************
|
|
//
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|
// Configures the specified SSI pin to function as an SSI pin.
|
|
//
|
|
// \param ulName is one of the valid names for the SSI pins.
|
|
//
|
|
// This function takes one of the valid names for an SSI pin and configures
|
|
// the pin for its SSI functionality depending on the part that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b SSI0CLK, \b SSI0FSS,
|
|
// \b SSI0RX, \b SSI0TX, \b SSI1CLK, \b SSI1FSS, \b SSI1RX, or \b SSI1TX.
|
|
//
|
|
// \sa GPIOPinTypeSSI() in order to configure multiple SSI pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeSSI(ulName) GPIOPinTypeSSI(ulName##_PORT, ulName##_PIN)
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|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified Timer pin to function as a Timer pin.
|
|
//
|
|
// \param ulName is one of the valid names for the Timer pins.
|
|
//
|
|
// This function takes one of the valid names for a Timer pin and configures
|
|
// the pin for its Timer functionality depending on the part that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b CCP0, \b CCP1, \b CCP2,
|
|
// \b CCP3, \b CCP4, \b CCP5, \b CCP6, or \b CCP7.
|
|
//
|
|
// \sa GPIOPinTypeTimer() in order to configure multiple CCP pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeTimer(ulName) GPIOPinTypeTimer(ulName##_PORT, ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
// Configures the specified UART pin to function as a UART pin.
|
|
//
|
|
// \param ulName is one of the valid names for the UART pins.
|
|
//
|
|
// This function takes one of the valid names for a UART pin and configures
|
|
// the pin for its UART functionality depending on the part that is defined.
|
|
//
|
|
// The valid names for the pins are as follows: \b U0RX, \b U0TX, \b U1RX,
|
|
// \b U1TX, \b U2RX, or \b U2TX.
|
|
//
|
|
// \sa GPIOPinTypeUART() in order to configure multiple UART pins at once.
|
|
//
|
|
// \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeUART(ulName) GPIOPinTypeUART(ulName##_PORT, ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Configures the specified USB digital pin to function as a USB pin.
|
|
//!
|
|
//! \param ulName is one of the valid names for a USB digital pin.
|
|
//!
|
|
//! This function takes one of the valid names for a USB digital pin and
|
|
//! configures the pin for its USB functionality depending on the part that is
|
|
//! defined.
|
|
//!
|
|
//! The valid names for the pins are as follows: \b EPEN or \b PFAULT.
|
|
//!
|
|
//! \sa GPIOPinTypeUSBDigital() in order to configure multiple USB pins at
|
|
//! once.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PinTypeUSBDigital(ulName) \
|
|
GPIOPinTypeUSBDigital(ulName##_PORT, \
|
|
ulName##_PIN)
|
|
|
|
//*****************************************************************************
|
|
//
|
|
//! Enables the peripheral port used by the given pin.
|
|
//!
|
|
//! \param ulName is one of the valid names for a pin.
|
|
//!
|
|
//! This function takes one of the valid names for a pin function and
|
|
//! enables the peripheral port for that pin depending on the part that is
|
|
//! defined.
|
|
//!
|
|
//! Any valid pin name can be used.
|
|
//!
|
|
//! \sa SysCtlPeripheralEnable() in order to enable a single port when
|
|
//! multiple pins are on the same port.
|
|
//!
|
|
//! \return None.
|
|
//
|
|
//*****************************************************************************
|
|
#define PeripheralEnable(ulName) \
|
|
SysCtlPeripheralEnable(ulName##_PERIPH)
|
|
|
|
#endif // __PIN_MAP_H__
|