285 lines
10 KiB
C
285 lines
10 KiB
C
//*****************************************************************************
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//
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// fpu.c - Routines for manipulating the floating-point unit in the Cortex-M
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// processor.
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//
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// Copyright (c) 2011 Texas Instruments Incorporated. All rights reserved.
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// Software License Agreement
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//
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// Texas Instruments (TI) is supplying this software for use solely and
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// exclusively on TI's microcontroller products. The software is owned by
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// TI and/or its suppliers, and is protected under applicable copyright
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// laws. You may not combine this software with "viral" open-source
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// software in order to form a larger program.
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//
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// THIS SOFTWARE IS PROVIDED "AS IS" AND WITH ALL FAULTS.
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// NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT
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// NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. TI SHALL NOT, UNDER ANY
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// CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL
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// DAMAGES, FOR ANY REASON WHATSOEVER.
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//
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// This is part of revision 8264 of the Stellaris Peripheral Driver Library.
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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//! \addtogroup fpu_api
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//! @{
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//
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//*****************************************************************************
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#include "inc/hw_nvic.h"
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#include "inc/hw_types.h"
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#include "fpu.h"
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//*****************************************************************************
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//
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//! Enables the floating-point unit.
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//!
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//! This function enables the floating-point unit, allowing the floating-point
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//! instructions to be executed. This function must be called prior to
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//! performing any hardware floating-point operations; failure to do so results
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//! in a NOCP usage fault.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPUEnable(void)
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{
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//
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// Enable the coprocessors used by the floating-point unit.
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//
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HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
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~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
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NVIC_CPAC_CP10_FULL | NVIC_CPAC_CP11_FULL);
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}
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//*****************************************************************************
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//
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//! Disables the floating-point unit.
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//!
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//! This function disables the floating-point unit, preventing floating-point
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//! instructions from executing (generating a NOCP usage fault instead).
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPUDisable(void)
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{
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//
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// Disable the coprocessors used by the floating-point unit.
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//
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HWREG(NVIC_CPAC) = ((HWREG(NVIC_CPAC) &
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~(NVIC_CPAC_CP10_M | NVIC_CPAC_CP11_M)) |
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NVIC_CPAC_CP10_DIS | NVIC_CPAC_CP11_DIS);
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}
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//*****************************************************************************
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//
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//! Enables the stacking of floating-point registers.
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//!
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//! This function enables the stacking of floating-point registers s0-s15 when
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//! an interrupt is handled. When enabled, space is reserved on the stack for
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//! the floating-point context and the floating-point state is saved into this
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//! stack space. Upon return from the interrupt, the floating-point context is
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//! restored.
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//!
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//! If the floating-point registers are not stacked, floating-point
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//! instructions cannot be safely executed in an interrupt handler because the
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//! values of s0-s15 are not likely to be preserved for the interrupted code.
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//! On the other hand, stacking the floating-point registers increases the
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//! stacking operation from 8 words to 26 words, also increasing the interrupt
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//! response latency.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPUStackingEnable(void)
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{
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//
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// Enable automatic state preservation for the floating-point unit, and
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// disable lazy state preservation (meaning that the floating-point state
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// is always stacked when floating-point instructions are used).
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//
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HWREG(NVIC_FPCC) = (HWREG(NVIC_FPCC) & ~NVIC_FPCC_LSPEN) | NVIC_FPCC_ASPEN;
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}
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//*****************************************************************************
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//
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//! Enables the lazy stacking of floating-point registers.
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//!
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//! This function enables the lazy stacking of floating-point registers s0-s15
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//! when an interrupt is handled. When lazy stacking is enabled, space is
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//! reserved on the stack for the floating-point context, but the
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//! floating-point state is not saved. If a floating-point instruction is
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//! executed from within the interrupt context, the floating-point context is
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//! first saved into the space reserved on the stack. On completion of the
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//! interrupt handler, the floating-point context is only restored if it was
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//! saved (as the result of executing a floating-point instruction).
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//!
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//! This method provides a compromise between fast interrupt response (because
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//! the floating-point state is not saved on interrupt entry) and the ability
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//! to use floating-point in interrupt handlers (because the floating-point
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//! state is saved if floating-point instructions are used).
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPULazyStackingEnable(void)
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{
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//
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// Enable automatic and lazy state preservation for the floating-point
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// unit.
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//
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HWREG(NVIC_FPCC) |= NVIC_FPCC_ASPEN | NVIC_FPCC_LSPEN;
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}
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//*****************************************************************************
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//
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//! Disables the stacking of floating-point registers.
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//!
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//! This function disables the stacking of floating-point registers s0-s15 when
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//! an interrupt is handled. When floating-point context stacking is disabled,
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//! floating-point operations performed in an interrupt handler destroy the
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//! floating-point context of the main thread of execution.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPUStackingDisable(void)
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{
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//
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// Disable automatic and lazy state preservation for the floating-point
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// unit.
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//
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HWREG(NVIC_FPCC) &= ~(NVIC_FPCC_ASPEN | NVIC_FPCC_LSPEN);
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}
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//*****************************************************************************
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//
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//! Selects the format of half-precision floating-point values.
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//!
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//! \param ulMode is the format for half-precision floating-point value, which
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//! is either \b FPU_HALF_IEEE or \b FPU_HALF_ALTERNATE.
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//!
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//! This function selects between the IEEE half-precision floating-point
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//! representation and the Cortex-M processor alternative representation. The
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//! alternative representation has a larger range but does not have a way to
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//! encode infinity (positive or negative) or NaN (quiet or signaling). The
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//! default setting is the IEEE format.
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//!
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//! \note Unless this function is called prior to executing any floating-point
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//! instructions, the default mode is used.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPUHalfPrecisionModeSet(unsigned long ulMode)
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{
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//
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// Set the half-precision floating-point format.
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//
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HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_AHP)) | ulMode;
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}
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//*****************************************************************************
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//
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//! Selects the NaN mode.
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//!
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//! \param ulMode is the mode for NaN results; which is either
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//! \b FPU_NAN_PROPAGATE or \b FPU_NAN_DEFAULT.
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//!
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//! This function selects the handling of NaN results during floating-point
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//! computations. NaNs can either propagate (the default), or they can return
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//! the default NaN.
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//!
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//! \note Unless this function is called prior to executing any floating-point
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//! instructions, the default mode is used.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPUNaNModeSet(unsigned long ulMode)
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{
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//
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// Set the NaN mode.
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//
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HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_DN)) | ulMode;
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}
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//*****************************************************************************
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//
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//! Selects the flush-to-zero mode.
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//!
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//! \param ulMode is the flush-to-zero mode; which is either
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//! \b FPU_FLUSH_TO_ZERO_DIS or \b FPU_FLUSH_TO_ZERO_EN.
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//!
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//! This function enables or disables the flush-to-zero mode of the
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//! floating-point unit. When disabled (the default), the floating-point unit
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//! is fully IEEE compliant. When enabled, values close to zero are treated as
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//! zero, greatly improving the execution speed at the expense of some accuracy
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//! (as well as IEEE compliance).
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//!
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//! \note Unless this function is called prior to executing any floating-point
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//! instructions, the default mode is used.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPUFlushToZeroModeSet(unsigned long ulMode)
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{
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//
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// Set the flush-to-zero mode.
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//
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HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_FZ)) | ulMode;
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}
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//*****************************************************************************
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//
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//! Selects the rounding mode for floating-point results.
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//!
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//! \param ulMode is the rounding mode.
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//!
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//! This function selects the rounding mode for floating-point results. After
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//! a floating-point operation, the result is rounded toward the specified
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//! value. The default mode is \b FPU_ROUND_NEAREST.
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//!
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//! The following rounding modes are available (as specified by \e ulMode):
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//!
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//! - \b FPU_ROUND_NEAREST - round toward the nearest value
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//! - \b FPU_ROUND_POS_INF - round toward positive infinity
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//! - \b FPU_ROUND_NEG_INF - round toward negative infinity
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//! - \b FPU_ROUND_ZERO - round toward zero
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//!
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//! \note Unless this function is called prior to executing any floating-point
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//! instructions, the default mode is used.
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//!
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//! \return None.
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//
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//*****************************************************************************
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void
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FPURoundingModeSet(unsigned long ulMode)
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{
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//
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// Set the rounding mode.
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//
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HWREG(NVIC_FPDSC) = (HWREG(NVIC_FPDSC) & ~(NVIC_FPDSC_RMODE_M)) | ulMode;
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}
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//*****************************************************************************
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//
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// Close the Doxygen group.
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//! @}
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//
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//*****************************************************************************
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