561 lines
14 KiB
C
561 lines
14 KiB
C
/*
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* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-09-15 flyingcys 1st version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include "wm_io.h"
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#include "wm_uart.h"
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#include "wm_gpio_afsel.h"
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#include "wm_type_def.h"
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#include "wm_cpu.h"
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#include "drv_uart.h"
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#include "pin_map.h"
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#define WM600_UART0 (TLS_UART_REGS_T *) HR_UART0_BASE_ADDR
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#define WM600_UART1 (TLS_UART_REGS_T *) HR_UART1_BASE_ADDR
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#define WM600_UART2 (TLS_UART_REGS_T *) HR_UART2_BASE_ADDR
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static void wm_uart_reg_init(TLS_UART_REGS_T *UARTx)
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{
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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if (UARTx == WM600_UART0)
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{
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/* disable auto flow control */
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tls_reg_write32(HR_UART0_FLOW_CTRL, 0);
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/* disable dma */
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tls_reg_write32(HR_UART0_DMA_CTRL, 0);
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/* one byte tx */
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tls_reg_write32(HR_UART0_FIFO_CTRL, 0);
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/* disable interrupt */
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tls_reg_write32(HR_UART0_INT_MASK, 0xFF);
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/* enable rx/timeout interrupt */
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tls_reg_write32(HR_UART0_INT_MASK, ~(3 << 2));
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}
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else if (UARTx == WM600_UART1)
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{
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/* 4 byte tx, 8 bytes rx */
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tls_reg_write32(HR_UART1_FIFO_CTRL, (0x01 << 2) | (0x02 << 4));
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/* enable rx timeout, disable rx dma, disable tx dma */
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tls_reg_write32(HR_UART1_DMA_CTRL, (8 << 3) | (1 << 2));
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/* enable rx/timeout interrupt */
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tls_reg_write32(HR_UART1_INT_MASK, ~(3 << 2));
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}
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else if (UARTx == WM600_UART2)
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{
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/* 4 byte tx, 8 bytes rx */
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tls_reg_write32(HR_UART2_FIFO_CTRL, (0x01 << 2) | (0x02 << 4));
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/* enable rx timeout, disable rx dma, disable tx dma */
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tls_reg_write32(HR_UART2_DMA_CTRL, (8 << 3) | (1 << 2));
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/* enable rx/timeout interrupt */
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tls_reg_write32(HR_UART2_INT_MASK, ~(3 << 2));
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UARTx->UR_LC &= ~(0x1000000);
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}
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}
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static void wm_uart_gpio_config(TLS_UART_REGS_T *UARTx)
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{
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#if defined(BSP_USING_UART1) || defined(BSP_USING_UART2)
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rt_int16_t gpio_pin;
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#endif
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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if (UARTx == WM600_UART0)
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{
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/* UART0_TX-PA04 UART0_RX-PA05 */
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wm_uart0_tx_config(WM_IO_PA_04);
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wm_uart0_rx_config(WM_IO_PA_05);
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}
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#ifdef BSP_USING_UART1
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else if (UARTx == WM600_UART1)
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{
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gpio_pin = wm_get_pin(WM_UART1_RX_PIN);
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if (gpio_pin >= 0)
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{
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wm_uart1_rx_config((enum tls_io_name)gpio_pin);
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}
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gpio_pin = wm_get_pin(WM_UART1_TX_PIN);
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if (gpio_pin >= 0)
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{
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wm_uart1_tx_config((enum tls_io_name)gpio_pin);
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}
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}
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#endif
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#ifdef BSP_USING_UART2
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else if (UARTx == WM600_UART2)
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{
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gpio_pin = wm_get_pin(WM_UART2_RX_PIN);
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if (gpio_pin >= 0)
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{
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wm_uart2_rx_config((enum tls_io_name)gpio_pin);
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}
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gpio_pin = wm_get_pin(WM_UART2_TX_PIN);
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if (gpio_pin >= 0)
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{
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wm_uart2_tx_scio_config((enum tls_io_name)gpio_pin);
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}
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}
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#endif
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}
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static void wm_uart_irq_config(TLS_UART_REGS_T *UARTx)
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{
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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/* config uart interrupt register */
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/* clear interrupt */
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UARTx->UR_INTS = 0xFFFFFFFF;
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/* enable interupt */
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UARTx->UR_INTM = 0x0;
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UARTx->UR_DMAC = (4UL << UDMA_RX_FIFO_TIMEOUT_SHIFT) | UDMA_RX_FIFO_TIMEOUT;
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/* config FIFO control */
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UARTx->UR_FIFOC = UFC_TX_FIFO_LVL_16_BYTE | UFC_RX_FIFO_LVL_16_BYTE | UFC_TX_FIFO_RESET | UFC_RX_FIFO_RESET;
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UARTx->UR_LC &= ~(ULCON_TX_EN | ULCON_RX_EN);
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UARTx->UR_LC |= ULCON_TX_EN | ULCON_RX_EN;
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}
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static int wm_uart_baudrate_set(TLS_UART_REGS_T *UARTx, u32 baudrate)
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{
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u32 value;
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u32 apbclk;
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tls_sys_clk sysclk;
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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tls_sys_clk_get(&sysclk);
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apbclk = sysclk.apbclk * 1000000;
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value = (apbclk / (16 * baudrate) - 1) |
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(((apbclk % (baudrate * 16)) * 16 / (baudrate * 16)) << 16);
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UARTx->UR_BD = value;
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return WM_SUCCESS;
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}
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static int wm_uart_parity_set(TLS_UART_REGS_T *UARTx, TLS_UART_PMODE_T paritytype)
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{
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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if (paritytype == TLS_UART_PMODE_DISABLED)
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UARTx->UR_LC &= ~ULCON_PMD_EN;
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else if (paritytype == TLS_UART_PMODE_EVEN)
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{
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UARTx->UR_LC &= ~ULCON_PMD_MASK;
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UARTx->UR_LC |= ULCON_PMD_EVEN;
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}
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else if (paritytype == TLS_UART_PMODE_ODD)
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{
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UARTx->UR_LC &= ~ULCON_PMD_MASK;
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UARTx->UR_LC |= ULCON_PMD_ODD;
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}
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else
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return WM_FAILED;
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return WM_SUCCESS;
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}
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static int wm_uart_stopbits_set(TLS_UART_REGS_T *UARTx, TLS_UART_STOPBITS_T stopbits)
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{
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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if (stopbits == TLS_UART_TWO_STOPBITS)
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UARTx->UR_LC |= ULCON_STOP_2;
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else
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UARTx->UR_LC &= ~ULCON_STOP_2;
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return WM_SUCCESS;
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}
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static int wm_uart_databits_set(TLS_UART_REGS_T *UARTx, TLS_UART_CHSIZE_T charlength)
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{
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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UARTx->UR_LC &= ~ULCON_WL_MASK;
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if (charlength == TLS_UART_CHSIZE_5BIT)
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UARTx->UR_LC |= ULCON_WL5;
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else if (charlength == TLS_UART_CHSIZE_6BIT)
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UARTx->UR_LC |= ULCON_WL6;
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else if (charlength == TLS_UART_CHSIZE_7BIT)
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UARTx->UR_LC |= ULCON_WL7;
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else if (charlength == TLS_UART_CHSIZE_8BIT)
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UARTx->UR_LC |= ULCON_WL8;
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else
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return WM_FAILED;
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return WM_SUCCESS;
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}
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static int wm_uart_flow_ctrl_set(TLS_UART_REGS_T *UARTx, TLS_UART_FLOW_CTRL_MODE_T flow_ctrl)
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{
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RT_ASSERT(UARTx == WM600_UART0 || UARTx == WM600_UART1 || UARTx == WM600_UART2);
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switch (flow_ctrl)
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{
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case TLS_UART_FLOW_CTRL_NONE:
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UARTx->UR_FC = 0;
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break;
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case TLS_UART_FLOW_CTRL_HARDWARE:
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UARTx->UR_FC = (1UL << 0) | (6UL << 2);
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break;
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default:
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break;
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}
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return WM_SUCCESS;
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}
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struct device_uart
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{
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TLS_UART_REGS_T volatile *uart_device;
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rt_uint32_t uart_irq_no;
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};
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static rt_err_t drv_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg);
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static rt_err_t drv_uart_control(struct rt_serial_device *serial, int cmd, void *arg);
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static int drv_uart_putc(struct rt_serial_device *serial, char c);
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static int drv_uart_getc(struct rt_serial_device *serial);
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static rt_size_t drv_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction);
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const struct rt_uart_ops _uart_ops =
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{
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drv_uart_configure,
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drv_uart_control,
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drv_uart_putc,
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drv_uart_getc,
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drv_uart_dma_transmit
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};
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/*
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* UART interface
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*/
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static rt_err_t drv_uart_configure(struct rt_serial_device *serial, struct serial_configure *cfg)
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{
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struct device_uart *uart;
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u32 baud_rate;
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TLS_UART_PMODE_T parity;
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TLS_UART_STOPBITS_T stop_bits;
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TLS_UART_CHSIZE_T data_bits;
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RT_ASSERT(serial != RT_NULL && cfg != RT_NULL);
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serial->config = *cfg;
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uart = (struct device_uart *)serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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switch (cfg->baud_rate)
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{
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case BAUD_RATE_2000000:
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case BAUD_RATE_921600:
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case BAUD_RATE_460800:
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case BAUD_RATE_230400:
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case BAUD_RATE_115200:
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case BAUD_RATE_57600:
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case BAUD_RATE_38400:
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case BAUD_RATE_19200:
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case BAUD_RATE_9600:
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case BAUD_RATE_4800:
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case BAUD_RATE_2400:
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baud_rate = cfg->baud_rate;
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break;
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default:
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rt_kprintf("baudrate set failed... default rate:115200\r\n");
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baud_rate = BAUD_RATE_115200;
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break;
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}
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wm_uart_baudrate_set((TLS_UART_REGS_T *)uart->uart_device, baud_rate);
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switch (cfg->parity)
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{
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case PARITY_ODD:
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parity = TLS_UART_PMODE_ODD;
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break;
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case PARITY_EVEN:
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parity = TLS_UART_PMODE_EVEN;
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break;
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case PARITY_NONE:
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default:
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parity = TLS_UART_PMODE_DISABLED;
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break;
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}
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wm_uart_parity_set((TLS_UART_REGS_T *)uart->uart_device, parity);
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switch (cfg->stop_bits)
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{
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case STOP_BITS_2:
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stop_bits = TLS_UART_TWO_STOPBITS;
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break;
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case STOP_BITS_1:
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default:
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stop_bits = TLS_UART_ONE_STOPBITS;
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break;
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}
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wm_uart_stopbits_set((TLS_UART_REGS_T *)uart->uart_device, stop_bits);
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switch (cfg->data_bits)
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{
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case DATA_BITS_5:
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data_bits = TLS_UART_CHSIZE_5BIT;
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break;
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case DATA_BITS_6:
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data_bits = TLS_UART_CHSIZE_6BIT;
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break;
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case DATA_BITS_7:
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data_bits = TLS_UART_CHSIZE_7BIT;
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break;
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case DATA_BITS_8:
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default:
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data_bits = TLS_UART_CHSIZE_8BIT;
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break;
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}
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wm_uart_databits_set((TLS_UART_REGS_T *)uart->uart_device, data_bits);
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wm_uart_flow_ctrl_set((TLS_UART_REGS_T *)uart->uart_device, TLS_UART_FLOW_CTRL_NONE);
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return (RT_EOK);
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}
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static rt_err_t drv_uart_control(struct rt_serial_device *serial, int cmd, void *arg)
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{
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struct device_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct device_uart *)serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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switch (cmd)
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{
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case RT_DEVICE_CTRL_CLR_INT:
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/* Disable the UART Interrupt */
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tls_irq_disable(uart->uart_irq_no);
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break;
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case RT_DEVICE_CTRL_SET_INT:
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/* Enable the UART Interrupt */
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tls_irq_enable(uart->uart_irq_no);
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break;
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}
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return (RT_EOK);
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}
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static int drv_uart_putc(struct rt_serial_device *serial, char c)
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{
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struct device_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct device_uart *)serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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while (uart->uart_device->UR_FIFOS & 0x3F); /* wait THR is empty */
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uart->uart_device->UR_TXW = (char)c;
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return (1);
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}
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static int drv_uart_getc(struct rt_serial_device *serial)
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{
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int ch;
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struct device_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct device_uart *)serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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ch = -1;
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if (uart->uart_device->UR_FIFOS & UFS_RX_FIFO_CNT_MASK)
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ch = (int)uart->uart_device->UR_RXW;
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return ch;
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}
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static rt_size_t drv_uart_dma_transmit(struct rt_serial_device *serial, rt_uint8_t *buf, rt_size_t size, int direction)
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{
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return (0);
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}
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static void drv_uart_irq_handler(struct rt_serial_device *serial)
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{
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u32 intr_src;
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struct device_uart *uart;
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RT_ASSERT(serial != RT_NULL);
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uart = (struct device_uart *)serial->parent.user_data;
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RT_ASSERT(uart != RT_NULL);
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/* check interrupt status */
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intr_src = uart->uart_device->UR_INTS;
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uart->uart_device->UR_INTS = intr_src;
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if ((intr_src & UART_RX_INT_FLAG) && (0 == (uart->uart_device->UR_INTM & UIS_RX_FIFO)))
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{
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rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
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}
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if (intr_src & UART_TX_INT_FLAG)
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{
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}
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if (intr_src & UIS_CTS_CHNG)
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{
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}
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}
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#ifdef BSP_USING_UART0
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static struct rt_serial_device serial0;
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static struct device_uart uart0 =
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{
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WM600_UART0,
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UART0_INT,
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};
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void UART0_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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drv_uart_irq_handler(&serial0);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_UART1
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static struct rt_serial_device serial1;
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static struct device_uart uart1 =
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{
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WM600_UART1,
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UART1_INT,
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};
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void UART1_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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drv_uart_irq_handler(&serial1);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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#ifdef BSP_USING_UART2
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static struct rt_serial_device serial2;
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static struct device_uart uart2 =
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{
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WM600_UART2,
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UART2_INT,
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};
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void UART2_IRQHandler(void)
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{
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/* enter interrupt */
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rt_interrupt_enter();
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drv_uart_irq_handler(&serial2);
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/* leave interrupt */
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rt_interrupt_leave();
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}
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#endif
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/*
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* UART Initiation
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*/
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int wm_hw_uart_init(void)
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{
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struct rt_serial_device *serial;
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struct serial_configure config = RT_SERIAL_CONFIG_DEFAULT;
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struct device_uart *uart;
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#ifdef BSP_USING_UART0
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{
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serial = &serial0;
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uart = &uart0;
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/* Init UART Hardware */
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wm_uart_gpio_config((TLS_UART_REGS_T *)uart->uart_device);
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wm_uart_reg_init((TLS_UART_REGS_T *)uart->uart_device);
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wm_uart_irq_config((TLS_UART_REGS_T *)uart->uart_device);
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serial->ops = &_uart_ops;
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serial->config = config;
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serial->config.baud_rate = 115200;
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rt_hw_serial_register(serial,
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"uart0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
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uart);
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}
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#endif /* BSP_USING_UART0 */
|
|
|
|
#ifdef BSP_USING_UART1
|
|
{
|
|
serial = &serial1;
|
|
uart = &uart1;
|
|
|
|
/* Init UART Hardware */
|
|
wm_uart_gpio_config((TLS_UART_REGS_T *)uart->uart_device);
|
|
wm_uart_reg_init((TLS_UART_REGS_T *)uart->uart_device);
|
|
wm_uart_irq_config((TLS_UART_REGS_T *)uart->uart_device);
|
|
|
|
serial->ops = &_uart_ops;
|
|
serial->config = config;
|
|
serial->config.baud_rate = WM_UART1_BAUDRATE;
|
|
|
|
rt_hw_serial_register(serial,
|
|
"uart1",
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
|
uart);
|
|
}
|
|
#endif /* BSP_USING_UART1 */
|
|
#ifdef BSP_USING_UART2
|
|
{
|
|
serial = &serial2;
|
|
uart = &uart2;
|
|
|
|
/* Init UART Hardware */
|
|
wm_uart_gpio_config((TLS_UART_REGS_T *)uart->uart_device);
|
|
wm_uart_reg_init((TLS_UART_REGS_T *)uart->uart_device);
|
|
wm_uart_irq_config((TLS_UART_REGS_T *)uart->uart_device);
|
|
|
|
serial->ops = &_uart_ops;
|
|
serial->config = config;
|
|
serial->config.baud_rate = WM_UART2_BAUDRATE;
|
|
|
|
rt_hw_serial_register(serial,
|
|
"uart2",
|
|
RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
|
|
uart);
|
|
}
|
|
#endif /* BSP_USING_UART2 */
|
|
return 0;
|
|
}
|
|
INIT_BOARD_EXPORT(wm_hw_uart_init);
|