121 lines
3.2 KiB
C
121 lines
3.2 KiB
C
/*
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* Copyright (c) 2012, Freescale Semiconductor, Inc.
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* All rights reserved.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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// File: uart_iomux_config.c
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/* ------------------------------------------------------------------------------
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* <auto-generated>
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* This code was generated by a tool.
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* Runtime Version:3.4.0.0
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*
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* Changes to this file may cause incorrect behavior and will be lost if
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* the code is regenerated.
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* </auto-generated>
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* ------------------------------------------------------------------------------
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*/
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#include "iomux_config.h"
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#include "registers/regsuart.h"
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#include "iomux_register.h"
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#include "io.h"
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#include <assert.h>
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#define MX6UL_PAD_UART1_TX_DATA__UART1_TX1 (IOMUXC_BASE_ADDR+0x084)
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#define MX6UL_PAD_UART1_RX_DATA__UART1_RX1 (IOMUXC_BASE_ADDR+0x088)
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#define IOMUXC_UART1_UART_RXD_MUX_SELECT_INPUT1 (IOMUXC_BASE_ADDR+0x624)
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#define PIN_CFG(mux_ctl_offset, pad_ctl_offset, select_input_offset, mux_mode, daisy, pad_setting) \
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do {\
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writel(mux_mode, IOMUXC_BASE_ADDR + mux_ctl_offset);\
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if (select_input_offset != 0)\
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writel(daisy, IOMUXC_BASE_ADDR + select_input_offset);\
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writel(pad_setting, IOMUXC_BASE_ADDR + pad_ctl_offset);\
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} while(0);
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#define MX6UL_PAD_UART1_TX_DATA__UART1_TX(p) PIN_CFG(0x0084, 0x0310, 0x0624, 0x0, 0x2, p)
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#define MX6UL_PAD_UART1_RX_DATA__UART1_RX(p) PIN_CFG(0x0088, 0x0314, 0x0624, 0x0, 0x3, p)
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void uart1_iomux_config(void)
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{
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/* UART1 TXD */
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MX6UL_PAD_UART1_TX_DATA__UART1_TX(0x10b0);
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/* UART1 RXD */
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MX6UL_PAD_UART1_RX_DATA__UART1_RX(0x10b0);
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}
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void uart2_iomux_config(void)
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{
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}
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void uart3_iomux_config(void)
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{
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}
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void uart4_iomux_config(void)
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{
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}
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void uart5_iomux_config(void)
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{
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}
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void uart6_iomux_config(void)
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{
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}
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void uart7_iomux_config(void)
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{
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}
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void uart8_iomux_config(void)
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{
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}
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void uart_iomux_config(int instance)
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{
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switch (instance)
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{
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case HW_UART1:
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return uart1_iomux_config();
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case HW_UART2:
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return uart2_iomux_config();
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case HW_UART3:
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return uart3_iomux_config();
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case HW_UART4:
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return uart4_iomux_config();
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case HW_UART5:
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return uart5_iomux_config();
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case HW_UART6:
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return uart5_iomux_config();
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case HW_UART7:
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return uart5_iomux_config();
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case HW_UART8:
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return uart5_iomux_config();
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default:
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assert(false);
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}
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}
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