rt-thread/bsp/cvitek/c906_little
Chen Wang 5dd3b7427a
Accumulated patchsets for bsp/cvitek (#8968)
* bsp: cvitek: kconfig: add wdt for cv18xx_riscv

Add Watchdog timer in Kconfig.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* drv: cvitek: remove using macro from source file

Building of source file should be controlled by SConscript,
but not in source file itself.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add i2c for cv18xx_riscv

Add I2C in Kconfig for c906B.

Note, the IRQ# is different from that of c906L.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: kconfig: add rtc for cv18xx_riscv

Add RTC in Kconfig for c906B.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp: cvitek: fix channel issue for pwm driver

The original code confuses the concepts of controllers and channels.
Fixed it and do some code cleanup.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for cv18xx_riscv

Pinmux in driver code is controlled by SOC type, bcos driver
code should be general and support all pins defined by SoC.

Pinmux configuration in Kconfig is controlled by BOARD type,
bcos when we operate on board, it does not expose all chip-level
pin signals and we can only use part of them.

Following is I2C signals exported by duo family. Details see
https://milkv.io/docs/duo/overview.

Note: we have not added support for duo-S.

Duo
===

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP0     I2C0_SCL    XGPIOA[28]      IIC0_SCL__IIC0_SCL
GP1     I2C0_SDA    XGPIOA[29]      IIC0_SDA__IIC0_SDA

GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP11    I2C1_SCL    XGPIOC[10]      PAD_MIPIRX0N__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA
GP10    I2C1_SDA    XGPIOC[9]       PAD_MIPIRX1P__IIC1_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo 256m
========

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------
GP4     I2C1_SCL    PWR_GPIO[19]    SD1_D2__IIC1_SCL
GP9     I2C1_SCL    PWR_GPIO[18]    SD1_D3__IIC1_SCL
GP5     I2C1_SDA    PWR_GPIO[20]    SD1_D1__IIC1_SDA
GP8     I2C1_SDA    PWR_GPIO[21]    SD1_D0__IIC1_SDA

GP11    I2C2_SCL    XGPIOC[15]      PAD_MIPI_TXP1__IIC2_SCL
GP10    I2C2_SDA    XGPIOC[14]      PAD_MIPI_TXM1__IIC2_SDA

GP7     I2C3_SCL    PWR_GPIO[22]    SD1_CMD__IIC3_SCL
GP6     I2C3_SDA    PWR_GPIO[23]    SD1_CLK__IIC3_SDA

Duo S
=====

NAME    I2C         CV1800B/GPIO    <PINNAME>__<FUNCNAME>
----    ---         ------------    ---------------------

J3-B18  I2C1_SCL    XGPIOB[18]      VIVO_D3__IIC1_SCL
J3-B12  I2C1_SCL    XGPIOB[12]      VIVO_D9__IIC1_SCL
J3-B11  I2C1_SDA    XGPIOB[11]      VIVO_D10__IIC1_SDA

J3-B13  I2C2_SCL    XGPIOB[13]      VIVO_D8__IIC2_SCL
J4-E1   I2C2_SCL    PWR_GPIO[1]     PWR_GPIO1__IIC2_SCL
J3-B14  I2C2_SDA    XGPIOB[14]      VIVO_D7__IIC2_SDA
J4-E2   I2C2_SDA    PWR_GPIO[2]     PWR_GPIO2__IIC2_SDA

J3-B20  I2C4_SCL    XGPIOB[20]      VIVO_D1__IIC4_SCL
J4-B1   I2C4_SCL    XGPIOB[1]       ADC3__IIC4_SCL
J3-B21  I2C4_SDA    XGPIOB[21]      VIVO_D0__IIC4_SDA
J4-B2   I2C4_SDA    XGPIOB[2]       ADC2__IIC4_SDA

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>

* bsp:cvitek: remove using macro from source file for i2c

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: unify menu message text for i2c as other drivers

Other dirvers has no extra word "HW".

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

* bsp:cvitek: add i2c pinmux config for c906_little

Porting what we have done in commit "bsp:cvitek: add i2c pinmux config
for cv18xx_riscv" to c906_little.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>

---------

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: flyingcys <flyingcys@163.com>
Co-authored-by: flyingcys <flyingcys@163.com>
2024-05-22 08:19:07 +08:00
..
applications add cvitek/c906_little (#8514) 2024-01-29 09:13:21 +08:00
board Accumulated patchsets for bsp/cvitek (#8968) 2024-05-22 08:19:07 +08:00
.config support cv181x-riscv for RT-SMART (#8724) 2024-04-03 07:37:45 +08:00
Kconfig Accumulated patchsets for bsp/cvitek (#8968) 2024-05-22 08:19:07 +08:00
README.md support cvitek bsp spinor flash 2024-04-09 18:09:54 -04:00
README_en.md support cvitek bsp spinor flash 2024-04-09 18:09:54 -04:00
SConscript add cvitek/c906_little (#8514) 2024-01-29 09:13:21 +08:00
SConstruct support cv181x c906_little (#8680) 2024-03-28 23:35:54 +08:00
rtconfig.h support cv181x-riscv for RT-SMART (#8724) 2024-04-03 07:37:45 +08:00
rtconfig.py support cv181x c906_little (#8680) 2024-03-28 23:35:54 +08:00

README_en.md

c906_little bsp

This BSP is a coprocessor in the cv18xx series processor, using RISCV C906 @ 700Mhz. Features:

  • No MMU
  • Integrated Floating-point Unit (FPU)

Toolchain Download

Download the toolchain for riscv64-unknown-elf-gcc: https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource//1705395512373/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1-20240115.tar.gz

Note: Current BSP only supports Linux compilation.

After correct decompression, add the local path of the riscv64-unknown-elf-gcc toolchain to EXEC_PATH in rtconfig.py, or specify the path through the RTT_EXEC_PATH environment variable.

$ export RTT_EXEC_PATH=/opt/Xuantie-900-gcc-elf-newlib-x86_64-V2.8.1/bin

Compilation

  1. Dependency Installation
$ sudo apt install -y scons libncurses5-dev wget flex bison
  1. On Linux platform, execute:
$ scons --menuconfig

Choose the target development board type that needs to be compiled:

Board Type (milkv-duo)  --->
    ( ) milkv-duo
    ( ) milkv-duo-spinor
    (X) milkv-duo256m
    ( ) milkv-duo256m-spinor

It will automatically download env related scripts to the ~/.env directory, then execute

$ source ~/.env/env.sh
$ pkgs --update

After updating the software packages, execute scons -j10 or scons -j10 --verbose to compile this BSP. Or use the scons --exec-path="GCC toolchain path" command to compile directly while specifying the toolchain location. If the compilation is correct, the rtthread.elf file will be generated.

After the compilation is completed, the script automatically calls the combine-fip.sh script for packaging, and generates fip.sd, which is the c906_little file for SD card startup.

The first time the combine-fip.sh script is called, it will automatically download the required opsbsbi, fsbl, uboot, and other related files to the bsp/cvitek/cvitek_bootloader directory, please be patient.

After downloading, it will automatically decompress and compile. Subsequently, when compiling the same type of development board again, only the relevant files will be called to package and synthesize fip.bin. If you need to manually compile the related cvitek_bootloader files, you can execute bash build.sh lunch in the bsp/cvitek/cvitek_bootloader directory to choose the corresponding development board for compilation.

Running

  1. Divide the SD card into 2 partitions, the 1st partition is used to store bin files, and the 2nd partition is used as a data storage partition, with the partition format being FAT32.
  2. Copy the fip.bin and boot.sd from the root directory into the 1st partition of the SD card. Subsequent firmware updates only require copying the fip.sd file. Where:
  • fip.bin: fsbl, opensbi, uboot, c906_little packaged bin file
  • boot.sd: bin file packaged by the main kernel

After updating fip.sd, restarting will show the output information on the serial port:

HW_HEAP_BEGIN:83f74dc0 RT_HW_HEAP_END:84000000 size: 569920

 \ | /
- RT -     Thread Operating System
 / | \     5.1.0 build Jan 27 2024 22:45:49
 2006 - 2022 Copyright by RT-Thread team
Hello, RISC-V!
msh />

Note: The default log serial port for the c906 little core is uart1