107 lines
4.7 KiB
C
107 lines
4.7 KiB
C
/* Auto-generated config file ieee8023_mii_standard_config.h */
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#ifndef IEEE8023_MII_STANDARD_CONFIG_H
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#define IEEE8023_MII_STANDARD_CONFIG_H
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// <<< Use Configuration Wizard in Context Menu >>>
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// <h> Basic configuration
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// <o> PHY Address <0-31>
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// <i> The PHY Address is five bits, allowing 32 unique PHY addresses. A PHY
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// <i> that is connected to the station management entity via the mechanical
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// <i> interface defined in IEEE 802.3 22.6 shall always respond to
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// <i> transactions addressed to PHY Address zero b00000. A station management
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// <i> entity that is attached to multiple PHYs must have prior knowledge of
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// <i> the appropriate PHY Address for each PHY.
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// <id> ieee8023_mii_phy_address
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_PHY_ADDRESS
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#define CONF_MACIF_PHY_IEEE8023_MII_PHY_ADDRESS 0
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#endif
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// </h>
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// <e> Control Register (Register 0) Settings
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// <i> The MII Management Interface Control Register (Register 0) Setting.
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// <i> Full details about the can be found in Clause 22.2.4 of the IEEE 802.3
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// <i> Specification.
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// <id> ieee8023_mii_control_reg0_setting
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_REG0_SETTING
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_REG0_SETTING 1
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#endif
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// <q> Loopback Enable
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// <i> Set PHY be placed in a loopback mode of operation.
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// <id> ieee8023_mii_control_loopback_en
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_LOOPBACK_EN
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_LOOPBACK_EN 0
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#endif
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// <o> Speed Selection
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// <i> These bits select the PHY speed.
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// <0x0=> 10 Mb/s
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// <0x1=> 100 Mb/s
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// <0x2=> 1000 Mb/s
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// <id> ieee8023_mii_control_speed_lsb
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_SPEED
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_SPEED 1
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#endif
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// <q> Auto-Negotiation Enable
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// <i> Indicates whether the Auto-Negotiation enable or not
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// <id> ieee8023_mii_control_autoneg_en
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_AUTONEG_EN
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_AUTONEG_EN 1
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#endif
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// <q> Power Down Enable
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// <i> Set PHY in a low-power consumption state, The specific behavior of a
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// <i> PHY in the power-down state is implementation specific. While in the
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// <i> power-down state, the PHY shall respond to management transactions.
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// <i> During the transition to the power-down state and while in the
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// <i> power-down state, the PHY shall not generate spurious signals on the
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// <i> MII or GMII.
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// <id> ieee8023_mii_control_powerdown_en
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_POWER_DOWN_EN
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_POWER_DOWN_EN 0
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#endif
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// <q> Isolate Enable
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// <i> Set PHY forced to electrically isolate its data paths from the MII or
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// <i> GMII. When the PHY is isolated from the MII or GMII it shall not
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// <i> respond to the TXD data bundle, TX_EN, TX_ER and GTX_CLK inputs, and it
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// <i> shall present a high impedance on its TX_CLK, RX_CLK, RX_DV, RX_ER, RXD
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// <i> data bundle, COL, and CRS outputs. When the PHY is isolated from the
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// <i> MII or GMII it shall respond to management transactions.
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// <id> ieee8023_mii_control_isolate_en
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_ISOLATE_EN
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_ISOLATE_EN 0
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#endif
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// <o> Duplex Mode Selection
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// <i> The duplex mode can be selected via either the Auto-Negotiation enable,
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// <i> or manual duplex selection. Manual duplex selection is allowed when
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// <i> Auto-Negotiation is disabled. When Auto-Negotiation is enabled, this
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// <i> setting has no effect on the link configuration.
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// <0x0=> half duplex
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// <0x1=> full duplex
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// <id> ieee8023_mii_control_duplex_mode
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_DUPLEX_MODE
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_DUPLEX_MODE 1
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#endif
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#ifndef CONF_MACIF_PHY_IEEE8023_MII_CONTROL_REG0
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#define CONF_MACIF_PHY_IEEE8023_MII_CONTROL_REG0 \
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(CONF_MACIF_PHY_IEEE8023_MII_CONTROL_LOOPBACK_EN ? MDIO_REG0_BIT_RESET : 0) \
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| ((CONF_MACIF_PHY_IEEE8023_MII_CONTROL_SPEED & 0x1) ? MDIO_REG0_BIT_SPEED_SELECT_LSB : 0) \
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| ((CONF_MACIF_PHY_IEEE8023_MII_CONTROL_SPEED & 0x2) ? MDIO_REG0_BIT_SPEED_SELECT_MSB : 0) \
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| (CONF_MACIF_PHY_IEEE8023_MII_CONTROL_AUTONEG_EN ? MDIO_REG0_BIT_AUTONEG : 0) \
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| (CONF_MACIF_PHY_IEEE8023_MII_CONTROL_POWER_DOWN_EN ? MDIO_REG0_BIT_POWER_DOWN : 0) \
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| (CONF_MACIF_PHY_IEEE8023_MII_CONTROL_ISOLATE_EN ? MDIO_REG0_BIT_ISOLATE : 0) \
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| (CONF_MACIF_PHY_IEEE8023_MII_CONTROL_DUPLEX_MODE ? MDIO_REG0_BIT_DUPLEX_MODE : 0)
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#endif
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// </e>
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// <<< end of configuration section >>>
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#endif // IEEE8023_MII_STANDARD_CONFIG_H
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