218 lines
5.7 KiB
C
218 lines
5.7 KiB
C
/*
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* Copyright (c) 2006-2018, Synwit Technology Co.,Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-5-26 lik first version
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*/
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#include "drv_adc.h"
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#ifdef RT_USING_ADC
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#ifdef BSP_USING_ADC
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//#define DRV_DEBUG
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#define LOG_TAG "drv.adc"
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#include <drv_log.h>
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static struct swm_adc_cfg adc_cfg[] =
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{
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#ifdef BSP_USING_ADC0
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ADC0_CFG,
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#endif
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#ifdef BSP_USING_ADC1
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ADC1_CFG,
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#endif
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};
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static struct swm_adc adc_drv[sizeof(adc_cfg) / sizeof(adc_cfg[0])];
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static rt_err_t swm_adc_enabled(struct rt_adc_device *adc_device, rt_uint32_t channel, rt_bool_t enabled)
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{
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struct swm_adc_cfg *cfg = RT_NULL;
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RT_ASSERT(adc_device != RT_NULL);
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cfg = adc_device->parent.user_data;
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if (enabled)
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{
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ADC_Open(cfg->ADCx);
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}
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else
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{
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ADC_Close(cfg->ADCx);
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}
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return RT_EOK;
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}
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static rt_uint32_t swm_adc_get_channel(rt_uint32_t channel)
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{
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rt_uint32_t swm_channel = 0;
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switch (channel)
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{
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case 0:
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swm_channel = ADC_CH0;
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break;
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case 1:
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swm_channel = ADC_CH1;
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break;
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case 2:
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swm_channel = ADC_CH2;
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break;
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case 3:
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swm_channel = ADC_CH3;
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break;
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case 4:
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swm_channel = ADC_CH4;
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break;
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case 5:
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swm_channel = ADC_CH5;
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break;
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case 6:
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swm_channel = ADC_CH6;
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break;
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case 7:
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swm_channel = ADC_CH7;
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break;
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}
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return swm_channel;
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}
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static rt_err_t swm_get_adc_value(struct rt_adc_device *adc_device, rt_uint32_t channel, rt_uint32_t *value)
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{
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uint32_t adc_chn;
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struct swm_adc_cfg *cfg = RT_NULL;
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RT_ASSERT(adc_device != RT_NULL);
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RT_ASSERT(value != RT_NULL);
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cfg = adc_device->parent.user_data;
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if (channel < 8)
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{
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/* set stm32 ADC channel */
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adc_chn = swm_adc_get_channel(channel);
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}
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else
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{
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LOG_E("ADC channel must be between 0 and 7.");
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return -RT_ERROR;
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}
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/* start ADC */
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ADC_Start(cfg->ADCx);
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/* Wait for the ADC to convert */
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while ((cfg->ADCx->CH[channel].STAT & 0x01) == 0)
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;
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/* get ADC value */
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*value = (rt_uint32_t)ADC_Read(cfg->ADCx, adc_chn);
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return RT_EOK;
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}
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static const struct rt_adc_ops swm_adc_ops =
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{
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.enabled = swm_adc_enabled,
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.convert = swm_get_adc_value,
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};
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static int rt_hw_adc_init(void)
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{
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int i = 0;
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int result = RT_EOK;
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for (i = 0; i < sizeof(adc_cfg) / sizeof(adc_cfg[0]); i++)
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{
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/* ADC init */
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adc_drv[i].cfg = &adc_cfg[i];
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if (adc_drv[i].cfg->ADCx == ADC0)
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{
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#ifdef BSP_USING_ADC0_CHN0
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH0;
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#endif
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#ifdef BSP_USING_ADC0_CHN1
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH1;
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#endif
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#ifdef BSP_USING_ADC0_CHN2
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH2;
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#endif
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#ifdef BSP_USING_ADC0_CHN3
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH3;
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#endif
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#ifdef BSP_USING_ADC0_CHN4
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH4;
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PORT_Init(PORTA, PIN12, PORTA_PIN12_ADC0_IN4, 0); //PA.12 => ADC0.CH4
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#endif
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#ifdef BSP_USING_ADC0_CHN5
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH5;
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PORT_Init(PORTA, PIN11, PORTA_PIN11_ADC0_IN5, 0); //PA.11 => ADC0.CH5
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#endif
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#ifdef BSP_USING_ADC0_CHN6
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH6;
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PORT_Init(PORTA, PIN10, PORTA_PIN10_ADC0_IN6, 0); //PA.10 => ADC0.CH6
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#endif
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#ifdef BSP_USING_ADC0_CHN7
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH7;
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PORT_Init(PORTA, PIN9, PORTA_PIN9_ADC0_IN7, 0); //PA.9 => ADC0.CH7
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#endif
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}
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else if (adc_drv[i].cfg->ADCx == ADC1)
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{
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#ifdef BSP_USING_ADC1_CHN0
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH0;
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PORT_Init(PORTC, PIN7, PORTC_PIN7_ADC1_IN0, 0); //PC.7 => ADC1.CH0
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#endif
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#ifdef BSP_USING_ADC1_CHN1
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH1;
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PORT_Init(PORTC, PIN6, PORTC_PIN6_ADC1_IN1, 0); //PC.6 => ADC1.CH1
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#endif
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#ifdef BSP_USING_ADC1_CHN2
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH2;
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PORT_Init(PORTC, PIN5, PORTC_PIN5_ADC1_IN2, 0); //PC.5 => ADC1.CH2
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#endif
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#ifdef BSP_USING_ADC1_CHN3
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH3;
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PORT_Init(PORTC, PIN4, PORTC_PIN4_ADC1_IN3, 0); //PC.4 => ADC1.CH3
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#endif
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#ifdef BSP_USING_ADC1_CHN4
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH4;
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PORT_Init(PORTN, PIN0, PORTN_PIN0_ADC1_IN4, 0); //PN.0 => ADC1.CH4
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#endif
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#ifdef BSP_USING_ADC1_CHN5
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH5;
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PORT_Init(PORTN, PIN1, PORTN_PIN1_ADC1_IN5, 0); //PN.1 => ADC1.CH5
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#endif
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#ifdef BSP_USING_ADC1_CHN6
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH6;
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PORT_Init(PORTN, PIN2, PORTN_PIN2_ADC1_IN6, 0); //PN.2 => ADC1.CH6
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#endif
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#ifdef BSP_USING_ADC1_CHN7
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adc_drv[i].cfg->adc_initstruct.channels |= ADC_CH7;
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#endif
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}
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ADC_Init(adc_drv[i].cfg->ADCx, &(adc_drv[i].cfg->adc_initstruct));
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ADC_Open(adc_drv[i].cfg->ADCx);
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/* register ADC device */
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if (rt_hw_adc_register(&adc_drv[i].adc_device, adc_drv[i].cfg->name, &swm_adc_ops, adc_drv[i].cfg) == RT_EOK)
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{
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LOG_D("%s init success", adc_drv[i].cfg->name);
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}
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else
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{
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LOG_E("%s register failed", adc_drv[i].cfg->name);
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result = -RT_ERROR;
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}
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}
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_adc_init);
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#endif /* BSP_USING_ADC */
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#endif /* RT_USING_ADC */
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