575 lines
15 KiB
C
575 lines
15 KiB
C
/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-04-20 Wayne First version
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******************************************************************************/
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#include <rtconfig.h>
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#if defined( BSP_USING_I2C)
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#include <rtdevice.h>
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#include "NuMicro.h"
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//#include <drv_i2c.h>
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#include <drv_sys.h>
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/* Private define ---------------------------------------------------------------*/
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#define LOG_TAG "drv.i2c"
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#define DBG_ENABLE
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#define DBG_SECTION_NAME LOG_TAG
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#define DBG_LEVEL DBG_ERROR
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#define DBG_COLOR
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#include <rtdbg.h>
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#define I2C_REG_WRITE(dev, addr, byte) outpw(dev->base + addr, byte)
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#define I2C_REG_READ(dev, addr) inpw(dev->base + addr)
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#define I2C_DISABLE(dev) I2C_REG_WRITE(dev, I2C_CSR, 0x00) /* Disable i2c core and interrupt */
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#define I2C_ENABLE(dev) I2C_REG_WRITE(dev, I2C_CSR, 0x3) /* Enable i2c core and interrupt */
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#define I2C_ISBUSFREE(dev) (((I2C_REG_READ(dev, I2C_SWR) & 0x18) == 0x18 && (I2C_REG_READ(dev, I2C_CSR) & 0x0400) == 0) ? 1 : 0)
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#define I2C_SIGNAL_TIMEOUT 5000
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enum
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{
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I2C_START = -1,
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#if defined(BSP_USING_I2C0)
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I2C0_IDX,
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#endif
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#if defined(BSP_USING_I2C1)
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I2C1_IDX,
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#endif
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I2C_CNT
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};
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/* Private typedef --------------------------------------------------------------*/
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typedef struct
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{
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int32_t base; /* i2c bus number */
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volatile int32_t state;
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int32_t addr;
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uint32_t last_error;
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int32_t bNackValid;
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uint32_t subaddr;
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int32_t subaddr_len;
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volatile uint32_t pos;
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volatile uint32_t len;
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uint8_t *buffer;
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struct rt_completion signal;
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} nu_i2c_dev;
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typedef nu_i2c_dev *nu_i2c_dev_t;
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typedef struct
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{
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struct rt_i2c_bus_device parent;
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char *name;
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IRQn_Type irqn;
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E_SYS_IPRST rstidx;
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E_SYS_IPCLK clkidx;
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struct rt_i2c_msg *cur_i2c_msg;
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nu_i2c_dev dev;
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} nu_i2c_bus ;
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typedef nu_i2c_bus *nu_i2c_bus_t;
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/* Private variables ------------------------------------------------------------*/
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static nu_i2c_bus nu_i2c_arr [ ] =
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{
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#if defined(BSP_USING_I2C0)
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{
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.dev =
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{
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.base = I2C0_BA,
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},
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.name = "i2c0",
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.irqn = IRQ_I2C0,
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.rstidx = I2C0RST,
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.clkidx = I2C0CKEN,
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},
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#endif
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#if defined(BSP_USING_I2C1)
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{
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.dev =
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{
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.base = I2C1_BA,
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},
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.name = "i2c1",
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.irqn = IRQ_I2C1,
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.rstidx = I2C1RST,
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.clkidx = I2C1CKEN,
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},
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#endif
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};
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/* Private functions ------------------------------------------------------------*/
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/**
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* @brief Set i2c interface speed
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* @param[in] dev i2c device structure pointer
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* @param[in] sp i2c speed
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* @return 0 or I2C_ERR_NOTTY
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*/
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static int32_t nu_i2c_set_speed(nu_i2c_dev_t psNuI2cDev, int32_t sp)
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{
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uint32_t d;
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if ((sp != 100) && (sp != 400))
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return (I2C_ERR_NOTTY);
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d = (sysGetClock(SYS_PCLK) * 1000) / (sp * 5) - 1;
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I2C_REG_WRITE(psNuI2cDev, I2C_DIVIDER, d & 0xffff);
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return 0;
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}
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/**
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* @brief Configure i2c command
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* @param[in] dev i2c device structure pointer
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* @param[in] cmd command
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* @return None
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*/
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static void nu_i2c_command(nu_i2c_dev_t psNuI2cDev, int32_t cmd)
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{
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psNuI2cDev->bNackValid = (cmd & I2C_CMD_WRITE) ? 1 : 0;
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I2C_REG_WRITE(psNuI2cDev, I2C_CMDR, cmd);
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}
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/**
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* @brief Configure slave address data
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* @param[in] dev i2c device structure pointer
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* @param[in] mode could be write or read
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* @return None
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*/
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static void nu_i2c_calculate_address(nu_i2c_dev_t psNuI2cDev, int32_t mode)
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{
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int32_t i;
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uint32_t subaddr = psNuI2cDev->subaddr;
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psNuI2cDev->buffer[0] = (((psNuI2cDev->addr << 1) & 0xfe) | I2C_WRITE) & 0xff;
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for (i = psNuI2cDev->subaddr_len; i > 0; i--)
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{
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psNuI2cDev->buffer[i] = subaddr & 0xff;
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subaddr >>= 8;
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}
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if (mode == I2C_STATE_READ)
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{
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i = psNuI2cDev->subaddr_len + 1;
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psNuI2cDev->buffer[i] = (((psNuI2cDev->addr << 1) & 0xfe)) | I2C_READ;
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}
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}
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/**
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* @brief Reset some variables
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* @param[in] dev i2c device structure pointer
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* @return None
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*/
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static void nu_i2c_reset(nu_i2c_dev_t psNuI2cDev)
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{
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psNuI2cDev->addr = -1;
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psNuI2cDev->last_error = 0;
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psNuI2cDev->subaddr = 0;
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psNuI2cDev->subaddr_len = 0;
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}
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static void nu_i2c_isr(int vector, void *param)
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{
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nu_i2c_bus_t psNuI2CBus = (nu_i2c_bus_t)param;
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nu_i2c_dev_t psNuI2CDev = (nu_i2c_dev_t)&psNuI2CBus->dev;
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struct rt_i2c_msg *pmsg = psNuI2CBus->cur_i2c_msg;
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uint32_t msg_flag = pmsg->flags;
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uint32_t csr, val;
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csr = I2C_REG_READ(psNuI2CDev, I2C_CSR);
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csr |= 0x04;
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/* Clear interrupt flag */
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I2C_REG_WRITE(psNuI2CDev, I2C_CSR, csr);
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if (psNuI2CDev->state == I2C_STATE_NOP)
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return;
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/* NACK only valid in WRITE */
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if ((csr & 0x800) && psNuI2CDev->bNackValid && !(msg_flag & RT_I2C_IGNORE_NACK))
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{
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rt_kprintf("I2C W/ NACK\n");
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psNuI2CDev->last_error = I2C_ERR_NACK;
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nu_i2c_command(psNuI2CDev, I2C_CMD_STOP);
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psNuI2CDev->state = I2C_STATE_NOP;
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rt_completion_done(&psNuI2CDev->signal);
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}
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/* Arbitration lost */
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else if (csr & 0x200)
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{
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rt_kprintf("Arbitration lost\n");
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psNuI2CDev->last_error = I2C_ERR_LOSTARBITRATION;
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psNuI2CDev->state = I2C_STATE_NOP;
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rt_completion_done(&psNuI2CDev->signal);
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}
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/* Transmit complete */
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else if (!(csr & 0x100))
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{
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/* Send address state */
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if (psNuI2CDev->pos < psNuI2CDev->subaddr_len + 1)
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{
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val = psNuI2CDev->buffer[psNuI2CDev->pos++] & 0xff;
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I2C_REG_WRITE(psNuI2CDev, I2C_TxR, val);
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nu_i2c_command(psNuI2CDev, I2C_CMD_WRITE);
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}
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else if (psNuI2CDev->state == I2C_STATE_READ)
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{
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/* Sub-address send over, begin restart a read command */
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if (psNuI2CDev->pos == psNuI2CDev->subaddr_len + 1)
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{
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val = psNuI2CDev->buffer[psNuI2CDev->pos++];
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I2C_REG_WRITE(psNuI2CDev, I2C_TxR, val);
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nu_i2c_command(psNuI2CDev, I2C_CMD_START | I2C_CMD_WRITE);
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}
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else
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{
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psNuI2CDev->buffer[psNuI2CDev->pos++] = I2C_REG_READ(psNuI2CDev, I2C_RxR) & 0xff;
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if (psNuI2CDev->pos < psNuI2CDev->len)
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{
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/* Last character */
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if (psNuI2CDev->pos == psNuI2CDev->len - 1)
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nu_i2c_command(psNuI2CDev, I2C_CMD_READ | I2C_CMD_STOP | I2C_CMD_NACK);
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else
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nu_i2c_command(psNuI2CDev, I2C_CMD_READ);
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}
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else
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{
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psNuI2CDev->state = I2C_STATE_NOP;
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rt_completion_done(&psNuI2CDev->signal);
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}
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}
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}
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/* Write data */
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else if (psNuI2CDev->state == I2C_STATE_WRITE)
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{
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if (psNuI2CDev->pos < psNuI2CDev->len)
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{
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val = psNuI2CDev->buffer[psNuI2CDev->pos];
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I2C_REG_WRITE(psNuI2CDev, I2C_TxR, val);
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/* Last character */
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if (psNuI2CDev->pos == psNuI2CDev->len - 1)
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nu_i2c_command(psNuI2CDev, I2C_CMD_WRITE | I2C_CMD_STOP);
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else
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nu_i2c_command(psNuI2CDev, I2C_CMD_WRITE);
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psNuI2CDev->pos ++;
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}
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else
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{
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psNuI2CDev->state = I2C_STATE_NOP;
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rt_completion_done(&psNuI2CDev->signal);
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}
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}
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}
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}
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/**
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* @brief Read data from I2C slave.
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* @param[in] psNuI2cDev is interface structure pointer.
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* @param[in] pmsg is pointer of rt i2c message structure.
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* @return read status.
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* @retval >0 length when success.
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* @retval I2C_ERR_BUSY Interface busy.
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* @retval I2C_ERR_IO Interface not opened.
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* @retval I2C_ERR_NODEV No such device.
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* @retval I2C_ERR_NACK Slave returns an erroneous ACK.
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* @retval I2C_ERR_LOSTARBITRATION arbitration lost happen.
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*/
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static int32_t nu_i2c_read(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
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{
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uint8_t *buf = pmsg->buf;
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uint32_t len = pmsg->len;
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RT_ASSERT(len);
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RT_ASSERT(buf);
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if (len > I2C_MAX_BUF_LEN - 10)
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len = I2C_MAX_BUF_LEN - 10;
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psNuI2cDev->state = I2C_STATE_READ;
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psNuI2cDev->pos = 1;
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/* Current ISR design will get one garbage byte */
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/* plus 1 unused char */
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psNuI2cDev->len = psNuI2cDev->subaddr_len + 1 + len + 2;
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psNuI2cDev->last_error = 0;
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/* Get slave address */
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nu_i2c_calculate_address(psNuI2cDev, I2C_STATE_READ);
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/* Enable I2C-EN */
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I2C_ENABLE(psNuI2cDev);
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/* Send first byte to transfer the message. */
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I2C_REG_WRITE(psNuI2cDev, I2C_TxR, psNuI2cDev->buffer[0] & 0xff);
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if (!I2C_ISBUSFREE(psNuI2cDev))
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return (I2C_ERR_BUSY);
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rt_completion_init(&psNuI2cDev->signal);
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nu_i2c_command(psNuI2cDev, I2C_CMD_START | I2C_CMD_WRITE);
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if ((RT_EOK == rt_completion_wait(&psNuI2cDev->signal, I2C_SIGNAL_TIMEOUT)))
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{
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rt_memcpy(buf, psNuI2cDev->buffer + psNuI2cDev->subaddr_len + 3, len);
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psNuI2cDev->subaddr += len;
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}
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else
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{
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rt_kprintf("[%s]Wait signal timeout.\n", __func__);
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len = 0;
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}
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/* Disable I2C-EN */
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I2C_DISABLE(psNuI2cDev);
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if (psNuI2cDev->last_error)
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return (psNuI2cDev->last_error);
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return len;
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}
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/**
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* @brief Write data from I2C slave.
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* @param[in] psNuI2cDev is interface structure pointer.
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* @param[in] pmsg is pointer of rt i2c message structure.
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* @return write status.
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* @retval >0 length when success.
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* @retval I2C_ERR_BUSY Interface busy.
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* @retval I2C_ERR_IO Interface not opened.
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* @retval I2C_ERR_NODEV No such device.
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* @retval I2C_ERR_NACK Slave returns an erroneous ACK.
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* @retval I2C_ERR_LOSTARBITRATION arbitration lost happen.
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*/
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static int32_t nu_i2c_write(nu_i2c_dev_t psNuI2cDev, struct rt_i2c_msg *pmsg)
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{
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uint8_t *buf = pmsg->buf;
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uint32_t len = pmsg->len;
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RT_ASSERT(len);
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RT_ASSERT(buf);
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if (len > I2C_MAX_BUF_LEN - 10)
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len = I2C_MAX_BUF_LEN - 10;
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rt_memcpy(psNuI2cDev->buffer + psNuI2cDev->subaddr_len + 1, buf, len);
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psNuI2cDev->state = I2C_STATE_WRITE;
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psNuI2cDev->pos = 1;
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psNuI2cDev->len = psNuI2cDev->subaddr_len + 1 + len;
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psNuI2cDev->last_error = 0;
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/* Get slave address */
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nu_i2c_calculate_address(psNuI2cDev, I2C_STATE_WRITE);
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/* Enable I2C-EN */
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I2C_ENABLE(psNuI2cDev);
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/* Send first byte to transfer the message. */
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I2C_REG_WRITE(psNuI2cDev, I2C_TxR, psNuI2cDev->buffer[0] & 0xff);
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if (!I2C_ISBUSFREE(psNuI2cDev))
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return (I2C_ERR_BUSY);
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rt_completion_init(&psNuI2cDev->signal);
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nu_i2c_command(psNuI2cDev, I2C_CMD_START | I2C_CMD_WRITE);
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if ((RT_EOK == rt_completion_wait(&psNuI2cDev->signal, I2C_SIGNAL_TIMEOUT)))
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{
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psNuI2cDev->subaddr += len;
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}
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else
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{
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rt_kprintf("[%s]Wait signal timeout.\n", __func__);
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len = 0;
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}
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/* Disable I2C-EN */
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I2C_DISABLE(psNuI2cDev);
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if (psNuI2cDev->last_error)
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return (psNuI2cDev->last_error);
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return len;
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}
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/**
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* @brief Support some I2C driver commands for application.
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* @param[in] psNuI2cDev is interface structure pointer.
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* @param[in] cmd is command.
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* @param[in] arg0 is the first argument of command.
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* @param[in] arg1 is the second argument of command.
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* @return command status.
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* @retval 0 Success.
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* @retval I2C_ERR_IO Interface not opened.
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* @retval I2C_ERR_NODEV No such device.
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* @retval I2C_ERR_NOTTY Command not support, or parameter error.
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*/
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static int32_t nu_i2c_ioctl(nu_i2c_dev_t psNuI2cDev, uint32_t cmd, uint32_t arg0, uint32_t arg1)
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{
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switch (cmd)
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{
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case I2C_IOC_SET_DEV_ADDRESS:
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psNuI2cDev->addr = arg0;
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break;
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case I2C_IOC_SET_SPEED:
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return nu_i2c_set_speed(psNuI2cDev, (int32_t)arg0);
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case I2C_IOC_SET_SUB_ADDRESS:
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if (arg1 > 4)
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{
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return (I2C_ERR_NOTTY);
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}
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psNuI2cDev->subaddr = arg0;
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psNuI2cDev->subaddr_len = arg1;
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break;
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default:
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return (I2C_ERR_NOTTY);
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}
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return (0);
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}
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static rt_size_t nu_i2c_mst_xfer(struct rt_i2c_bus_device *bus,
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struct rt_i2c_msg msgs[],
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rt_uint32_t num)
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{
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nu_i2c_bus_t psNuI2cBus;
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nu_i2c_dev_t psNuI2cDev;
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rt_size_t i;
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rt_err_t ret;
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struct rt_i2c_msg *pmsg;
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RT_ASSERT(bus);
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psNuI2cBus = (nu_i2c_bus_t) bus;
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psNuI2cDev = &psNuI2cBus->dev;
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for (i = 0; i < num; i++)
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{
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if (!I2C_ISBUSFREE(psNuI2cDev))
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break;
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pmsg = psNuI2cBus->cur_i2c_msg = &msgs[i];
|
|
|
|
/* Not support 10bit. */
|
|
if ((pmsg->flags & RT_I2C_ADDR_10BIT)
|
|
|| (pmsg->len == 0))
|
|
break;
|
|
|
|
/* Set device address */
|
|
nu_i2c_reset(psNuI2cDev);
|
|
|
|
nu_i2c_ioctl(psNuI2cDev, I2C_IOC_SET_DEV_ADDRESS, pmsg->addr, 0);
|
|
|
|
if (pmsg->flags & RT_I2C_RD)
|
|
{
|
|
ret = nu_i2c_read(psNuI2cDev, pmsg);
|
|
}
|
|
else
|
|
{
|
|
ret = nu_i2c_write(psNuI2cDev, pmsg);
|
|
}
|
|
|
|
if (ret != pmsg->len) break;
|
|
}
|
|
|
|
return i;
|
|
}
|
|
|
|
static rt_err_t nu_i2c_bus_control(struct rt_i2c_bus_device *bus, rt_uint32_t u32Cmd, rt_uint32_t u32Value)
|
|
{
|
|
nu_i2c_bus_t psNuI2cBus;
|
|
nu_i2c_dev_t psNuI2cDev;
|
|
|
|
RT_ASSERT(bus);
|
|
|
|
psNuI2cBus = (nu_i2c_bus_t) bus;
|
|
psNuI2cDev = &psNuI2cBus->dev;
|
|
|
|
switch (u32Cmd)
|
|
{
|
|
case RT_I2C_DEV_CTRL_CLK:
|
|
nu_i2c_set_speed(psNuI2cDev, (int32_t)u32Value);
|
|
break;
|
|
default:
|
|
return -RT_EIO;
|
|
}
|
|
|
|
return RT_EOK;
|
|
}
|
|
|
|
static const struct rt_i2c_bus_device_ops nu_i2c_ops =
|
|
{
|
|
.master_xfer = nu_i2c_mst_xfer,
|
|
.slave_xfer = NULL,
|
|
.i2c_bus_control = nu_i2c_bus_control,
|
|
};
|
|
|
|
|
|
/* Public functions -------------------------------------------------------------*/
|
|
int rt_hw_i2c_init(void)
|
|
{
|
|
int i;
|
|
rt_err_t ret;
|
|
|
|
for (i = (I2C_START + 1); i < I2C_CNT; i++)
|
|
{
|
|
nu_i2c_dev_t psNuI2cDev = &nu_i2c_arr[i].dev;
|
|
|
|
nu_i2c_arr[i].parent.ops = &nu_i2c_ops;
|
|
|
|
psNuI2cDev->buffer = rt_malloc(I2C_MAX_BUF_LEN);
|
|
RT_ASSERT(psNuI2cDev->buffer);
|
|
|
|
/* Enable I2C engine clock and reset. */
|
|
nu_sys_ipclk_enable(nu_i2c_arr[i].clkidx);
|
|
nu_sys_ip_reset(nu_i2c_arr[i].rstidx);
|
|
|
|
nu_i2c_ioctl(psNuI2cDev, I2C_IOC_SET_SPEED, 100, 0);
|
|
|
|
/* Register ISR and Respond IRQ. */
|
|
rt_hw_interrupt_install(nu_i2c_arr[i].irqn, nu_i2c_isr, &nu_i2c_arr[i], nu_i2c_arr[i].name);
|
|
rt_hw_interrupt_umask(nu_i2c_arr[i].irqn);
|
|
|
|
ret = rt_i2c_bus_device_register(&nu_i2c_arr[i].parent, nu_i2c_arr[i].name);
|
|
RT_ASSERT(RT_EOK == ret);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
INIT_DEVICE_EXPORT(rt_hw_i2c_init);
|
|
|
|
#endif /* BSP_USING_I2C */
|
|
|