78 lines
2.5 KiB
C
78 lines
2.5 KiB
C
/*
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* Copyright (c) 2006-2021, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2018-11-06 SummerGift first version
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*/
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#include "board.h"
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
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/** Configure LSE Drive Capability
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*/
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HAL_PWR_EnableBkUpAccess();
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__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
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/** Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE|RCC_OSCILLATORTYPE_MSI;
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RCC_OscInitStruct.LSEState = RCC_LSE_ON;
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RCC_OscInitStruct.MSIState = RCC_MSI_ON;
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RCC_OscInitStruct.MSICalibrationValue = 0;
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RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
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RCC_OscInitStruct.PLL.PLLM = 1;
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RCC_OscInitStruct.PLL.PLLN = 40;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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/** Initializes the CPU, AHB and APB busses clocks
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
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{
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Error_Handler();
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}
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_RTC|RCC_PERIPHCLK_USART1
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|RCC_PERIPHCLK_USART2|RCC_PERIPHCLK_LPTIM1;
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PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
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PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
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PeriphClkInit.Lptim1ClockSelection = RCC_LPTIM1CLKSOURCE_LSE;
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PeriphClkInit.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure the main internal regulator output voltage
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*/
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if (HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1) != HAL_OK)
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{
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Error_Handler();
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}
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/** Enable MSI Auto calibration
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*/
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HAL_RCCEx_EnableMSIPLLMode();
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}
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