413 lines
13 KiB
C
413 lines
13 KiB
C
/**
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******************************************************************************
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* @file HAL_dac.c
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* @author AE Team
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* @version V1.0.0
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* @date 28/7/2017
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* @brief This file provides all the DAC firmware functions.
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******************************************************************************
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* @copy
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*
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
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* TIME. AS A RESULT, MindMotion SHALL NOT BE HELD LIABLE FOR ANY
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* DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
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* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
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* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*
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* <h2><center>© COPYRIGHT 2017 MindMotion</center></h2>
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*/
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/* Includes ------------------------------------------------------------------*/
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#include "HAL_dac.h"
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#include "HAL_rcc.h"
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/** @addtogroup StdPeriph_Driver
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* @{
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*/
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/** @defgroup DAC
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* @brief DAC driver modules
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* @{
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*/
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/** @defgroup DAC_Private_TypesDefinitions
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup DAC_Private_Defines
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* @{
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*/
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/* DAC EN mask */
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#define CR_EN_Set ((uint32_t)0x00000001)
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/* DAC DMAEN mask */
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#define CR_DMAEN_Set ((uint32_t)0x00001000)
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/* CR register Mask */
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#define CR_CLEAR_Mask ((uint32_t)0x00000FFE)
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/* DAC SWTRIG mask */
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#define SWTRIGR_SWTRIG_Set ((uint32_t)0x00000001)
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/* DAC Dual Channels SWTRIG masks */
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#define DUAL_SWTRIG_Set ((uint32_t)0x00000003)
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#define DUAL_SWTRIG_Reset ((uint32_t)0xFFFFFFFC)
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/* DHR registers offsets */
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#define DHR12R1_Offset ((uint32_t)0x00000008)
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#define DHR12R2_Offset ((uint32_t)0x00000014)
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#define DHR12RD_Offset ((uint32_t)0x00000020)
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/* DOR register offset */
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#define DOR_Offset ((uint32_t)0x0000002C)
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/**
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* @}
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*/
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/** @defgroup DAC_Private_Macros
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup DAC_Private_Variables
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup DAC_Private_FunctionPrototypes
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* @{
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*/
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/**
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* @}
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*/
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/** @defgroup DAC_Private_Functions
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* @{
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*/
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/**
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* @brief Deinitializes the DAC peripheral registers to their default
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* reset values.
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* @param None
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* @retval : None
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*/
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void DAC_DeInit(void)
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{
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/* Enable DAC reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, ENABLE);
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/* Release DAC from reset state */
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RCC_APB1PeriphResetCmd(RCC_APB1Periph_DAC, DISABLE);
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}
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/**
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* @brief Initializes the DAC peripheral according to the specified
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* parameters in the DAC_InitStruct.
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* @param DAC_Channel: the selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_Channel_1: DAC Channel1 selected
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* @arg DAC_Channel_2: DAC Channel2 selected
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* @param DAC_InitStruct: pointer to a DAC_InitTypeDef structure that
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* contains the configuration information for the specified
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* DAC channel.
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* @retval : None
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*/
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void DAC_Init(uint32_t DAC_Channel, DAC_InitTypeDef* DAC_InitStruct)
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{
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uint32_t tmpreg1 = 0, tmpreg2 = 0;
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/* Check the DAC parameters */
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assert_param(IS_DAC_TRIGGER(DAC_InitStruct->DAC_Trigger));
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assert_param(IS_DAC_GENERATE_WAVE(DAC_InitStruct->DAC_WaveGeneration));
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assert_param(IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude));
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assert_param(IS_DAC_OUTPUT_BUFFER_STATE(DAC_InitStruct->DAC_OutputBuffer));
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/*---------------------------- DAC CR Configuration --------------------------*/
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/* Get the DAC CR value */
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tmpreg1 = DAC->CR;
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/* Clear BOFFx, TENx, TSELx, WAVEx and MAMPx bits */
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tmpreg1 &= ~(CR_CLEAR_Mask << DAC_Channel);
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/* Configure for the selected DAC channel: buffer output, trigger, wave genration,
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mask/amplitude for wave genration */
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/* Set TSELx and TENx bits according to DAC_Trigger value */
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/* Set WAVEx bits according to DAC_WaveGeneration value */
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/* Set MAMPx bits according to DAC_LFSRUnmask_TriangleAmplitude value */
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/* Set BOFFx bit according to DAC_OutputBuffer value */
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tmpreg2 = (DAC_InitStruct->DAC_Trigger | DAC_InitStruct->DAC_WaveGeneration |
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DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude | DAC_InitStruct->DAC_OutputBuffer);
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/* Calculate CR register value depending on DAC_Channel */
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tmpreg1 |= (tmpreg2 << DAC_Channel);
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/* Write to DAC CR */
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DAC->CR = tmpreg1;
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}
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/**
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* @brief Fills each DAC_InitStruct member with its default value.
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* @param DAC_InitStruct : pointer to a DAC_InitTypeDef structure
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* which will be initialized.
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* @retval : None
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*/
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void DAC_StructInit(DAC_InitTypeDef* DAC_InitStruct)
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{
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/*--------------- Reset DAC init structure parameters values -----------------*/
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/* Initialize the DAC_Trigger member */
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DAC_InitStruct->DAC_Trigger = DAC_Trigger_None;
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/* Initialize the DAC_WaveGeneration member */
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DAC_InitStruct->DAC_WaveGeneration = DAC_WaveGeneration_None;
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/* Initialize the DAC_LFSRUnmask_TriangleAmplitude member */
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DAC_InitStruct->DAC_LFSRUnmask_TriangleAmplitude = DAC_LFSRUnmask_Bit0;
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/* Initialize the DAC_OutputBuffer member */
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DAC_InitStruct->DAC_OutputBuffer = DAC_OutputBuffer_Enable;
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}
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/**
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* @brief Enables or disables the specified DAC channel.
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* @param DAC_Channel: the selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_Channel_1: DAC Channel1 selected
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* @arg DAC_Channel_2: DAC Channel2 selected
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* @param NewState: new state of the DAC channel.
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* This parameter can be: ENABLE or DISABLE.
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* @retval : None
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*/
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void DAC_Cmd(uint32_t DAC_Channel, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(DAC_Channel));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected DAC channel */
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DAC->CR |= CR_EN_Set << DAC_Channel;
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}
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else
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{
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/* Disable the selected DAC channel */
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DAC->CR &= ~(CR_EN_Set << DAC_Channel);
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}
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}
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/**
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* @brief Enables or disables the specified DAC channel DMA request.
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* @param DAC_Channel: the selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_Channel_1: DAC Channel1 selected
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* @arg DAC_Channel_2: DAC Channel2 selected
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* @param NewState: new state of the selected DAC channel DMA request.
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* This parameter can be: ENABLE or DISABLE.
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* @retval : None
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*/
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void DAC_DMACmd(uint32_t DAC_Channel, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(DAC_Channel));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected DAC channel DMA request */
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DAC->CR |= CR_DMAEN_Set << DAC_Channel;
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}
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else
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{
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/* Disable the selected DAC channel DMA request */
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DAC->CR &= ~(CR_DMAEN_Set << DAC_Channel);
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}
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}
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/**
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* @brief Enables or disables the selected DAC channel software trigger.
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* @param DAC_Channel: the selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_Channel_1: DAC Channel1 selected
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* @arg DAC_Channel_2: DAC Channel2 selected
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* @param NewState: new state of the selected DAC channel software trigger.
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* This parameter can be: ENABLE or DISABLE.
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* @retval : None
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*/
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void DAC_SoftwareTriggerCmd(uint32_t DAC_Channel, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(DAC_Channel));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable software trigger for the selected DAC channel */
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DAC->SWTRIGR |= SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4);
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}
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else
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{
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/* Disable software trigger for the selected DAC channel */
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DAC->SWTRIGR &= ~(SWTRIGR_SWTRIG_Set << (DAC_Channel >> 4));
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}
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}
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/**
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* @brief Enables or disables simultaneously the two DAC channels software
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* triggers.
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* @param NewState: new state of the DAC channels software triggers.
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* This parameter can be: ENABLE or DISABLE.
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* @retval : None
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*/
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void DAC_DualSoftwareTriggerCmd(FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable software trigger for both DAC channels */
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DAC->SWTRIGR |= DUAL_SWTRIG_Set ;
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}
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else
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{
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/* Disable software trigger for both DAC channels */
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DAC->SWTRIGR &= DUAL_SWTRIG_Reset;
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}
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}
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/**
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* @brief Enables or disables the selected DAC channel wave generation.
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* @param DAC_Channel: the selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_Channel_1: DAC Channel1 selected
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* @arg DAC_Channel_2: DAC Channel2 selected
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* @param DAC_Wave: Specifies the wave type to enable or disable.
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* This parameter can be one of the following values:
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* @arg DAC_Wave_Noise: noise wave generation
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* @arg DAC_Wave_Triangle: triangle wave generation
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* @param NewState: new state of the selected DAC channel wave generation.
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* This parameter can be: ENABLE or DISABLE.
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* @retval : None
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*/
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void DAC_WaveGenerationCmd(uint32_t DAC_Channel, uint32_t DAC_Wave, FunctionalState NewState)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(DAC_Channel));
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assert_param(IS_DAC_WAVE(DAC_Wave));
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assert_param(IS_FUNCTIONAL_STATE(NewState));
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if (NewState != DISABLE)
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{
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/* Enable the selected wave generation for the selected DAC channel */
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DAC->CR |= DAC_Wave << DAC_Channel;
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}
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else
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{
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/* Disable the selected wave generation for the selected DAC channel */
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DAC->CR &= ~(DAC_Wave << DAC_Channel);
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}
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}
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/**
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* @brief Set the specified data holding register value for DAC channel1.
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* @param DAC_Align: Specifies the data alignement for DAC channel1.
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* This parameter can be one of the following values:
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* @arg DAC_Align_8b_R: 8bit right data alignement selected
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* @arg DAC_Align_12b_L: 12bit left data alignement selected
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* @arg DAC_Align_12b_R: 12bit right data alignement selected
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* @param Data : Data to be loaded in the selected data holding
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* register.
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* @retval : None
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*/
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void DAC_SetChannel1Data(uint32_t DAC_Align, uint16_t Data)
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{
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/* Check the parameters */
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assert_param(IS_DAC_ALIGN(DAC_Align));
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assert_param(IS_DAC_DATA(Data));
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/* Set the DAC channel1 selected data holding register */
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*((__IO uint32_t *)(DAC_BASE + DHR12R1_Offset + DAC_Align)) = (uint32_t)Data;
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}
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/**
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* @brief Set the specified data holding register value for DAC channel2.
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* @param DAC_Align: Specifies the data alignement for DAC channel2.
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* This parameter can be one of the following values:
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* @arg DAC_Align_8b_R: 8bit right data alignement selected
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* @arg DAC_Align_12b_L: 12bit left data alignement selected
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* @arg DAC_Align_12b_R: 12bit right data alignement selected
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* @param Data : Data to be loaded in the selected data holding
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* register.
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* @retval : None
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*/
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void DAC_SetChannel2Data(uint32_t DAC_Align, uint16_t Data)
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{
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/* Check the parameters */
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assert_param(IS_DAC_ALIGN(DAC_Align));
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assert_param(IS_DAC_DATA(Data));
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/* Set the DAC channel2 selected data holding register */
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*((__IO uint32_t *)(DAC_BASE + DHR12R2_Offset + DAC_Align)) = (uint32_t)Data;
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}
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/**
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* @brief Set the specified data holding register value for dual channel
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* DAC.
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* @param DAC_Align: Specifies the data alignement for dual channel DAC.
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* This parameter can be one of the following values:
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* @arg DAC_Align_8b_R: 8bit right data alignement selected
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* @arg DAC_Align_12b_L: 12bit left data alignement selected
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* @arg DAC_Align_12b_R: 12bit right data alignement selected
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* @param Data2: Data for DAC Channel2 to be loaded in the selected data
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* holding register.
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* @param Data1: Data for DAC Channel1 to be loaded in the selected data
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* holding register.
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* @retval : None
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*/
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void DAC_SetDualChannelData(uint32_t DAC_Align, uint16_t Data2, uint16_t Data1)
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{
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uint32_t data = 0;
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/* Check the parameters */
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assert_param(IS_DAC_ALIGN(DAC_Align));
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assert_param(IS_DAC_DATA(Data1));
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assert_param(IS_DAC_DATA(Data2));
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/* Calculate and set dual DAC data holding register value */
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if (DAC_Align == DAC_Align_8b_R)
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{
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data = ((uint32_t)Data2 << 8) | Data1;
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}
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else
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{
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data = ((uint32_t)Data2 << 16) | Data1;
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}
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/* Set the dual DAC selected data holding register */
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*((__IO uint32_t *)(DAC_BASE + DHR12RD_Offset + DAC_Align)) = data;
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}
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/**
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* @brief Returns the last data output value of the selected DAC cahnnel.
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* @param DAC_Channel: the selected DAC channel.
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* This parameter can be one of the following values:
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* @arg DAC_Channel_1: DAC Channel1 selected
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* @arg DAC_Channel_2: DAC Channel2 selected
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* @retval : The selected DAC channel data output value.
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*/
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uint16_t DAC_GetDataOutputValue(uint32_t DAC_Channel)
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{
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/* Check the parameters */
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assert_param(IS_DAC_CHANNEL(DAC_Channel));
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/* Returns the DAC channel data output register value */
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return (uint16_t) (*(__IO uint32_t*)(DAC_BASE + DOR_Offset + ((uint32_t)DAC_Channel >> 2)));
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}
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/**
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* @}
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*/
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/**
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* @}
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*/
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/**
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* @}
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*/
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/*-------------------------(C) COPYRIGHT 2017 MindMotion ----------------------*/
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