266 lines
7.4 KiB
C
266 lines
7.4 KiB
C
/*!
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\file gd32f10x_pmu.c
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\brief PMU driver
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\version 2014-12-26, V1.0.0, firmware for GD32F10x
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\version 2017-06-20, V2.0.0, firmware for GD32F10x
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\version 2018-07-31, V2.1.0, firmware for GD32F10x
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*/
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/*
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Copyright (c) 2018, GigaDevice Semiconductor Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without modification,
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are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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3. Neither the name of the copyright holder nor the names of its contributors
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may be used to endorse or promote products derived from this software without
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specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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OF SUCH DAMAGE.
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*/
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#include "gd32f10x_pmu.h"
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/*!
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\brief reset PMU register
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\param[in] none
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\param[out] none
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\retval none
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*/
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void pmu_deinit(void)
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{
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/* reset PMU */
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rcu_periph_reset_enable(RCU_PMURST);
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rcu_periph_reset_disable(RCU_PMURST);
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}
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/*!
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\brief select low voltage detector threshold
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\param[in] lvdt_n:
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only one parameter can be selected which is shown as below:
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\arg PMU_LVDT_0: voltage threshold is 2.2V
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\arg PMU_LVDT_1: voltage threshold is 2.3V
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\arg PMU_LVDT_2: voltage threshold is 2.4V
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\arg PMU_LVDT_3: voltage threshold is 2.5V
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\arg PMU_LVDT_4: voltage threshold is 2.6V
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\arg PMU_LVDT_5: voltage threshold is 2.7V
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\arg PMU_LVDT_6: voltage threshold is 2.8V
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\arg PMU_LVDT_7: voltage threshold is 2.9V
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\param[out] none
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\retval none
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*/
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void pmu_lvd_select(uint32_t lvdt_n)
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{
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/* disable LVD */
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PMU_CTL &= ~PMU_CTL_LVDEN;
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/* clear LVDT bits */
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PMU_CTL &= ~PMU_CTL_LVDT;
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/* set LVDT bits according to lvdt_n */
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PMU_CTL |= lvdt_n;
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/* enable LVD */
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PMU_CTL |= PMU_CTL_LVDEN;
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}
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/*!
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\brief disable PMU lvd
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\param[in] none
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\param[out] none
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\retval none
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*/
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void pmu_lvd_disable(void)
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{
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/* disable LVD */
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PMU_CTL &= ~PMU_CTL_LVDEN;
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}
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/*!
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\brief PMU work at sleep mode
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\param[in] sleepmodecmd:
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only one parameter can be selected which is shown as below:
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\arg WFI_CMD: use WFI command
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\arg WFE_CMD: use WFE command
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\param[out] none
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\retval none
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*/
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void pmu_to_sleepmode(uint8_t sleepmodecmd)
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{
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/* clear sleepdeep bit of Cortex-M3 system control register */
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SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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/* select WFI or WFE command to enter sleep mode */
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if(WFI_CMD == sleepmodecmd){
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__WFI();
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}else{
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__WFE();
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}
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}
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/*!
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\brief PMU work at deepsleep mode
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\param[in] ldo:
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only one parameter can be selected which is shown as below:
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\arg PMU_LDO_NORMAL: LDO work at normal power mode when pmu enter deepsleep mode
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\arg PMU_LDO_LOWPOWER: LDO work at low power mode when pmu enter deepsleep mode
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\param[in] deepsleepmodecmd:
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only one parameter can be selected which is shown as below:
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\arg WFI_CMD: use WFI command
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\arg WFE_CMD: use WFE command
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\param[out] none
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\retval none
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*/
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void pmu_to_deepsleepmode(uint32_t ldo,uint8_t deepsleepmodecmd)
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{
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/* clear stbmod and ldolp bits */
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PMU_CTL &= ~((uint32_t)(PMU_CTL_STBMOD | PMU_CTL_LDOLP));
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/* set ldolp bit according to pmu_ldo */
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PMU_CTL |= ldo;
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/* set sleepdeep bit of Cortex-M3 system control register */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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/* select WFI or WFE command to enter deepsleep mode */
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if(WFI_CMD == deepsleepmodecmd){
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__WFI();
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}else{
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__SEV();
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__WFE();
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__WFE();
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}
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/* reset sleepdeep bit of Cortex-M3 system control register */
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SCB->SCR &= ~((uint32_t)SCB_SCR_SLEEPDEEP_Msk);
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}
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/*!
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\brief pmu work at standby mode
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\param[in] standbymodecmd:
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only one parameter can be selected which is shown as below:
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\arg WFI_CMD: use WFI command
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\arg WFE_CMD: use WFE command
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\param[out] none
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\retval none
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*/
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void pmu_to_standbymode(uint8_t standbymodecmd)
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{
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/* set sleepdeep bit of Cortex-M3 system control register */
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SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk;
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/* set stbmod bit */
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PMU_CTL |= PMU_CTL_STBMOD;
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/* reset wakeup flag */
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PMU_CTL |= PMU_CTL_WURST;
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/* select WFI or WFE command to enter standby mode */
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if(WFI_CMD == standbymodecmd){
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__WFI();
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}else{
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__WFE();
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}
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}
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/*!
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\brief enable wakeup pin
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\param[in] none
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\param[out] none
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\retval none
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*/
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void pmu_wakeup_pin_enable(void)
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{
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PMU_CS |= PMU_CS_WUPEN;
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}
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/*!
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\brief disable wakeup pin
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\param[in] none
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\param[out] none
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\retval none
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*/
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void pmu_wakeup_pin_disable(void)
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{
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PMU_CS &= ~PMU_CS_WUPEN;
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}
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/*!
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\brief enable write access to the registers in backup domain
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\param[in] none
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\param[out] none
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\retval none
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*/
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void pmu_backup_write_enable(void)
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{
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PMU_CTL |= PMU_CTL_BKPWEN;
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}
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/*!
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\brief disable write access to the registers in backup domain
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\param[in] none
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\param[out] none
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\retval none
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*/
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void pmu_backup_write_disable(void)
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{
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PMU_CTL &= ~PMU_CTL_BKPWEN;
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}
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/*!
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\brief get flag state
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\param[in] flag:
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only one parameter can be selected which is shown as below:
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\arg PMU_FLAG_WAKEUP: wakeup flag
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\arg PMU_FLAG_STANDBY: standby flag
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\arg PMU_FLAG_LVD: lvd flag
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\param[out] none
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\retval FlagStatus SET or RESET
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*/
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FlagStatus pmu_flag_get(uint32_t flag)
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{
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if(PMU_CS & flag){
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return SET;
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}else{
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return RESET;
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}
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}
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/*!
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\brief clear flag bit
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\param[in] flag_reset:
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only one parameter can be selected which is shown as below:
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\arg PMU_FLAG_RESET_WAKEUP: reset wakeup flag
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\arg PMU_FLAG_RESET_STANDBY: reset standby flag
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\param[out] none
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\retval none
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*/
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void pmu_flag_clear(uint32_t flag_reset)
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{
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switch(flag_reset){
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case PMU_FLAG_RESET_WAKEUP:
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/* reset wakeup flag */
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PMU_CTL |= PMU_CTL_WURST;
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break;
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case PMU_FLAG_RESET_STANDBY:
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/* reset standby flag */
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PMU_CTL |= PMU_CTL_STBRST;
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break;
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default :
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break;
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}
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}
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