230 lines
6.7 KiB
C
230 lines
6.7 KiB
C
/*
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* Copyright (c) 2006-2023, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2022-12-28 luobeihai first version
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*/
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#include "board.h"
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void apm32_usart_init(void)
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{
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GPIO_Config_T GPIO_ConfigStruct;
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#ifdef BSP_USING_UART1
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOA | RCM_APB2_PERIPH_USART1);
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GPIO_ConfigStruct.mode = GPIO_MODE_AF_PP;
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GPIO_ConfigStruct.pin = GPIO_PIN_9;
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GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
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GPIO_Config(GPIOA, &GPIO_ConfigStruct);
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GPIO_ConfigStruct.mode = GPIO_MODE_IN_FLOATING;
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GPIO_ConfigStruct.pin = GPIO_PIN_10;
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GPIO_Config(GPIOA, &GPIO_ConfigStruct);
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#endif
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#ifdef BSP_USING_UART2
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOA);
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RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_USART2);
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GPIO_ConfigStruct.mode = GPIO_MODE_AF_PP;
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GPIO_ConfigStruct.pin = GPIO_PIN_2;
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GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
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GPIO_Config(GPIOA, &GPIO_ConfigStruct);
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GPIO_ConfigStruct.mode = GPIO_MODE_IN_FLOATING;
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GPIO_ConfigStruct.pin = GPIO_PIN_3;
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GPIO_Config(GPIOA, &GPIO_ConfigStruct);
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#endif
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#ifdef BSP_USING_UART3
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOB);
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RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_USART3);
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GPIO_ConfigStruct.mode = GPIO_MODE_AF_PP;
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GPIO_ConfigStruct.pin = GPIO_PIN_10;
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GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
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GPIO_Config(GPIOB, &GPIO_ConfigStruct);
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GPIO_ConfigStruct.mode = GPIO_MODE_IN_FLOATING;
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GPIO_ConfigStruct.pin = GPIO_PIN_11;
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GPIO_Config(GPIOB, &GPIO_ConfigStruct);
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#endif
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#ifdef BSP_USING_UART4
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOC);
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RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_UART4);
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/* Configure USART Tx as alternate function push-pull */
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GPIO_ConfigStruct.mode = GPIO_MODE_AF_PP;
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GPIO_ConfigStruct.pin = GPIO_PIN_10;
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GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
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GPIO_Config(GPIOC, &GPIO_ConfigStruct);
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/* Configure USART Rx as input floating */
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GPIO_ConfigStruct.mode = GPIO_MODE_IN_FLOATING;
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GPIO_ConfigStruct.pin = GPIO_PIN_11;
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GPIO_Config(GPIOC, &GPIO_ConfigStruct);
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#endif
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}
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void apm32_msp_spi_init(void *Instance)
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{
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#ifdef BSP_USING_SPI
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GPIO_Config_T gpioConfig;
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SPI_T *spi_x = (SPI_T *)Instance;
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if(spi_x == SPI3)
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{
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/* Enable related Clock */
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RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_SPI3);
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOB | RCM_APB2_PERIPH_AFIO);
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GPIO_ConfigPinRemap(GPIO_REMAP_SWJ_JTAGDISABLE);
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/* Configure FLASH_SPI pins: SCK */
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gpioConfig.pin = GPIO_PIN_3;
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gpioConfig.mode = GPIO_MODE_AF_PP;
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gpioConfig.speed = GPIO_SPEED_50MHz;
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GPIO_Config(GPIOB, &gpioConfig);
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/* Configure FLASH_SPI pins: MOSI */
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gpioConfig.pin = GPIO_PIN_5;
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GPIO_Config(GPIOB, &gpioConfig);
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/* Configure FLASH_SPI pins: MISO */
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gpioConfig.pin = GPIO_PIN_4;
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gpioConfig.mode = GPIO_MODE_IN_FLOATING;
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GPIO_Config(GPIOB, &gpioConfig);
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}
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#endif
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}
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void apm32_msp_timer_init(void *Instance)
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{
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#ifdef BSP_USING_PWM
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GPIO_Config_T gpio_config;
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TMR_T *tmr_x = (TMR_T *)Instance;
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if (tmr_x == TMR3)
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{
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RCM_EnableAPB1PeriphClock(RCM_APB1_PERIPH_TMR3);
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOC | RCM_APB2_PERIPH_AFIO);
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GPIO_ConfigPinRemap(GPIO_FULL_REMAP_TMR3);
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/* TMR3 channel 1 gpio config */
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gpio_config.pin = GPIO_PIN_6;
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gpio_config.mode = GPIO_MODE_AF_PP;
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gpio_config.speed = GPIO_SPEED_50MHz;
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GPIO_Config(GPIOC, &gpio_config);
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/* TMR3 channel 2 gpio config */
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gpio_config.pin = GPIO_PIN_7;
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GPIO_Config(GPIOC, &gpio_config);
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/* TMR3 channel 3 gpio config */
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gpio_config.pin = GPIO_PIN_8;
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GPIO_Config(GPIOC, &gpio_config);
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/* TMR3 channel 4 gpio config */
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gpio_config.pin = GPIO_PIN_9;
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GPIO_Config(GPIOC, &gpio_config);
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}
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#endif
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}
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/*
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* phy reset
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*/
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void phy_reset(void)
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{
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/* TODO */
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}
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/*
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* GPIO Configuration for ETH
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*/
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void apm32_msp_eth_init(void *instance)
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{
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#ifdef BSP_USING_ETH
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GPIO_Config_T GPIO_ConfigStruct;
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/* Enable SYSCFG clock */
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_AFIO);
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/* Enable GPIOs clocks */
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RCM_EnableAPB2PeriphClock(RCM_APB2_PERIPH_GPIOA | RCM_APB2_PERIPH_GPIOB
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| RCM_APB2_PERIPH_GPIOC | RCM_APB2_PERIPH_GPIOD);
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/* ETHERNET pins remapp in APM32107-EVAL board: RX_DV and RxD[3:0] */
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GPIO_ConfigPinRemap(GPIO_REMAP_ETH_MAC);
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/* MII/RMII Media interface selection */
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GPIO_ConfigPinRemap(GPIO_REMAP_MACEISEL_RMII);
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/*********************** Ethernet pins configuration ***************************/
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/*
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ETH_MDIO -------------------------> PA2
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ETH_MDC --------------------------> PC1
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ETH_MII_RX_CLK/ETH_RMII_REF_CLK---> PA1
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ETH_MII_RX_DV/ETH_RMII_CRS_DV ----> PD8
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ETH_MII_RXD0/ETH_RMII_RXD0 -------> PD9
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ETH_MII_RXD1/ETH_RMII_RXD1 -------> PD10
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ETH_MII_TX_EN/ETH_RMII_TX_EN -----> PB11
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ETH_MII_TXD0/ETH_RMII_TXD0 -------> PB12
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ETH_MII_TXD1/ETH_RMII_TXD1 -------> PB13
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*/
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GPIO_ConfigStruct.pin = GPIO_PIN_1;
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GPIO_ConfigStruct.mode = GPIO_MODE_IN_FLOATING;
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GPIO_Config(GPIOA, &GPIO_ConfigStruct);
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GPIO_ConfigStruct.pin = GPIO_PIN_8 | GPIO_PIN_9 | GPIO_PIN_10;
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GPIO_ConfigStruct.mode = GPIO_MODE_IN_FLOATING;
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GPIO_Config(GPIOD, &GPIO_ConfigStruct);
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/* Configure PA2 */
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GPIO_ConfigStruct.pin = GPIO_PIN_2;
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GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
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GPIO_ConfigStruct.mode = GPIO_MODE_AF_PP;
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GPIO_Config(GPIOA, &GPIO_ConfigStruct);
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GPIO_ConfigStruct.pin = GPIO_PIN_1;
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GPIO_Config(GPIOC, &GPIO_ConfigStruct);
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/* Configure PB11, PB12, PB13 as alternate function push-pull */
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GPIO_ConfigStruct.pin = GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13;
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GPIO_Config(GPIOB, &GPIO_ConfigStruct);
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/* ETH and CAN shared PB8, RMII Mode PB8 Must be output low */
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GPIO_ConfigStruct.pin = GPIO_PIN_8;
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GPIO_ConfigStruct.mode = GPIO_MODE_OUT_PP;
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GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
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GPIO_Config(GPIOB, &GPIO_ConfigStruct);
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GPIO_ResetBit(GPIOB, GPIO_PIN_8);
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/* Configure PA8 output 25MHz clock */
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GPIO_ConfigStruct.pin = GPIO_PIN_8;
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GPIO_ConfigStruct.speed = GPIO_SPEED_50MHz;
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GPIO_ConfigStruct.mode = GPIO_MODE_AF_PP;
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GPIO_Config(GPIOA, &GPIO_ConfigStruct);
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/* Set PLL3 clock output to 50MHz (25MHz /5 *10 =50MHz) */
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RCM_ConfigPLL3(RCM_PLL3MF_10);
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/* Enable PLL3 */
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RCM_EnablePLL3();
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/* Wait till PLL3 is ready */
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while(RCM_ReadStatusFlag(RCM_FLAG_PLL3RDY) == RESET);
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/* Get PLL3 clock on PA8 pin (MCO) */
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RCM_ConfigMCO(RCM_MCOCLK_PLL3CLK);
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#endif
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}
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