431 lines
11 KiB
C
431 lines
11 KiB
C
/**************************************************************************//**
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*
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* @copyright (C) 2020 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2021-4-13 Wayne First version
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*
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******************************************************************************/
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#include <rtconfig.h>
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#if defined(BSP_USING_VPOST)
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#include <rthw.h>
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#include <rtdevice.h>
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#include <rtdbg.h>
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#include "NuMicro.h"
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#include <drv_sys.h>
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/* Private typedef --------------------------------------------------------------*/
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#define DEF_VPOST_BUFFER_NUMBER 2
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typedef enum
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{
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eVpost_LCD,
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#if defined(BSP_USING_VPOST_OSD)
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eVpost_OSD,
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#endif
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eVpost_Cnt
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} E_VPOST_LAYER;
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struct nu_vpost
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{
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struct rt_device dev;
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char *name;
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E_VPOST_LAYER layer;
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IRQn_Type irqn;
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E_SYS_IPRST rstidx;
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E_SYS_IPCLK clkidx;
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struct rt_device_graphic_info info;
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};
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typedef struct nu_vpost *nu_vpost_t;
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static volatile uint32_t g_u32VSyncBlank = 0;
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static volatile uint32_t g_u32VSyncLastCommit = 0;
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static struct rt_completion vsync_wq;
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static struct nu_vpost nu_fbdev[eVpost_Cnt] =
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{
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{
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.name = "lcd",
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.layer = eVpost_LCD,
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.irqn = IRQ_LCD,
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.rstidx = LCDRST,
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.clkidx = LCDCKEN,
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}
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#if defined(BSP_USING_VPOST_OSD)
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, {
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.name = "osd",
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.layer = eVpost_OSD,
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.irqn = (IRQn_Type) - 1,
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.rstidx = SYS_IPRST_NA,
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.clkidx = SYS_IPCLK_NA,
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}
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#endif
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};
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static rt_err_t vpost_layer_open(rt_device_t dev, rt_uint16_t oflag)
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{
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nu_vpost_t psVpost = (nu_vpost_t)dev;
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RT_ASSERT(psVpost != RT_NULL);
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switch (psVpost->layer)
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{
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case eVpost_LCD:
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vpostVAStartTrigger();
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break;
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#if defined(BSP_USING_VPOST_OSD)
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case eVpost_OSD:
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vpostVAStartTrigger();
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/* Set scale to 1:1 */
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vpostOSDScalingCtrl(1, 0, 0);
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#if (LCM_USING_BPP==4)
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vpostOSDSetColMask(0xff, 0xff, 0xff);
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#else
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vpostOSDSetColMask(0x1f, 0x3f, 0x1f);
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#endif
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/* Enable color key function */
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vpostOSDSetColKey(0, 0, 0);
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/* Configure overlay function of OSD to display OSD image */
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vpostOSDSetOverlay(DISPLAY_OSD, DISPLAY_OSD, 0);
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vpostOSDEnable();
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break;
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#endif
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default:
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static rt_err_t vpost_layer_close(rt_device_t dev)
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{
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nu_vpost_t psVpost = (nu_vpost_t)dev;
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RT_ASSERT(psVpost != RT_NULL);
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switch (psVpost->layer)
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{
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case eVpost_LCD:
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#if defined(BSP_USING_VPOST_OSD)
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if (nu_fbdev[eVpost_OSD].dev.ref_count == 0)
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#endif
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vpostVAStopTrigger();
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break;
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#if defined(BSP_USING_VPOST_OSD)
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case eVpost_OSD:
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vpostOSDDisable();
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if (nu_fbdev[eVpost_LCD].dev.ref_count == 0)
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{
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/* Also stop displaying */
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vpostVAStopTrigger();
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}
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break;
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#endif
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default:
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return -RT_ERROR;
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}
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return RT_EOK;
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}
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static rt_err_t vpost_layer_control(rt_device_t dev, int cmd, void *args)
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{
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nu_vpost_t psVpost = (nu_vpost_t)dev;
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RT_ASSERT(psVpost != RT_NULL);
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switch (cmd)
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{
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case RTGRAPHIC_CTRL_GET_INFO:
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{
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struct rt_device_graphic_info *info = (struct rt_device_graphic_info *) args;
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RT_ASSERT(info != RT_NULL);
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rt_memcpy(args, (void *)&psVpost->info, sizeof(struct rt_device_graphic_info));
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}
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break;
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/* FBIO_PANDISPLAY + WAIT_VSYNC Mechanism */
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case RTGRAPHIC_CTRL_RECT_UPDATE:
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{
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if (args != RT_NULL)
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{
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uint8_t *pu8BufPtr = (uint8_t *)args;
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g_u32VSyncLastCommit = g_u32VSyncBlank;
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/* Pan display */
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switch (psVpost->layer)
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{
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case eVpost_LCD:
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vpostSetFrameBuffer(pu8BufPtr);
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break;
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#if defined(BSP_USING_VPOST_OSD)
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case eVpost_OSD:
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vpostSetOSDBuffer(pu8BufPtr);
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break;
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#endif
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default:
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return -RT_ERROR;
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}
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/*Wait sync*/
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while (g_u32VSyncLastCommit == g_u32VSyncBlank)
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{
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rt_completion_init(&vsync_wq);
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rt_completion_wait(&vsync_wq, RT_TICK_PER_SECOND / 60);
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}
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}
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else
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return -RT_ERROR;
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}
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break;
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default:
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break;
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}
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return RT_EOK;
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}
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static rt_err_t vpost_layer_init(rt_device_t dev)
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{
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nu_vpost_t psVpost = (nu_vpost_t)dev;
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RT_ASSERT(psVpost != RT_NULL);
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/* Enable VPOST engine clock. */
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nu_sys_ipclk_enable(LCDCKEN);
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rt_completion_init(&vsync_wq);
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outpw(REG_LCM_INT_CS, VPOSTB_UNDERRUN_EN | VPOSTB_DISP_F_EN);
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outpw(REG_LCM_DCCS, (inpw(REG_LCM_DCCS) | (1 << 4)));
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return RT_EOK;
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}
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static void nu_vpost_isr(int vector, void *param)
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{
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/*
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#define VPOSTB_DISP_F_INT ((UINT32)1<<31)
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#define VPOSTB_DISP_F_STATUS (1<<30)
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#define VPOSTB_UNDERRUN_INT (1<<29)
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#define VPOSTB_BUS_ERROR_INT (1<<28)
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#define VPOSTB_FLY_ERR (1<<27)
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#define VPOSTB_UNDERRUN_EN (1<<1)
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#define VPOSTB_DISP_F_EN (1)
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*/
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uint32_t u32VpostIRQStatus = inpw(REG_LCM_INT_CS);
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if (u32VpostIRQStatus & VPOSTB_DISP_F_STATUS)
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{
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outpw(REG_LCM_INT_CS, inpw(REG_LCM_INT_CS) | VPOSTB_DISP_F_STATUS);
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g_u32VSyncBlank++;
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rt_completion_done(&vsync_wq);
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}
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else if (u32VpostIRQStatus & VPOSTB_UNDERRUN_INT)
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{
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outpw(REG_LCM_INT_CS, inpw(REG_LCM_INT_CS) | VPOSTB_UNDERRUN_INT);
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}
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else if (u32VpostIRQStatus & VPOSTB_BUS_ERROR_INT)
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{
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outpw(REG_LCM_INT_CS, inpw(REG_LCM_INT_CS) | VPOSTB_BUS_ERROR_INT);
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}
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}
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int rt_hw_vpost_init(void)
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{
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int i = -1;
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rt_err_t ret;
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VPOST_T *psVpostLcmInst = vpostLCMGetInstance(VPOST_USING_LCD_IDX);
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RT_ASSERT(psVpostLcmInst != RT_NULL);
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/* LCD clock is selected from UPLL and divide to 20MHz */
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outpw(REG_CLK_DIVCTL1, (inpw(REG_CLK_DIVCTL1) & ~0xff1f) | 0xE18);
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/* Initial LCM */
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vpostLCMInit(VPOST_USING_LCD_IDX);
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/* Set scale to 1:1 */
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vpostVAScalingCtrl(1, 0, 1, 0, VA_SCALE_INTERPOLATION);
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for (i = eVpost_LCD; i < eVpost_Cnt; i++)
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{
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nu_vpost_t psVpost = &nu_fbdev[i];
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rt_memset((void *)&psVpost->info, 0, sizeof(struct rt_device_graphic_info));
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/* Register VPOST information */
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psVpost->info.bits_per_pixel = LCM_USING_BPP * 8;
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psVpost->info.pixel_format = (LCM_USING_BPP == 4) ? RTGRAPHIC_PIXEL_FORMAT_ARGB888 : RTGRAPHIC_PIXEL_FORMAT_RGB565;
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psVpost->info.pitch = psVpostLcmInst->u32DevWidth * LCM_USING_BPP;
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psVpost->info.width = psVpostLcmInst->u32DevWidth;
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psVpost->info.height = psVpostLcmInst->u32DevHeight;
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/* Get pointer of video frame buffer */
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/* Set display color depth */
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/* Note: before get pointer of frame buffer, must set display color depth first */
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if (psVpost->layer == eVpost_LCD)
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{
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#if (LCM_USING_BPP==4)
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vpostSetVASrc(VA_SRC_RGB888);
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#else
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vpostSetVASrc(VA_SRC_RGB565);
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#endif
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psVpost->info.framebuffer = (rt_uint8_t *)vpostGetMultiFrameBuffer(DEF_VPOST_BUFFER_NUMBER);
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}
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#if defined(BSP_USING_VPOST_OSD)
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else if (psVpost->layer == eVpost_OSD)
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{
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vpostOSDSetWindow(0, 0, psVpost->info.width, psVpost->info.height);
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#if (LCM_USING_BPP==4)
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vpostSetOSDSrc(OSD_SRC_RGB888);
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#else
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vpostSetOSDSrc(OSD_SRC_RGB565);
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#endif
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psVpost->info.framebuffer = (rt_uint8_t *)vpostGetMultiOSDBuffer(DEF_VPOST_BUFFER_NUMBER);
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}
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#endif
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if (psVpost->info.framebuffer == NULL)
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{
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rt_kprintf("Fail to get VRAM buffer.\n");
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RT_ASSERT(0);
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}
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/* Register member functions of lcd device */
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psVpost->dev.type = RT_Device_Class_Graphic;
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psVpost->dev.init = vpost_layer_init;
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psVpost->dev.open = vpost_layer_open;
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psVpost->dev.close = vpost_layer_close;
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psVpost->dev.control = vpost_layer_control;
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/* Register graphic device driver */
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ret = rt_device_register(&psVpost->dev, psVpost->name, RT_DEVICE_FLAG_RDWR);
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RT_ASSERT(ret == RT_EOK);
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if (psVpost->layer == eVpost_LCD)
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{
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rt_hw_interrupt_install(psVpost->irqn, nu_vpost_isr, psVpost, psVpost->name);
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rt_hw_interrupt_umask(psVpost->irqn);
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}
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rt_kprintf("%s's fbmem at 0x%08x.\n", psVpost->name, psVpost->info.framebuffer);
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}
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/* For saving memory bandwidth. */
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vpostLCMDeinit();
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return (int)ret;
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}
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INIT_DEVICE_EXPORT(rt_hw_vpost_init);
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/* Support "vpost_set_osd_colkey" command line in msh mode */
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static rt_err_t vpost_set_osd_colkey(int argc, char **argv)
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{
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rt_uint32_t index, len, arg[4];
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rt_memset(arg, 0, sizeof(arg));
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len = (argc >= 4) ? 4 : argc;
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for (index = 0; index < (len - 1); index ++)
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{
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arg[index] = atol(argv[index + 1]);
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}
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/* Enable color key function */
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vpostOSDSetColKey(arg[0], arg[1], arg[2]);
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/* Configure overlay function of OSD to display VIDEO image */
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vpostOSDSetOverlay(DISPLAY_VIDEO, DISPLAY_OSD, 0);
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return 0;
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}
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MSH_CMD_EXPORT(vpost_set_osd_colkey, e.g: vpost_set_osd_colkey R G B);
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/* Support "vpost_show_layer" command line in msh mode */
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static rt_err_t vpost_show_layer(int argc, char **argv)
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{
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rt_uint32_t index, len, arg[2];
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nu_vpost_t psVpostLayer;
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rt_memset(arg, 0, sizeof(arg));
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len = (argc >= 2) ? 2 : argc;
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for (index = 0; index < (len - 1); index ++)
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{
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arg[index] = atol(argv[index + 1]);
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}
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psVpostLayer = &nu_fbdev[arg[0]];
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return rt_device_open(&psVpostLayer->dev, RT_DEVICE_FLAG_RDWR);
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}
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MSH_CMD_EXPORT(vpost_show_layer, e.g: vpost_show_layer layer);
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/* Support "vpost_hide_layer" command line in msh mode */
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static rt_err_t vpost_hide_layer(int argc, char **argv)
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{
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rt_uint32_t index, len, arg[2];
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nu_vpost_t psVpostLayer;
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rt_memset(arg, 0, sizeof(arg));
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len = (argc >= 2) ? 2 : argc;
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for (index = 0; index < (len - 1); index ++)
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{
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arg[index] = atol(argv[index + 1]);
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}
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psVpostLayer = &nu_fbdev[arg[0]];
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return rt_device_close(&psVpostLayer->dev);
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}
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MSH_CMD_EXPORT(vpost_hide_layer, e.g: vpost_hide_layer layer);
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/* Support "vpost_fill_color" command line in msh mode */
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static rt_err_t vpost_fill_color(int argc, char **argv)
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{
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rt_uint32_t index, len, arg[5];
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nu_vpost_t psVpostLayer;
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rt_memset(arg, 0, sizeof(arg));
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len = (argc >= 5) ? 5 : argc;
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for (index = 0; index < (len - 1); index ++)
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{
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arg[index] = atol(argv[index + 1]);
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}
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psVpostLayer = &nu_fbdev[arg[0]];
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if (psVpostLayer->info.framebuffer != RT_NULL)
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{
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int i;
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uint32_t fill_num = psVpostLayer->info.height * psVpostLayer->info.width;
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uint32_t *fbmem_start = (uint32_t *)psVpostLayer->info.framebuffer;
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uint32_t color = (arg[1] << 16) | (arg[2] << 8) | arg[3] ;
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for (i = 0; i < fill_num; i++)
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{
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rt_memcpy((void *)&fbmem_start[i], &color, (psVpostLayer->info.bits_per_pixel / 8));
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}
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}
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return 0;
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}
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MSH_CMD_EXPORT(vpost_fill_color, e.g: vpost_fill_color layer R G B);
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#endif /* if defined(BSP_USING_VPOST) */
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