93 lines
3.6 KiB
C
93 lines
3.6 KiB
C
/*
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* Copyright (c) 2019-2025 Allwinner Technology Co., Ltd. ALL rights reserved.
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*
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* Allwinner is a trademark of Allwinner Technology Co.,Ltd., registered in
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* the the People's Republic of China and other countries.
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* All Allwinner Technology Co.,Ltd. trademarks are used with permission.
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*
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* DISCLAIMER
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* THIRD PARTY LICENCES MAY BE REQUIRED TO IMPLEMENT THE SOLUTION/PRODUCT.
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* IF YOU NEED TO INTEGRATE THIRD PARTY’S TECHNOLOGY (SONY, DTS, DOLBY, AVS OR MPEGLA, ETC.)
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* IN ALLWINNERS’SDK OR PRODUCTS, YOU SHALL BE SOLELY RESPONSIBLE TO OBTAIN
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* ALL APPROPRIATELY REQUIRED THIRD PARTY LICENCES.
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* ALLWINNER SHALL HAVE NO WARRANTY, INDEMNITY OR OTHER OBLIGATIONS WITH RESPECT TO MATTERS
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* COVERED UNDER ANY REQUIRED THIRD PARTY LICENSE.
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* YOU ARE SOLELY RESPONSIBLE FOR YOUR USAGE OF THIRD PARTY’S TECHNOLOGY.
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*
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*
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* THIS SOFTWARE IS PROVIDED BY ALLWINNER"AS IS" AND TO THE MAXIMUM EXTENT
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* PERMITTED BY LAW, ALLWINNER EXPRESSLY DISCLAIMS ALL WARRANTIES OF ANY KIND,
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* WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING WITHOUT LIMITATION REGARDING
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* THE TITLE, NON-INFRINGEMENT, ACCURACY, CONDITION, COMPLETENESS, PERFORMANCE
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* OR MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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* IN NO EVENT SHALL ALLWINNER BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS, OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __COMMON_LEDC_I_H__
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#define __COMMON_LEDC_I_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* LEDC register offset */
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#define LEDC_CTRL_REG (0x00) /* LEDC Control Register */
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#define LED_T01_TIMING_CTRL_REG (0x04) /* LED T0 & 1 Timing Control Register */
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#define LEDC_DATA_FINISH_CNT_REG (0x08) /* LEDC Data Finish Counter Register */
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#define LED_RST_TIMING_CTRL_REG (0x0c) /* LED Reset Timing Control Register */
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#define LEDC_WAIT_TIME0_CTRL_REG (0x10) /* LEDC Wait Time0 Control Register */
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#define LEDC_DATA_REG (0x14) /* LEDC Data Register */
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#define LEDC_DMA_CTRL_REG (0X18) /* LEDC Dma Control Register */
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#define LEDC_INTC_REG (0x1c) /* LEDC Interrupt Control Register */
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#define LEDC_INTS_REG (0x20) /* LEDC Interrupt Status Register */
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#define LEDC_WAIT_TIME1_CTRL_REG (0x28) /* LEDC Wait Time1 Control Register */
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#define LEDC_VER_NUM_REG (0x2C) /* LEDC Version Number Register */
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#define LEDC_FIFO_DATA0_REG (0x30) /* LEDC Fifo Data0 Register */
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#define LEDC_FIFO_DATA1_REG (0x34) /* LEDC Fifo Data1 Register */
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#define LEDC_FIFO_DATA2_REG (0x38) /* LEDC Fifo Data2 Register */
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#define LEDC_MAX_LED_COUNT 1024
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#define LEDC_DEFAULT_LED_COUNT 8
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#define LEDC_RESET_TIME_MIN_NS 84
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#define LEDC_RESET_TIME_MAX_NS 327000
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#define LEDC_T1H_MIN_NS 84
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#define LEDC_T1H_MAX_NS 2560
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#define LEDC_T1L_MIN_NS 84
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#define LEDC_T1L_MAX_NS 1280
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#define LEDC_T0H_MIN_NS 84
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#define LEDC_T0H_MAX_NS 1280
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#define LEDC_T0L_MIN_NS 84
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#define LEDC_T0L_MAX_NS 2560
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#define LEDC_WAIT_TIME0_MIN_NS 84
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#define LEDC_WAIT_TIME0_MAX_NS 10000
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#define LEDC_WAIT_TIME1_MIN_NS 84
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#define LEDC_WAIT_TIME1_MAX_NS 85000000000
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#define LEDC_WAIT_DATA_TIME_MIN_NS 84
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#define LEDC_WAIT_DATA_TIME_MAX_NS_IC 655000
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#define LEDC_WAIT_DATA_TIME_MAX_NS_FPGA 20000000
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#define LEDC_LEDC_FIFO_DEPTH 32 /* 32 * 4 bytes */
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#define LEDC_LEDC_FIFO_TRIG_LEVEL 15
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#ifdef __cplusplus
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}
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#endif
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#endif /* __COMMON_LEDC_I_H__ */
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