166 lines
4.3 KiB
C
166 lines
4.3 KiB
C
/**************************************************************************//**
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*
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* @copyright (C) 2019 Nuvoton Technology Corp. All rights reserved.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2020-12-12 Wayne First version
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*
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******************************************************************************/
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#include "board.h"
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static void nu_pin_uart_init(void)
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{
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/* UART0: PE[0, 1] */
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outpw(REG_SYS_GPE_MFPL, (inpw(REG_SYS_GPE_MFPL) & 0xffffff00) | 0x00000099);
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/* UART1: PH[4, 7] */
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outpw(REG_SYS_GPH_MFPL, (inpw(REG_SYS_GPH_MFPL) & 0x0000ffff) | 0x99990000);
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/* UART2: PF[11, 14] */
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outpw(REG_SYS_GPF_MFPH, (inpw(REG_SYS_GPF_MFPH) & 0xf0000fff) | 0x09999000);
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/* UART3: PE[12, 13] */
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outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & 0xff00ffff) | 0x00990000);
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/* UART4: PH[8, 11] */
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outpw(REG_SYS_GPH_MFPH, (inpw(REG_SYS_GPH_MFPH) & 0xffff0000) | 0x00009999);
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/* UART5: PB[0, 1] */
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outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xffffff00) | 0x00000099);
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/* UART7: PI[1, 2] */
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outpw(REG_SYS_GPI_MFPL, (inpw(REG_SYS_GPI_MFPL) & 0xfffff00f) | 0x00000990);
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/* UART8: PH[12, 15] */
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outpw(REG_SYS_GPH_MFPH, (inpw(REG_SYS_GPH_MFPH) & 0x0000ffff) | 0x99990000);
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/* UART10: PB[12, 15] */
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outpw(REG_SYS_GPB_MFPH, (inpw(REG_SYS_GPB_MFPH) & 0x0000ffff) | 0x99990000);
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}
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static void nu_pin_emac_init(void)
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{
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/* EMAC0: PF[0, 9] */
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outpw(REG_SYS_GPF_MFPL, 0x11111111);
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outpw(REG_SYS_GPF_MFPH, (inpw(REG_SYS_GPF_MFPH) & 0xffffff00) | 0x00000011);
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/* EMAC1: PE[2, 11] */
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outpw(REG_SYS_GPE_MFPL, (inpw(REG_SYS_GPE_MFPL) & 0x000000ff) | 0x11111100);
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outpw(REG_SYS_GPE_MFPH, (inpw(REG_SYS_GPE_MFPH) & 0xffff0000) | 0x00001111);
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}
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static void nu_pin_sdh_init(void)
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{
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/* SDH0: PD[0, 6] */
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outpw(REG_SYS_GPD_MFPL, (inpw(REG_SYS_GPD_MFPL) & 0xf0000000) | 0x06666666);
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}
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static void nu_pin_spi_init(void)
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{
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/* QSPI0: PB[6, 11] */
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outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0x00ffffff) | 0xbb000000);
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outpw(REG_SYS_GPB_MFPH, (inpw(REG_SYS_GPB_MFPH) & 0xffff0000) | 0x0000bbbb);
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}
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static void nu_pin_i2c_init(void)
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{
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/* I2C0: PG[0, 1] */
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outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0xffffff00) | 0x00000088);
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/* I2C1: PG[2, 3] */
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outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0xffff00ff) | 0x00008800);
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}
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static void nu_pin_pwm_init(void)
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{
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/* PWM0: PB2, LCD_PWM */
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outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xfffff0ff) | 0x00000d00);
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/* PWM1: PB3, Buzzer */
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outpw(REG_SYS_GPB_MFPL, (inpw(REG_SYS_GPB_MFPL) & 0xffff0fff) | 0x0000d000);
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}
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static void nu_pin_i2s_init(void)
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{
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/* I2S: PG[10, 14] */
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outpw(REG_SYS_GPG_MFPH, (inpw(REG_SYS_GPG_MFPH) & 0xf00000ff) | 0x08888800);
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}
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static void nu_pin_can_init(void)
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{
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/* CAN0: PI[3, 4] */
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outpw(REG_SYS_GPI_MFPL, (inpw(REG_SYS_GPI_MFPL) & 0xfff00fff) | 0x000cc000);
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}
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static void nu_pin_usbd_init(void)
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{
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/* USB0_VBUSVLD, PH0 */
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outpw(REG_SYS_GPH_MFPL, (inpw(REG_SYS_GPH_MFPL) & 0xfffffff0) | 0x00000007);
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}
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static void nu_pin_vpost_init(void)
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{
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/* CLK: PG6, HSYNC: PG7 */
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outpw(REG_SYS_GPG_MFPL, (inpw(REG_SYS_GPG_MFPL) & 0x00ffffff) | 0x22000000);
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/* VSYNC: PG8, DEN: PG9 */
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outpw(REG_SYS_GPG_MFPH, (inpw(REG_SYS_GPG_MFPH) & 0xffffff00) | 0x00000022);
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/* DATA pin: 24bit RGB */
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/* PA[0, 7] */
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outpw(REG_SYS_GPA_MFPL, 0x22222222);
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/* PA[8, 15] */
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outpw(REG_SYS_GPA_MFPH, 0x22222222);
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#if (BSP_LCD_BPP==32)
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/* PD[8, 15 ] */
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outpw(REG_SYS_GPD_MFPH, 0x22222222);
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#endif
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}
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static void nu_pin_fmi_init(void)
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{
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/* select NAND function pins */
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if (inpw(REG_SYS_PWRON) & 0x08000000)
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{
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/* NAND: PI[0, 14] */
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outpw(REG_SYS_GPI_MFPL, 0x55555550);
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outpw(REG_SYS_GPI_MFPH, 0x55555555);
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}
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else
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{
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/* NAND: PC[0, 14] */
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outpw(REG_SYS_GPC_MFPL, 0x55555555);
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outpw(REG_SYS_GPC_MFPH, 0x05555555);
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}
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}
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static void nu_pin_usbh_init(void)
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{
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}
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void nu_pin_init(void)
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{
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nu_pin_uart_init();
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nu_pin_emac_init();
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nu_pin_sdh_init();
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nu_pin_spi_init();
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nu_pin_i2c_init();
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nu_pin_pwm_init();
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nu_pin_i2s_init();
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nu_pin_can_init();
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nu_pin_vpost_init();
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nu_pin_fmi_init();
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nu_pin_usbd_init();
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nu_pin_usbh_init();
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}
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void nu_pin_deinit(void)
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{
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}
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