410 lines
14 KiB
C
410 lines
14 KiB
C
/*!
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\file gd32f4xx_ipa.c
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\brief IPA driver
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*/
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/*
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Copyright (C) 2016 GigaDevice
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2016-08-15, V1.0.0, firmware for GD32F4xx
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*/
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#include "gd32f4xx_ipa.h"
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/*!
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\brief deinitialize IPA registers
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ipa_deinit(void)
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{
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rcu_periph_reset_enable(RCU_IPAENRST);
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rcu_periph_reset_disable(RCU_IPAENRST);
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}
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/*!
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\brief IPA transfer enable
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\param[in] none
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\param[out] none
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\retval none
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*/
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void ipa_transfer_enable(void)
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{
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IPA_CTL |= IPA_CTL_TEN;
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}
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/*!
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\brief IPA transfer hang up enable
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\param[in] none.
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\param[out] none
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\retval none
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*/
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void ipa_transfer_hangup_enable(void)
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{
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IPA_CTL |= IPA_CTL_THU;
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}
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/*!
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\brief IPA transfer hang up disable
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\param[in] none.
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\param[out] none
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\retval none
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*/
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void ipa_transfer_hangup_disable(void)
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{
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IPA_CTL &= ~(IPA_CTL_THU);
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}
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/*!
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\brief IPA transfer stop enable
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\param[in] none.
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\param[out] none
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\retval none
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*/
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void ipa_transfer_stop_enable(void)
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{
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IPA_CTL |= IPA_CTL_TST;
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}
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/*!
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\brief IPA transfer stop disable
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\param[in] none.
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\param[out] none
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\retval none
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*/
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void ipa_transfer_stop_disable(void)
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{
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IPA_CTL &= ~(IPA_CTL_TST);
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}
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/*!
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\brief IPA foreground LUT loading enable
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\param[in] none.
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\param[out] none
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\retval none
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*/
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void ipa_foreground_lut_loading_enable(void)
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{
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IPA_FPCTL |= IPA_FPCTL_FLLEN;
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}
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/*!
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\brief IPA background LUT loading enable
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\param[in] none.
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\param[out] none
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\retval none
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*/
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void ipa_background_lut_loading_enable(void)
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{
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IPA_BPCTL |= IPA_BPCTL_BLLEN;
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}
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/*!
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\brief Pixel format convert mode
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\param[in] pfcm:
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\arg IPA_FGTODE: foreground memory to destination memory without pixel format convert
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\arg IPA_FGTODE_PF_CONVERT: foreground memory to destination memory with pixel format convert
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\arg IPA_FGBGTODE: blending foreground and background memory to destination memory
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\arg IPA_FILL_UP_DE: fill up destination memory with specific color
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\param[out] none
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\retval none
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*/
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void ipa_pixel_format_convert_mod(uint32_t pfcm)
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{
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IPA_CTL |= pfcm;
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}
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/*!
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\brief initialize foreground parameters
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\param[in] foreground_struct: the data needed to initialize fore.
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foreground_memaddr: foreground memory base address
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foreground_lineoff: foreground line offset
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foreground_prealpha: foreground pre-defined alpha value
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foreground_alpha_algorithm: IPA_FG_ALPHA_MODE_0,IPA_FG_ALPHA_MODE_1,IPA_FG_ALPHA_MODE_2
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foreground_pf: foreground pixel format
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foreground_prered: foreground pre-defined red value
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foreground_pregreen: foreground pre-defined green value
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foreground_preblue: foreground pre-defined blue value
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\param[out] none
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\retval none
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*/
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void ipa_foreground_init(ipa_foreground_parameter_struct* foreground_struct)
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{
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/* foreground memory base address configuration */
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IPA_FMADDR &= ~(IPA_FMADDR_FMADDR);
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IPA_FMADDR = foreground_struct->foreground_memaddr;
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/* foreground line offset configuration */
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IPA_FLOFF &= ~(IPA_FLOFF_FLOFF);
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IPA_FLOFF = foreground_struct->foreground_lineoff;
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/* foreground pixel format pre-defined alpha, alpha calculation algorithm configuration */
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IPA_FPCTL &= ~(IPA_FPCTL_FAVCA|IPA_FPCTL_FAVCA|IPA_FPCTL_FPF);
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IPA_FPCTL |= (foreground_struct->foreground_prealpha<<24U);
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IPA_FPCTL |= foreground_struct->foreground_alpha_algorithm;
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IPA_FPCTL |= foreground_struct->foreground_pf;
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/* foreground pre-defined red green blue configuration */
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IPA_FPV &= ~(IPA_FPV_FPDRV|IPA_FPV_FPDGV|IPA_FPV_FPDBV);
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IPA_FPV |= ((foreground_struct->foreground_prered<<16U)|(foreground_struct->foreground_pregreen<<8U)|(foreground_struct->foreground_preblue));
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}
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/*!
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\brief initialize background parameters
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\param[in] background_struct: the data needed to initialize fore.
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background_memaddr: background memory base address
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background_lineoff: background line offset
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background_prealpha: background pre-defined alpha value
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background_alpha_algorithm: IPA_BG_ALPHA_MODE_0,IPA_FG_ALPHA_MODE_1,IPA_FG_ALPHA_MODE_2
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background_pf: background pixel format
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background_prered: background pre-defined red value
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background_pregreen: background pre-defined green value
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background_preblue: background pre-defined blue value
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\param[out] none
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\retval none
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*/
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void ipa_background_init(ipa_background_parameter_struct* background_struct)
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{
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/* background memory base address configuration */
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IPA_BMADDR &= ~(IPA_BMADDR_BMADDR);
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IPA_BMADDR = background_struct->background_memaddr;
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/* background line offset configuration */
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IPA_BLOFF &= ~(IPA_BLOFF_BLOFF);
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IPA_BLOFF =background_struct->background_lineoff;
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/* background pixel format pre-defined alpha, alpha calculation algorithm configuration */
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IPA_BPCTL &= ~(IPA_BPCTL_BAVCA|IPA_BPCTL_BAVCA|IPA_BPCTL_BPF);
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IPA_BPCTL |= (background_struct->background_prealpha<<24U);
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IPA_BPCTL |= background_struct->background_alpha_algorithm;
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IPA_BPCTL |= background_struct->background_pf;
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/* background pre-defined red green blue configuration */
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IPA_BPV &= ~(IPA_BPV_BPDRV|IPA_BPV_BPDGV|IPA_BPV_BPDBV);
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IPA_BPV |= ((background_struct->background_prered<<16U)|(background_struct->background_pregreen<<8U)|(background_struct->background_preblue));
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}
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/*!
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\brief initialize destination parameters
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\param[in] destination_struct: the data needed to initialize tli.
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destination_pf: refer to ipa_dpf_enum
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destination_lineoff: destination line offset
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destination_prealpha: destination pre-defined alpha value
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destination_prered: destination pre-defined red value
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destination_pregreen: destination pre-defined green value
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destination_preblue: destination pre-defined blue value
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destination_memaddr: destination memory base address
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image_width: width of the image to be processed
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image_height: height of the image to be processed
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\param[out] none
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\retval none
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*/
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void ipa_destination_init(ipa_destination_parameter_struct* destination_struct)
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{
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uint32_t destination_pixelformat;
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/* destination pixel format configuration */
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IPA_DPCTL &= ~(IPA_DPCTL_DPF);
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IPA_DPCTL = destination_struct->destination_pf;
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destination_pixelformat = destination_struct->destination_pf;
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/* destination pixel format ARGB8888 */
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switch(destination_pixelformat){
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case IPA_DPF_ARGB8888:
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IPA_DPV &= ~(IPA_DPV_DPDBV_0|(IPA_DPV_DPDGV_0)|(IPA_DPV_DPDRV_0)|(IPA_DPV_DPDAV_0));
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IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<8U)
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|(destination_struct->destination_prered<<16U)
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|(destination_struct->destination_prealpha<<24U));
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break;
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/* destination pixel format RGB888 */
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case IPA_DPF_RGB888:
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IPA_DPV &= ~(IPA_DPV_DPDBV_1|(IPA_DPV_DPDGV_1)|(IPA_DPV_DPDRV_1));
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IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<8U)
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|(destination_struct->destination_prered<<16U));
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break;
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/* destination pixel format RGB565 */
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case IPA_DPF_RGB565:
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IPA_DPV &= ~(IPA_DPV_DPDBV_2|(IPA_DPV_DPDGV_2)|(IPA_DPV_DPDRV_2));
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IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<5U)
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|(destination_struct->destination_prered<<11U));
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break;
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/* destination pixel format ARGB1555 */
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case IPA_DPF_ARGB1555:
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IPA_DPV &= ~(IPA_DPV_DPDBV_3|(IPA_DPV_DPDGV_3)|(IPA_DPV_DPDRV_3)|(IPA_DPV_DPDAV_3));
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IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<5U)
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|(destination_struct->destination_prered<<10U)
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|(destination_struct->destination_prealpha<<15U));
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break;
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/* destination pixel format ARGB4444 */
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case IPA_DPF_ARGB4444:
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IPA_DPV &= ~(IPA_DPV_DPDBV_4|(IPA_DPV_DPDGV_4)|(IPA_DPV_DPDRV_4)|(IPA_DPV_DPDAV_4));
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IPA_DPV = (destination_struct->destination_preblue|(destination_struct->destination_pregreen<<5U)
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|(destination_struct->destination_prered<<10U)
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|(destination_struct->destination_prealpha<<15U));
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break;
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default:
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break;
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}
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/* destination memory base address configuration */
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IPA_DMADDR &= ~(IPA_DMADDR_DMADDR);
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IPA_DMADDR =destination_struct->destination_memaddr;
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/* destination line offset configuration */
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IPA_DLOFF &= ~(IPA_DLOFF_DLOFF);
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IPA_DLOFF =destination_struct->destination_lineoff;
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/* image size configuration */
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IPA_IMS &= ~(IPA_IMS_HEIGHT|IPA_IMS_WIDTH);
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IPA_IMS |= ((destination_struct->image_width<<16)|(destination_struct->image_height));
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}
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/*!
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\brief initialize IPA foreground LUT parameters
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\param[in] fg_lut_num: foreground LUT number of pixel.
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\param[in] fg_lut_pf: foreground LUT pixel format,IPA_LUT_PF_ARGB8888,IPA_LUT_PF_RGB888.
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\param[in] fg_lut_addr: foreground LUT memory base address.
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\param[out] none
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\retval none
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*/
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void ipa_foreground_lut_init(uint32_t fg_lut_num,uint8_t fg_lut_pf, uint32_t fg_lut_addr)
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{
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/* foreground LUT number of pixel configuration */
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IPA_FPCTL |= (fg_lut_num<<8U);
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/* foreground LUT pixel format configuration */
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if(IPA_LUT_PF_RGB888 == fg_lut_pf){
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IPA_FPCTL |= IPA_FPCTL_FLPF;
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}else{
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IPA_FPCTL &= ~(IPA_FPCTL_FLPF);
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}
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/* foreground LUT memory base address configuration */
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IPA_FLMADDR &= ~(IPA_FLMADDR_FLMADDR);
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IPA_FLMADDR = fg_lut_addr;
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}
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/*!
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\brief initialize IPA background LUT parameters
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\param[in] bg_lut_num: background LUT number of pixel.
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\param[in] bg_lut_pf: background LUT pixel format, IPA_LUT_PF_ARGB8888,IPA_LUT_PF_RGB888.
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\param[in] bg_lut_addr: background LUT memory base address.
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\param[out] none
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\retval none
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*/
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void ipa_background_lut_init(uint32_t bg_lut_num,uint8_t bg_lut_pf, uint32_t bg_lut_addr)
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{
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/* background LUT number of pixel configuration */
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IPA_BPCTL|=(bg_lut_num<<8U);
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/* background LUT pixel format configuration */
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if(IPA_LUT_PF_RGB888 == bg_lut_pf){
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IPA_BPCTL |= IPA_BPCTL_BLPF;
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}else{
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IPA_BPCTL &= ~(IPA_BPCTL_BLPF);
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}
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/* background LUT memory base address configuration */
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IPA_BLMADDR &= ~(IPA_BLMADDR_BLMADDR);
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IPA_BLMADDR = bg_lut_addr;
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}
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/*!
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\brief configure line mark
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\param[in] linenum: line number.
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\param[out] none
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\retval none
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*/
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void ipa_line_mark_config(uint32_t linenum)
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{
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IPA_LM &= ~(IPA_LM_LM);
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IPA_LM = linenum;
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}
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/*!
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\brief Inter-timer enable or disable
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\param[in] timercfg: IPA_INTER_TIMER_ENABLE,IPA_INTER_TIMER_DISABLE
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\param[out] none
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\retval none
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*/
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void ipa_inter_timer_config(uint8_t timercfg)
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{
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if(IPA_INTER_TIMER_ENABLE == timercfg){
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IPA_ITCTL |= IPA_ITCTL_ITEN;
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}else{
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IPA_ITCTL &= ~(IPA_ITCTL_ITEN);
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}
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}
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/*!
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\brief number of clock cycles interval set
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\param[in] clk_num: the number of clock cycles.
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\param[out] none
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\retval none
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*/
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void ipa_interval_clock_num_config(uint32_t clk_num )
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{
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IPA_ITCTL &= ~(IPA_ITCTL_NCCI);
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IPA_ITCTL |= (clk_num<<8U);
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}
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/*!
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\brief IPA interrupt enable
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\param[in] inttype: IPA interrupt bits.
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\arg IPA_CTL_TAEIE: transfer access error interrupt
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\arg IPA_CTL_FTFIE: full transfer finish interrupt
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\arg IPA_CTL_TLMIE: transfer line mark interrupt
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\arg IPA_CTL_LACIE: LUT access conflict interrupt
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\arg IPA_CTL_LLFIE: LUT loading finish interrupt
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\arg IPA_CTL_WCFIE: wrong configuration interrupt
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\param[out] none
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\retval none
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*/
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void ipa_interrupt_enable(uint32_t inttype)
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{
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IPA_CTL |= (inttype);
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}
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/*!
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\brief IPA interrupt disable
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\param[in] inttype: IPA interrupt bits.
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\arg IPA_CTL_TAEIE: transfer access error interrupt
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\arg IPA_CTL_FTFIE: full transfer finish interrupt
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\arg IPA_CTL_TLMIE: transfer line mark interrupt
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\arg IPA_CTL_LACIE: LUT access conflict interrupt
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\arg IPA_CTL_LLFIE: LUT loading finish interrupt
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\arg IPA_CTL_WCFIE: wrong configuration interrupt
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\param[out] none
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\retval none
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*/
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void ipa_interrupt_disable(uint32_t inttype)
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{
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IPA_CTL &= ~(inttype);
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}
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/*!
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\brief get IPA interrupt flag
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\param[in] intflag: tli interrupt flag bits.
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\arg IPA_INTF_TAEIF: transfer access error interrupt flag
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\arg IPA_INTF_FTFIF: full transfer finish interrupt flag
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\arg IPA_INTF_TLMIF: transfer line mark interrupt flag
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\arg IPA_INTF_LACIF: LUT access conflict interrupt flag
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\arg IPA_INTF_LLFIF: LUT loading finish interrupt flag
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\arg IPA_INTF_WCFIF: wrong configuration interrupt flag
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\param[out] none
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\retval none
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*/
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FlagStatus ipa_interrupt_flag_get(uint32_t intflag)
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{
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uint32_t state;
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state = IPA_INTF;
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if(state & intflag){
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return SET;
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}else{
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return RESET;
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}
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}
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/*!
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\brief clear IPA interrupt flag
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\param[in] intflag: tli interrupt flag bits.
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\arg IPA_INTC_TAEIFC: transfer access error interrupt flag
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\arg IPA_INTC_FTFIFC: full transfer finish interrupt flag
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\arg IPA_INTC_TLMIFC: transfer line mark interrupt flag
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\arg IPA_INTC_LACIFC: LUT access conflict interrupt flag
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\arg IPA_INTC_LLFIFC: LUT loading finish interrupt flag
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\arg IPA_INTC_WCFIFC: wrong configuration interrupt flag
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\param[out] none
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\retval none
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*/
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void ipa_interrupt_flag_clear(uint32_t intflag)
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{
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IPA_INTC |= (intflag);
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}
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