270 lines
6.5 KiB
NASM
270 lines
6.5 KiB
NASM
;
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; Copyright (c) 2021, Shenzhen Academy of Aerospace Technology
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;
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; SPDX-License-Identifier: Apache-2.0
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;
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; Change Logs:
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; Date Author Notes
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; 2021-11-16 Dystopia the first version
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;
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;-----------------------------------------------------------
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; interrupt and execption handler for C6678 DSP
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;-----------------------------------------------------------
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;-----------------------------------------------------------
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; macro definition
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;-----------------------------------------------------------
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DP .set B14
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SP .set B15
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;
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;-----------------------------------------------------------
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;
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.include "contextinc.asm"
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;-----------------------------------------------------------
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; global function
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;-----------------------------------------------------------
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.global _nmi_handler
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.global _bad_handler
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.global _int4_handler
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.global _int5_handler
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.global _int6_handler
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.global _int7_handler
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.global _int8_handler
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.global _int9_handler
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.global _int10_handler
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.global _int11_handler
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.global _int12_handler
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.global _int13_handler
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.global _int14_handler
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.global _int15_handler
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;
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;-----------------------------------------------------------
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;
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;-----------------------------------------------------------
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; extern function
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;-----------------------------------------------------------
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.ref hw_nmi_handler
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.ref hw_bad_handler
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.ref hw_int4_handler
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.ref hw_int5_handler
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.ref hw_int6_handler
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.ref hw_int7_handler
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.ref hw_int8_handler
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.ref hw_int9_handler
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.ref hw_int10_handler
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.ref hw_int11_handler
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.ref hw_int12_handler
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.ref hw_int13_handler
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.ref hw_int14_handler
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.ref hw_int15_handler
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.ref rt_hw_process_exception
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.ref rt_interrupt_context_restore
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;
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;-----------------------------------------------------------
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;
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;-----------------------------------------------------------
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; extern variable
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;-----------------------------------------------------------
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.ref rt_system_stack_top
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;
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;-----------------------------------------------------------
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;
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;-----------------------------------------------------------
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; interrupt macro definition
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;-----------------------------------------------------------
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RT_INTERRUPT_ENTRY .macro
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SAVE_ALL IRP,ITSR
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.endm
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RT_CALL_INT .macro __isr
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CALLP __isr,B3
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B .S1 rt_interrupt_context_restore
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NOP 5
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.endm
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;-----------------------------------------------------------
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; execption macro definition
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;-----------------------------------------------------------
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RT_EXECPTION_ENTRY .macro
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SAVE_ALL NRP,NTSR
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.endm
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RT_EXECPTION_EXIT .macro
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RESTORE_ALL NRP,NTSR
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B .S2 NRP ; return from interruption
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NOP 5
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.endm
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;
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;-----------------------------------------------------------
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;
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.sect ".text"
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;
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;-----------------------------------------------------------
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;
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;-----------------------------------------------------------
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; handler NMI interrupt
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;-----------------------------------------------------------
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_nmi_handler:
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;{
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RT_EXECPTION_ENTRY
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MVC .S2 EFR,B2
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CMPEQ .L2 1,B2,B2
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|| MVC .S2 TSR,B1
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MV .D1X B2,A2
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|| CLR .S2 B1,10,10,B1
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MVC .S2 B1,TSR
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[!A2] MVKL .S1 rt_hw_process_exception,A0
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||[B2] MVKL .S2 rt_hw_software_exception,B1
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[!A2] MVKH .S1 rt_hw_process_exception,A0
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||[B2] MVKH .S2 rt_hw_software_exception,B1
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[!B2] B .S2X A0
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[B2] B .S2 B1
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[!B2] ADDAW .D2 SP,2,B1
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[!B2] MV .D1X B1,A4
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ADDKPC .S2 ret_from_trap,B3,2
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;
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; return from trap
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;
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ret_from_trap:
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MV .D2X A4,B0
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[!B0] MVKL .S2 ret_from_exception,B3
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[!B0] MVKH .S2 ret_from_exception,B3
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[!B0] BNOP .S2 B3,5
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;
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; return from trap<61><70>restore exception context
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;
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ret_from_exception:
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RT_EXECPTION_EXIT
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;
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rt_hw_software_exception:
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MVKL .S1 rt_hw_process_exception,A0
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MVKH .S1 rt_hw_process_exception,A0
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B .S2X A0
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ADDAW .D2 SP,2,B1
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MV .D1X B1,A4
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ADDKPC .S2 ret_from_trap,B3,2
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NOP 2
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;}
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;-----------------------------------------------------------
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; handler bad interrupt
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;-----------------------------------------------------------
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_bad_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_bad_handler
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;}
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;-----------------------------------------------------------
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; handler INT4 interrupt
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;-----------------------------------------------------------
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_int4_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int4_handler
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;}
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;-----------------------------------------------------------
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; handler INT5 interrupt
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;-----------------------------------------------------------
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_int5_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int5_handler
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;}
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;-----------------------------------------------------------
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; handler INT6 interrupt
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;-----------------------------------------------------------
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_int6_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int6_handler
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;}
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;-----------------------------------------------------------
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; handler INT7 interrupt
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;-----------------------------------------------------------
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_int7_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int7_handler
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;}
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;-----------------------------------------------------------
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; handler INT8 interrupt
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;-----------------------------------------------------------
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_int8_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int8_handler
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;}
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;-----------------------------------------------------------
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; handler INT9 interrupt
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;-----------------------------------------------------------
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_int9_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int9_handler
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;}
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;-----------------------------------------------------------
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; handler INT10 interrupt
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;-----------------------------------------------------------
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_int10_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int10_handler
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;}
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;-----------------------------------------------------------
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; handler INT11 interrupt
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;-----------------------------------------------------------
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_int11_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int11_handler
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;}
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;-----------------------------------------------------------
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; handler INT12 interrupt
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;-----------------------------------------------------------
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_int12_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int12_handler
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;}
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;-----------------------------------------------------------
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; handler INT13 interrupt
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;-----------------------------------------------------------
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_int13_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int13_handler
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;}
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;-----------------------------------------------------------
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; handler INT14 interrupt
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;-----------------------------------------------------------
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_int14_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int14_handler
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;}
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;-----------------------------------------------------------
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; handler INT15 interrupt
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;-----------------------------------------------------------
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_int15_handler:
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;{
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RT_INTERRUPT_ENTRY
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RT_CALL_INT hw_int15_handler
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;}
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.end
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