367 lines
12 KiB
C
367 lines
12 KiB
C
/*
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* Copyright 2020-2021 NXP
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* All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef _FSL_DCIC_H_
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#define _FSL_DCIC_H_
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#include "fsl_common.h"
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/*!
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* @addtogroup DCIC
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* @{
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*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#ifndef DCIC_REGION_COUNT
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#define DCIC_REGION_COUNT DCIC_DCICRCS_COUNT
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#endif
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/*! @brief DCIC driver version. */
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#define FSL_DCIC_DRIVER_VERSION (MAKE_VERSION(2, 0, 1))
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/*! @brief CRC32 calculation polynomial. */
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#define DCIC_CRC32_POLYNOMIAL 0x04C11DB7UL
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/*! @brief CRC32 calculation initialize value. */
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#define DCIC_CRC32_INIT_VALUE 0UL
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/*! @brief ROI CRC32 value mismatch status. */
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#define DCIC_REGION_MISMATCH_STATUS(region) (1UL << (DCIC_DCICS_ROI_MATCH_STAT_SHIFT + (region)))
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/*!
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* @brief DCIC display signal polarity flags
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* @anchor _DCIC_polarity_flags
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*/
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enum _DCIC_polarity_flags
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{
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kDCIC_VsyncActiveLow = DCIC_DCICC_VSYNC_POL_MASK, /*!< VSYNC active low. */
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kDCIC_VsyncActiveHigh = 0U, /*!< VSYNC active high. */
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kDCIC_HsyncActiveLow = DCIC_DCICC_HSYNC_POL_MASK, /*!< HSYNC active low. */
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kDCIC_HsyncActiveHigh = 0U, /*!< HSYNC active high. */
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kDCIC_DataEnableActiveLow = DCIC_DCICC_DE_POL_MASK, /*!< Data enable line active low. */
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kDCIC_DataEnableActiveHigh = 0U, /*!< Data enable line active high. */
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kDCIC_DriveDataOnRisingClkEdge = DCIC_DCICC_CLK_POL_MASK, /*!< Output data on falling clock edge, capture data
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on rising clock edge. */
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kDCIC_DriveDataOnFallingClkEdge = 0U, /*!< Output data on rising clock edge, capture data
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on falling clock edge. */
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};
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/*!
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* @brief Status flags.
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* @anchor _DCIC_status_flags
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*/
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enum _DCIC_status_flags
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{
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kDCIC_FunctionalInterruptStatus = DCIC_DCICS_FI_STAT_MASK, /*!< Asserted when match results ready. */
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kDCIC_ErrorInterruptStatus = DCIC_DCICS_EI_STAT_MASK, /*!< Asserted when there is a signature mismatch. */
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kDCIC_Region0MismatchStatus = DCIC_REGION_MISMATCH_STATUS(0U), /*!< Region 0 CRC32 value mismatch. */
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kDCIC_Region1MismatchStatus = DCIC_REGION_MISMATCH_STATUS(1U), /*!< Region 1 CRC32 value mismatch. */
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kDCIC_Region2MismatchStatus = DCIC_REGION_MISMATCH_STATUS(2U), /*!< Region 2 CRC32 value mismatch. */
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kDCIC_Region3MismatchStatus = DCIC_REGION_MISMATCH_STATUS(3U), /*!< Region 3 CRC32 value mismatch. */
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kDCIC_Region4MismatchStatus = DCIC_REGION_MISMATCH_STATUS(4U), /*!< Region 4 CRC32 value mismatch. */
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kDCIC_Region5MismatchStatus = DCIC_REGION_MISMATCH_STATUS(5U), /*!< Region 5 CRC32 value mismatch. */
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kDCIC_Region6MismatchStatus = DCIC_REGION_MISMATCH_STATUS(6U), /*!< Region 6 CRC32 value mismatch. */
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kDCIC_Region7MismatchStatus = DCIC_REGION_MISMATCH_STATUS(7U), /*!< Region 7 CRC32 value mismatch. */
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kDCIC_Region8MismatchStatus = DCIC_REGION_MISMATCH_STATUS(8U), /*!< Region 8 CRC32 value mismatch. */
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kDCIC_Region9MismatchStatus = DCIC_REGION_MISMATCH_STATUS(9U), /*!< Region 9 CRC32 value mismatch. */
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kDCIC_Region10MismatchStatus = DCIC_REGION_MISMATCH_STATUS(10U), /*!< Region 10 CRC32 value mismatch. */
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kDCIC_Region11MismatchStatus = DCIC_REGION_MISMATCH_STATUS(11U), /*!< Region 11 CRC32 value mismatch. */
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kDCIC_Region12MismatchStatus = DCIC_REGION_MISMATCH_STATUS(12U), /*!< Region 12 CRC32 value mismatch. */
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kDCIC_Region13MismatchStatus = DCIC_REGION_MISMATCH_STATUS(13U), /*!< Region 13 CRC32 value mismatch. */
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kDCIC_Region14MismatchStatus = DCIC_REGION_MISMATCH_STATUS(14U), /*!< Region 14 CRC32 value mismatch. */
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kDCIC_Region15MismatchStatus = DCIC_REGION_MISMATCH_STATUS(15U), /*!< Region 15 CRC32 value mismatch. */
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};
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/*!
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* @brief Interrupts.
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* @anchor _dcic_interrupt_enable
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*/
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enum _dcic_interrupt_enable
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{
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kDCIC_FunctionalInterruptEnable = DCIC_DCICIC_FI_MASK_MASK, /*!< Interrupt when match results ready. */
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kDCIC_ErrorInterruptEnable = DCIC_DCICIC_EI_MASK_MASK, /*!< Interrupt when there is a signature mismatch. */
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};
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/*!
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* @brief DCIC configuration.
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*/
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typedef struct _dcic_config
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{
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bool enableExternalSignal; /*!< Enable the mismatch external signal. When enabled, the mismatch status could
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be monitored from the extern pin. */
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uint8_t polarityFlags; /*!< Display signal polarity, logical OR'ed of @ref _DCIC_polarity_flags. */
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uint32_t enableInterrupts; /*!< Interrupts to enable, should be OR'ed of @ref _dcic_interrupt_enable. */
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} dcic_config_t;
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/*!
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* @brief Region of interest (ROI) configuration.
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*/
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typedef struct _dcic_region_config
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{
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bool lock; /*!< Lock the region configuration except reference CRC32 value setting. */
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uint16_t upperLeftX; /*!< X of upper left corner. Range: 0 to 2^13-1. */
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uint16_t upperLeftY; /*!< Y of upper left corner. Range: 0 to 2^12-1. */
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uint16_t lowerRightX; /*!< X of lower right corner. Range: 0 to 2^13-1. */
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uint16_t lowerRightY; /*!< Y of lower right corner. Range: 0 to 2^12-1. */
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uint32_t refCrc; /*!< Reference CRC32 value. */
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} dcic_region_config_t;
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#if defined(__cplusplus)
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extern "C" {
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#endif
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/*******************************************************************************
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* API
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******************************************************************************/
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/*!
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* @name Initialization and deinitialization
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* @{
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*/
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/*!
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* @brief Initializes the DCIC.
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*
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* This function resets DCIC registers to default value, then
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* set the configurations. This function does not start the
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* DCIC to work, application should call @ref DCIC_DisableRegion
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* to configure regions, then call @ref DCIC_Enable to start the
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* DCIC to work.
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*
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* @param base DCIC peripheral base address.
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* @param config Pointer to the configuration.
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*/
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void DCIC_Init(DCIC_Type *base, const dcic_config_t *config);
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/*!
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* @brief Deinitialize the DCIC.
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*
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* Disable the DCIC functions.
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*
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* @param base DCIC peripheral base address.
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*/
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void DCIC_Deinit(DCIC_Type *base);
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/*!
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* @brief Get the default configuration to initialize DCIC.
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*
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* The default configuration is:
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*
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* @code
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config->polarityFlags = kDCIC_VsyncActiveLow | kDCIC_HsyncActiveLow |
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kDCIC_DataEnableActiveLow | kDCIC_DriveDataOnFallingClkEdge;
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config->enableExternalSignal = false;
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config->enableInterrupts = 0;
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@endcode
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*
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* @param config Pointer to the configuration.
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*/
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void DCIC_GetDefaultConfig(dcic_config_t *config);
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/*!
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* @brief Enable or disable the DCIC module.
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*
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* @param base DCIC peripheral base address.
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* @param enable Use true to enable, false to disable.
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*/
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static inline void DCIC_Enable(DCIC_Type *base, bool enable)
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{
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if (enable)
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{
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base->DCICC |= DCIC_DCICC_IC_EN_MASK;
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}
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else
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{
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base->DCICC &= ~DCIC_DCICC_IC_EN_MASK;
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}
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}
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/* @} */
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/*!
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* @name Status
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* @{
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*/
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/*!
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* @brief Get status flags.
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*
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* The flag @ref kDCIC_ErrorInterruptStatus is asserted if any region mismatch
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* flag asserted.
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*
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* @brief base DCIC peripheral base address.
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* @return Masks of asserted status flags, @ref _DCIC_status_flags.
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*/
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static inline uint32_t DCIC_GetStatusFlags(DCIC_Type *base)
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{
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return base->DCICS;
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}
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/*!
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* @brief Clear status flags.
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*
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* The flag @ref kDCIC_ErrorInterruptStatus should be cleared by clearing all
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* asserted region mismatch flags.
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*
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* @brief base DCIC peripheral base address.
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* @brief mask Mask of status values that would be cleared, @ref _DCIC_status_flags.
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*/
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static inline void DCIC_ClearStatusFlags(DCIC_Type *base, uint32_t mask)
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{
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base->DCICS = (mask & (DCIC_DCICS_FI_STAT_MASK | DCIC_DCICS_ROI_MATCH_STAT_MASK));
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}
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/* @} */
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/*!
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* @name Interrupts
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* @{
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*/
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/*!
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* @brief Lock the interrupt enabled status.
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*
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* Once this function is called, the interrupt enabled status could not be changed
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* until reset.
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*
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* @param base DCIC peripheral base address.
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*/
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static inline void DCIC_LockInterruptEnabledStatus(DCIC_Type *base)
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{
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base->DCICIC |= DCIC_DCICIC_FREEZE_MASK_MASK;
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}
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/*!
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* @brief Enable interrupts.
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*
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* @param base DCIC peripheral base address.
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* @param mask Mask of interrupt events that would be enabled. See to "_dcic_interrupt_enable_t".
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*/
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static inline void DCIC_EnableInterrupts(DCIC_Type *base, uint32_t mask)
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{
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base->DCICIC &= ~mask;
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}
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/*!
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* @brief Disable interrupts.
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*
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* @param base DCIC peripheral base address.
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* @param mask Mask of interrupt events that would be disabled. See to "_dcic_interrupt_enable_t".
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*/
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static inline void DCIC_DisableInterrupts(DCIC_Type *base, uint32_t mask)
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{
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base->DCICIC |= mask;
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}
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/* @} */
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/*!
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* @name Region
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* @{
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*/
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/*!
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* @brief Enable the region of interest (ROI) with configuration.
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*
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* Enable the ROI with configuration. To change the configuration except reference
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* CRC value, the region should be disabled first by @ref DCIC_DisableRegion,
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* then call this function again. The reference CRC value could be changed by
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* @ref DCIC_SetRegionRefCrc without disabling the region.
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* If the configuration is locked, only the reference CRC value could be changed,
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* the region size and position, enable status could not be changed until reset.
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*
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* @param base DCIC peripheral base address.
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* @param regionIdx Region index, from 0 to (DCIC_REGION_COUNT - 1).
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* @param config Pointer to the configuration.
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*/
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void DCIC_EnableRegion(DCIC_Type *base, uint8_t regionIdx, const dcic_region_config_t *config);
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/*!
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* @brief Disable the region of interest (ROI).
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*
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* @param base DCIC peripheral base address.
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* @param regionIdx Region index, from 0 to (DCIC_REGION_COUNT - 1).
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*/
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static inline void DCIC_DisableRegion(DCIC_Type *base, uint8_t regionIdx)
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{
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assert(regionIdx < DCIC_REGION_COUNT);
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base->REGION[regionIdx].DCICRC &= ~DCIC_DCICRC_ROI_EN_MASK;
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}
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/*!
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* @brief Set the reference CRC of interest (ROI).
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*
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* @param base DCIC peripheral base address.
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* @param regionIdx Region index, from 0 to (DCIC_REGION_COUNT - 1).
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* @param crc The reference CRC value.
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*/
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static inline void DCIC_SetRegionRefCrc(DCIC_Type *base, uint8_t regionIdx, uint32_t crc)
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{
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assert(regionIdx < DCIC_REGION_COUNT);
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base->REGION[regionIdx].DCICRRS = crc;
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}
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/*!
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* @brief Get the DCIC calculated CRC.
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*
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* @param base DCIC peripheral base address.
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* @param regionIdx Region index, from 0 to (DCIC_REGION_COUNT - 1).
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* @return The calculated CRC value.
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*/
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static inline uint32_t DCIC_GetRegionCalculatedCrc(DCIC_Type *base, uint8_t regionIdx)
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{
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assert(regionIdx < DCIC_REGION_COUNT);
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return base->REGION[regionIdx].DCICRCS;
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}
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/* @} */
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/*!
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* @name Misc control.
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* @{
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*/
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/*!
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* @brief Enable or disable output the mismatch external signal.
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*
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* The mismatch status can be output to external pins. If enabled:
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* - If @ref kDCIC_ErrorInterruptStatus asserted, the output signal
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* frequency is DCIC clock / 16.
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* - If @ref kDCIC_ErrorInterruptStatus not asserted, the output signal
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* frequency is DCIC clock / 4.
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* - If integrity check is disabled, the signal is idle.
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*
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* @param base DCIC peripheral base address.
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* @param enable. Use true to enable, false to disable.
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*/
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static inline void DCIC_EnableMismatchExternalSignal(DCIC_Type *base, bool enable)
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{
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if (enable)
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{
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base->DCICIC |= DCIC_DCICIC_EXT_SIG_EN_MASK;
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}
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else
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{
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base->DCICIC &= ~DCIC_DCICIC_EXT_SIG_EN_MASK;
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}
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}
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/* @} */
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#if defined(__cplusplus)
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}
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#endif
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/*!
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* @}
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*/
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#endif /* _FSL_DCIC_H_ */
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