386 lines
12 KiB
C
386 lines
12 KiB
C
#include <stm32f10x.h>
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#include "board.h"
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#include "spi_flash.h"
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#include "rtthread.h"
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/*
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* WARNING: !!! ENABLING DMA MODE MAY DESTROY YOUR DATA IN THE SPI FLASH !!!
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* Don't set SPI_FLASH_USE_DMA to 1 unless you know what you're doing!
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* However, readonly access is just fine. :)
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*/
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#define SPI_FLASH_USE_DMA 0
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#define SECTOR_SIZE 512
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extern uint8_t SPI_WriteByte(unsigned char data);
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#if SPI_FLASH_USE_DMA
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static uint8_t dummy = 0;
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static uint8_t _spi_flash_buffer[SECTOR_SIZE];
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#endif
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/********************** hardware *************************************/
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/* SPI_FLASH_CS PA4 */
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/* SPI_FLASH_RST PA3 */
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#define FLASH_RST_0() GPIO_ResetBits(GPIOA,GPIO_Pin_3)
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#define FLASH_RST_1() GPIO_SetBits(GPIOA,GPIO_Pin_3)
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#define FLASH_CS_0() GPIO_ResetBits(GPIOA,GPIO_Pin_4)
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#define FLASH_CS_1() GPIO_SetBits(GPIOA,GPIO_Pin_4)
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/********************** hardware *************************************/
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static void GPIO_Configuration(void)
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
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GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_3;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_Init(GPIOA, &GPIO_InitStructure);
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FLASH_RST_0(); // RESET
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FLASH_CS_1();
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FLASH_RST_1();
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}
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#if SPI_FLASH_USE_DMA
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static void DMA_RxConfiguration(rt_uint32_t addr, rt_size_t size)
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{
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DMA_InitTypeDef DMA_InitStructure;
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DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_TC3 | DMA1_FLAG_TE3);
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dummy = 0;
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/* DMA Channel configuration ----------------------------------------------*/
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DMA_Cmd(DMA1_Channel2, DISABLE);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32) addr;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel2, &DMA_InitStructure);
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DMA_Cmd(DMA1_Channel2, ENABLE);
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/* Dummy TX channel configuration */
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DMA_Cmd(DMA1_Channel3, DISABLE);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(&dummy);
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel3, &DMA_InitStructure);
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DMA_Cmd(DMA1_Channel3, ENABLE);
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}
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static void DMA_TxConfiguration(rt_uint32_t addr, rt_size_t size)
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{
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DMA_InitTypeDef DMA_InitStructure;
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DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_TC3 | DMA1_FLAG_TE3);
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/* DMA Channel configuration ----------------------------------------------*/
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DMA_Cmd(DMA1_Channel2, DISABLE);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(&dummy);
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel2, &DMA_InitStructure);
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/* DMA Channel configuration ----------------------------------------------*/
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DMA_Cmd(DMA1_Channel3, DISABLE);
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DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
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DMA_InitStructure.DMA_MemoryBaseAddr = (u32) addr;
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DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
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DMA_InitStructure.DMA_BufferSize = size;
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DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
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DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
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DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
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DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
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DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
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DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
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DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
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DMA_Init(DMA1_Channel3, &DMA_InitStructure);
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DMA_Cmd(DMA1_Channel3, ENABLE);
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}
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#endif
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static uint8_t SPI_HostReadByte(void)
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{
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//return SPI_WriteByte(0x00);
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//Wait until the transmit buffer is empty
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//while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET);
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while( (SPI1->SR & SPI_I2S_FLAG_TXE) == RESET);
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// Send the byte
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SPI_I2S_SendData(SPI1, 0);
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//Wait until a data is received
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//while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_RXNE) == RESET);
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while( (SPI1->SR & SPI_I2S_FLAG_RXNE) == RESET);
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// Get the received data
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return SPI_I2S_ReceiveData(SPI1);
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}
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static void SPI_HostWriteByte(uint8_t wByte)
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{
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SPI_WriteByte(wByte);
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}
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/*****************************************************************************/
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/*Status Register Format: */
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/* ------------------------------------------------------------------------- */
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/* | bit7 | bit6 | bit5 | bit4 | bit3 | bit2 | bit1 | bit0 | */
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/* |--------|--------|--------|--------|--------|--------|--------|--------| */
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/* |RDY/BUSY| COMP | device density | X | X | */
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/* ------------------------------------------------------------------------- */
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/* 0:busy | | AT45DB041:0111 | protect|page size */
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/* 1:ready | | AT45DB161:1011 | */
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/* --------------------------------------------------------------------------*/
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/*****************************************************************************/
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static uint8_t AT45DB_StatusRegisterRead(void)
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{
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uint8_t i;
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FLASH_CS_0();
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SPI_HostWriteByte(AT45DB_READ_STATE_REGISTER);
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i = SPI_HostReadByte();
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FLASH_CS_1();
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return i;
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}
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static void wait_busy(void)
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{
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uint16_t i = 0;
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while (i++ < 10000)
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{
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if (AT45DB_StatusRegisterRead() & 0x80)
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{
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return;
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}
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}
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rt_kprintf("\r\nSPI_FLASH timeout!!!\r\n");
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}
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static void read_page(uint32_t page, uint8_t *pHeader)
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{
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#if SPI_FLASH_USE_DMA
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rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
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DMA_RxConfiguration((rt_uint32_t) pHeader, SECTOR_SIZE);
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FLASH_CS_0();
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SPI_HostWriteByte(AT45DB_MM_PAGE_READ);
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SPI_HostWriteByte((uint8_t)(page >> 6));
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SPI_HostWriteByte((uint8_t)(page << 2));
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SPI_HostWriteByte(0x00);
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// 4 don't care bytes
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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SPI_I2S_ClearFlag(SPI1, SPI_I2S_FLAG_RXNE);
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SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
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while (DMA_GetFlagStatus(DMA1_FLAG_TC2) == RESET);
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FLASH_CS_1();
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SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, DISABLE);
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rt_sem_release(&spi1_lock);
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#else
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uint16_t i;
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rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
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FLASH_CS_0();
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SPI_HostWriteByte(AT45DB_MM_PAGE_READ);
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SPI_HostWriteByte((uint8_t)(page >> 6));
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SPI_HostWriteByte((uint8_t)(page << 2));
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SPI_HostWriteByte(0x00);
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// 4 don't care bytes
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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SPI_HostWriteByte(0x00);
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for (i = 0; i < SECTOR_SIZE; i++)
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{
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*pHeader++ = SPI_HostReadByte();
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}
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FLASH_CS_1();
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rt_sem_release(&spi1_lock);
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#endif
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}
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static void write_page(uint32_t page, uint8_t *pHeader)
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{
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#if SPI_FLASH_USE_DMA
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rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
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DMA_TxConfiguration((rt_uint32_t) pHeader, SECTOR_SIZE);
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FLASH_CS_0();
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SPI_HostWriteByte(AT45DB_MM_PAGE_PROG_THRU_BUFFER1);
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SPI_HostWriteByte((uint8_t) (page >> 6));
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SPI_HostWriteByte((uint8_t) (page << 2));
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SPI_HostWriteByte(0x00);
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SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);
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while (DMA_GetFlagStatus(DMA1_FLAG_TC3) == RESET);
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FLASH_CS_1();
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SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, DISABLE);
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wait_busy();
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rt_sem_release(&spi1_lock);
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#else
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uint16_t i;
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rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
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FLASH_CS_0();
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SPI_HostWriteByte(AT45DB_MM_PAGE_PROG_THRU_BUFFER1);
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SPI_HostWriteByte((uint8_t) (page >> 6));
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SPI_HostWriteByte((uint8_t) (page << 2));
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SPI_HostWriteByte(0x00);
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for (i = 0; i < SECTOR_SIZE; i++)
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{
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SPI_HostWriteByte(*pHeader++);
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}
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FLASH_CS_1();
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wait_busy();
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rt_sem_release(&spi1_lock);
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#endif
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}
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#include <rtthread.h>
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/* SPI DEVICE */
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static struct rt_device spi_flash_device;
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/* RT-Thread Device Driver Interface */
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static rt_err_t rt_spi_flash_init(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_spi_flash_open(rt_device_t dev, rt_uint16_t oflag)
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{
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return RT_EOK;
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}
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static rt_err_t rt_spi_flash_close(rt_device_t dev)
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{
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return RT_EOK;
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}
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static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args)
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{
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return RT_EOK;
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}
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static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
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{
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rt_uint32_t index, nr;
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nr = size / SECTOR_SIZE;
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for (index = 0; index < nr; index++)
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{
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/* only supply single block read: block size 512Byte */
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#if SPI_FLASH_USE_DMA
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read_page((pos / SECTOR_SIZE + index), _spi_flash_buffer);
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rt_memcpy(((rt_uint8_t *) buffer + index * SECTOR_SIZE), _spi_flash_buffer, SECTOR_SIZE);
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#else
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read_page((pos / SECTOR_SIZE + index), ((rt_uint8_t *) buffer + index * SECTOR_SIZE));
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#endif
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}
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return nr * SECTOR_SIZE;
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}
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static rt_size_t rt_spi_flash_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
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{
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rt_uint32_t index, nr;
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nr = size / SECTOR_SIZE;
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for (index = 0; index < nr; index++)
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{
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/* only supply single block write: block size 512Byte */
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#if SPI_FLASH_USE_DMA
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rt_memcpy(_spi_flash_buffer, ((rt_uint8_t *) buffer + index * SECTOR_SIZE), SECTOR_SIZE);
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write_page((pos / SECTOR_SIZE + index), _spi_flash_buffer);
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#else
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write_page((pos / SECTOR_SIZE + index), ((rt_uint8_t *) buffer + index * SECTOR_SIZE));
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#endif
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}
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return nr * SECTOR_SIZE;
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}
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void rt_hw_spi_flash_init(void)
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{
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GPIO_Configuration();
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#if SPI_FLASH_USE_DMA
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/* Enable the DMA1 Clock */
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RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
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#endif
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/* register spi_flash device */
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spi_flash_device.type = RT_Device_Class_Block;
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spi_flash_device.init = rt_spi_flash_init;
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spi_flash_device.open = rt_spi_flash_open;
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spi_flash_device.close = rt_spi_flash_close;
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spi_flash_device.read = rt_spi_flash_read;
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spi_flash_device.write = rt_spi_flash_write;
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spi_flash_device.control = rt_spi_flash_control;
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/* no private */
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spi_flash_device.private = RT_NULL;
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rt_device_register(&spi_flash_device, "spi0",
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RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_STANDALONE);
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}
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