204 lines
5.8 KiB
C
204 lines
5.8 KiB
C
/*
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* File : cpuport.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2011, RT-Thread Development Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-10-21 Bernard the first version.
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* 2011-10-27 aozima update for cortex-M4 FPU.
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* 2011-12-31 aozima fixed stack align issues.
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* 2012-01-01 aozima support context switch load/store FPU register.
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*/
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#include <rtthread.h>
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#define _CPACR (*(rt_uint32_t *)0xE000ED88) /* Coprocessor Access Control Register */
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/* exception and interrupt handler table */
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rt_uint32_t rt_interrupt_from_thread, rt_interrupt_to_thread;
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rt_uint32_t rt_thread_switch_interrupt_flag;
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struct exception_stack_frame
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{
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rt_uint32_t r0;
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rt_uint32_t r1;
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rt_uint32_t r2;
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rt_uint32_t r3;
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rt_uint32_t r12;
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rt_uint32_t lr;
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rt_uint32_t pc;
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rt_uint32_t psr;
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};
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struct exception_stack_frame_fpu
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{
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rt_uint32_t r0;
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rt_uint32_t r1;
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rt_uint32_t r2;
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rt_uint32_t r3;
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rt_uint32_t r12;
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rt_uint32_t lr;
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rt_uint32_t pc;
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rt_uint32_t psr;
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/* FPU register */
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rt_uint32_t S0;
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rt_uint32_t S1;
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rt_uint32_t S2;
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rt_uint32_t S3;
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rt_uint32_t S4;
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rt_uint32_t S5;
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rt_uint32_t S6;
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rt_uint32_t S7;
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rt_uint32_t S8;
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rt_uint32_t S9;
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rt_uint32_t S10;
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rt_uint32_t S11;
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rt_uint32_t S12;
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rt_uint32_t S13;
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rt_uint32_t S14;
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rt_uint32_t S15;
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rt_uint32_t FPSCR;
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rt_uint32_t NO_NAME;
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};
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struct stack_frame
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{
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/* r4 ~ r11 register */
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rt_uint32_t r4;
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rt_uint32_t r5;
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rt_uint32_t r6;
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rt_uint32_t r7;
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rt_uint32_t r8;
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rt_uint32_t r9;
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rt_uint32_t r10;
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rt_uint32_t r11;
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struct exception_stack_frame exception_stack_frame;
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};
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struct stack_frame_fpu
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{
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/* r4 ~ r11 register */
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rt_uint32_t r4;
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rt_uint32_t r5;
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rt_uint32_t r6;
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rt_uint32_t r7;
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rt_uint32_t r8;
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rt_uint32_t r9;
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rt_uint32_t r10;
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rt_uint32_t r11;
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/* FPU register s16 ~ s31 */
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rt_uint32_t s16;
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rt_uint32_t s17;
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rt_uint32_t s18;
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rt_uint32_t s19;
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rt_uint32_t s20;
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rt_uint32_t s21;
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rt_uint32_t s22;
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rt_uint32_t s23;
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rt_uint32_t s24;
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rt_uint32_t s25;
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rt_uint32_t s26;
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rt_uint32_t s27;
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rt_uint32_t s28;
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rt_uint32_t s29;
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rt_uint32_t s30;
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rt_uint32_t s31;
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struct exception_stack_frame_fpu exception_stack_frame;
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};
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rt_uint8_t *rt_hw_stack_init(void *tentry, void *parameter,
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rt_uint8_t *stack_addr, void *texit)
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{
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rt_uint8_t * stk;
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unsigned long i;
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stk = stack_addr + sizeof(rt_uint32_t);
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/* check FPU enable ? */
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if((_CPACR & (0xF << 20)) == (0xF << 20))
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{
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/* FPU is enable */
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struct stack_frame_fpu * stack_frame_fpu;
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stk -= sizeof(struct stack_frame_fpu);
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stack_frame_fpu = (struct stack_frame_fpu *)stk;
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/* init all register */
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for(i=0; i<sizeof(struct stack_frame_fpu)/sizeof(rt_uint32_t); i++)
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{
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((rt_uint32_t*)stack_frame_fpu)[i] = 0xdeadbeef;
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}
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stack_frame_fpu->exception_stack_frame.r0 = (unsigned long)parameter; /* r0 : argument */
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stack_frame_fpu->exception_stack_frame.r1 = 0; /* r1 */
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stack_frame_fpu->exception_stack_frame.r2 = 0; /* r2 */
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stack_frame_fpu->exception_stack_frame.r3 = 0; /* r3 */
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stack_frame_fpu->exception_stack_frame.r12 = 0; /* r12 */
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stack_frame_fpu->exception_stack_frame.lr = (unsigned long)texit; /* lr */
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stack_frame_fpu->exception_stack_frame.pc = (unsigned long)tentry; /* entry point, pc */
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stack_frame_fpu->exception_stack_frame.psr = 0x01000000L; /* PSR */
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}
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else
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{
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/* FPU is disable */
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struct stack_frame * stack_frame;
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stk -= sizeof(struct stack_frame);
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stack_frame = (struct stack_frame *)stk;
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/* init all register */
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for(i=0; i<sizeof(struct stack_frame)/sizeof(rt_uint32_t); i++)
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{
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((rt_uint32_t*)stack_frame)[i] = 0xdeadbeef;
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}
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stack_frame->exception_stack_frame.r0 = (unsigned long)parameter; /* r0 : argument */
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stack_frame->exception_stack_frame.r1 = 0; /* r1 */
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stack_frame->exception_stack_frame.r2 = 0; /* r2 */
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stack_frame->exception_stack_frame.r3 = 0; /* r3 */
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stack_frame->exception_stack_frame.r12 = 0; /* r12 */
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stack_frame->exception_stack_frame.lr = (unsigned long)texit; /* lr */
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stack_frame->exception_stack_frame.pc = (unsigned long)tentry; /* entry point, pc */
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stack_frame->exception_stack_frame.psr = 0x01000000L; /* PSR */
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}
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/* return task's current stack address */
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return stk;
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}
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extern void rt_hw_interrupt_thread_switch(void);
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extern void list_thread(void);
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extern rt_thread_t rt_current_thread;
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void rt_hw_hard_fault_exception(struct exception_stack_frame * exception_stack)
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{
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rt_kprintf("psr: 0x%08x\n", exception_stack->psr);
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rt_kprintf(" pc: 0x%08x\n", exception_stack->pc);
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rt_kprintf(" lr: 0x%08x\n", exception_stack->lr);
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rt_kprintf("r12: 0x%08x\n", exception_stack->r12);
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rt_kprintf("r03: 0x%08x\n", exception_stack->r3);
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rt_kprintf("r02: 0x%08x\n", exception_stack->r2);
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rt_kprintf("r01: 0x%08x\n", exception_stack->r1);
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rt_kprintf("r00: 0x%08x\n", exception_stack->r0);
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rt_kprintf("hard fault on thread: %s\n", rt_current_thread->name);
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#ifdef RT_USING_FINSH
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list_thread();
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#endif
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while (1);
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}
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void rt_hw_cpu_shutdown()
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{
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rt_kprintf("shutdown...\n");
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RT_ASSERT(0);
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}
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