99 lines
3.1 KiB
C
99 lines
3.1 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fpcie_config.c
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* Date: 2022-02-10 14:55:11
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* LastEditTime: 2022-02-18 08:57:30
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* Description: This files is for
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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*/
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#include "fpcie.h"
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#include "fpcie_hw.h"
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/***************************** Include Files *********************************/
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/************************** Constant Definitions *****************************/
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/**************************** Type Definitions *******************************/
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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/************************** Function Prototypes ******************************/
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/**
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* @name: FPcieMiscIrqEnable
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* @msg: 开启PCIE 子系统中对应中断源的 misc 中断
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* @param {FPcie} *instance_p
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* @param {fsize_t} peu_num
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*/
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void FPcieMiscIrqEnable(FPcie *instance_p, fsize_t peu_num)
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{
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u64 config_address;
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u32 reg_value;
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FASSERT(instance_p != NULL);
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FASSERT(instance_p->is_ready == FT_COMPONENT_IS_READY);
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FASSERT(peu_num <= FPCIE_PEU1_C2);
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if (peu_num < FPCIE_PEU1_C0)
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{
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config_address = instance_p->config.peu0_config_address;
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}
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else
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{
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config_address = instance_p->config.peu1_config_address;
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peu_num -= FPCIE_PEU1_C0;
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}
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reg_value = FPCIE_READREG(config_address, FPCIE_REG_MISC_INT_ENALBE_OFFSET);
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FPCIE_WRITEREG(config_address, FPCIE_REG_MISC_INT_ENALBE_OFFSET, (reg_value | (1 << peu_num)));
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}
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/**
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* @name: FPcieMiscIrqDisable
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* @msg: 关闭PCIE 子系统中对应中断的 misc 中断
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* @param {FPcie} *instance_p is a pointer to the FPcie instance.
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* @param {fsize_t} peu_num is pci-e unit controller selection
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*/
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void FPcieMiscIrqDisable(FPcie *instance_p, fsize_t peu_num)
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{
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uintptr_t config_address;
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u32 reg_value;
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FASSERT(instance_p != NULL);
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FASSERT(instance_p->is_ready == FT_COMPONENT_IS_READY);
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FASSERT(peu_num <= FPCIE_PEU1_C2);
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if (peu_num < FPCIE_PEU1_C0)
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{
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config_address = instance_p->config.peu0_config_address;
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}
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else
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{
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config_address = instance_p->config.peu1_config_address;
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peu_num -= FPCIE_PEU1_C0;
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}
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reg_value = FPCIE_READREG(config_address, FPCIE_REG_MISC_INT_ENALBE_OFFSET);
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FPCIE_WRITEREG(config_address, FPCIE_REG_MISC_INT_ENALBE_OFFSET, (reg_value & ~(1 << peu_num)));
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}
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