123 lines
5.6 KiB
Plaintext
123 lines
5.6 KiB
Plaintext
/*
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** ###################################################################
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** Processors: LPC54608J512BD208
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** LPC54608J512ET180
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**
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** Compiler: IAR ANSI C/C++ Compiler for ARM
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** Reference manual: LPC54S60x/LPC5460x User manual Rev.0.9 7 Nov 2016
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** Version: rev. 1.1, 2016-11-25
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** Build: b161227
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**
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** Abstract:
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** Linker file for the IAR ANSI C/C++ Compiler for ARM
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**
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** Copyright (c) 2016 Freescale Semiconductor, Inc.
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** Copyright 2016 - 2017 NXP
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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**
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** o Redistributions of source code must retain the above copyright notice, this list
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** of conditions and the following disclaimer.
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**
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** o Redistributions in binary form must reproduce the above copyright notice, this
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** list of conditions and the following disclaimer in the documentation and/or
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** other materials provided with the distribution.
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**
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** o Neither the name of the copyright holder nor the names of its
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** contributors may be used to endorse or promote products derived from this
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** software without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
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** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
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** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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** http: www.nxp.com
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** mail: support@nxp.com
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**
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** ###################################################################
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*/
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define symbol __ram_vector_table_size__ = isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0;
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define symbol __ram_vector_table_offset__ = isdefinedsymbol(__ram_vector_table__) ? 0x000003FF : 0;
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define symbol m_interrupts_start = 0x00000000;
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define symbol m_interrupts_end = 0x000003FF;
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define symbol m_text_start = 0x00000400;
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define symbol m_text_end = 0x0007FFFF;
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define symbol m_interrupts_ram_start = 0x20000000;
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define symbol m_interrupts_ram_end = 0x20000000 + __ram_vector_table_offset__;
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define symbol m_data_start = m_interrupts_ram_start + __ram_vector_table_size__;
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define symbol m_data_end = 0x20027FFF;
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define symbol m_usb_sram_start = 0x40100000;
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define symbol m_usb_sram_end = 0x40101FFF;
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/* USB BDT size */
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define symbol usb_bdt_size = 0x0;
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/* Sizes */
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if (isdefinedsymbol(__stack_size__)) {
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define symbol __size_cstack__ = __stack_size__;
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} else {
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define symbol __size_cstack__ = 0x0400;
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}
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if (isdefinedsymbol(__heap_size__)) {
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define symbol __size_heap__ = __heap_size__;
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} else {
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define symbol __size_heap__ = 0x0400;
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}
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define exported symbol __VECTOR_TABLE = m_interrupts_start;
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define exported symbol __VECTOR_RAM = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
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define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
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define memory mem with size = 4G;
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define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
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| mem:[from m_text_start to m_text_end];
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define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
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define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
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define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
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define block CSTACK with alignment = 8, size = __size_cstack__ { };
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define block HEAP with alignment = 8, size = __size_heap__ { };
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define block RW { readwrite };
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define block ZI { zi };
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define block RTT_INIT_FUNC with fixed order { readonly section .rti_fn* };
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/* regions for USB */
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define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
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define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
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place in USB_BDT_region { section m_usb_bdt };
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place in USB_SRAM_region { section m_usb_global };
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initialize by copy { readwrite, section .textrw };
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if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
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{
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/* Required in a multi-threaded application */
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initialize by copy with packing = none { section __DLIB_PERTHREAD };
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}
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do not initialize { section .noinit, section m_usb_bdt, section m_usb_global };
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keep { section FSymTab };
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keep { section VSymTab };
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keep { section .rti_fn* };
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keep { section RTMSymTab };
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place at address mem: m_interrupts_start { readonly section .intvec };
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place in TEXT_region { readonly, block RTT_INIT_FUNC };
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place in DATA_region { block RW , block ZI, block CSTACK, last block HEAP};
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place in m_interrupts_ram_region { section m_interrupts_ram };
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