299 lines
7.3 KiB
C
299 lines
7.3 KiB
C
/*
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* Copyright (C) 2018 Shanghai Eastsoft Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-01-24 wangyq the first version
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* 2019-11-01 wangyq update libraries
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <string.h>
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#include <rthw.h>
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#include "board.h"
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#include "drv_spi.h"
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#include <ald_spi.h>
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#include <ald_gpio.h>
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#include <ald_cmu.h>
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#ifdef RT_USING_SPI
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#define SPITIMEOUT 0x0FFF
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rt_err_t spi_configure(struct rt_spi_device *device,
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struct rt_spi_configuration *cfg)
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{
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spi_handle_t *hspi;
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hspi = (spi_handle_t *)device->bus->parent.user_data;
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/* config spi mode */
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if (cfg->mode & RT_SPI_SLAVE)
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{
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hspi->init.mode = SPI_MODE_SLAVER;
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}
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else
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{
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hspi->init.mode = SPI_MODE_MASTER;
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}
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if (cfg->mode & RT_SPI_3WIRE)
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{
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hspi->init.dir = SPI_DIRECTION_1LINE;
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}
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else
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{
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hspi->init.dir = SPI_DIRECTION_2LINES;
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}
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if (cfg->data_width == 8)
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{
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hspi->init.data_size = SPI_DATA_SIZE_8;
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}
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else if (cfg->data_width == 16)
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{
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hspi->init.data_size = SPI_DATA_SIZE_16;
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}
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if (cfg->mode & RT_SPI_CPHA)
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{
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hspi->init.phase = SPI_CPHA_SECOND;
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}
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else
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{
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hspi->init.phase = SPI_CPHA_FIRST;
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}
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if (cfg->mode & RT_SPI_CPOL)
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{
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hspi->init.polarity = SPI_CPOL_HIGH;
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}
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else
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{
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hspi->init.polarity = SPI_CPOL_LOW;
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}
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if (cfg->mode & RT_SPI_NO_CS)
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{
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hspi->init.ss_en = DISABLE;
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}
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else
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{
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hspi->init.ss_en = ENABLE;
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}
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/* config spi clock */
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if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 2)
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{
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/* pclk1 max speed 48MHz, spi master max speed 10MHz */
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if (ald_cmu_get_pclk1_clock() / 2 <= 10000000)
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{
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hspi->init.baud = SPI_BAUD_2;
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}
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else if (ald_cmu_get_pclk1_clock() / 4 <= 10000000)
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{
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hspi->init.baud = SPI_BAUD_4;
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}
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else
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{
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hspi->init.baud = SPI_BAUD_8;
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}
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}
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else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 4)
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{
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/* pclk1 max speed 48MHz, spi master max speed 10MHz */
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if (ald_cmu_get_pclk1_clock() / 4 <= 10000000)
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{
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hspi->init.baud = SPI_BAUD_4;
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}
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else
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{
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hspi->init.baud = SPI_BAUD_8;
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}
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}
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else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 8)
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{
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hspi->init.baud = SPI_BAUD_8;
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}
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else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 16)
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{
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hspi->init.baud = SPI_BAUD_16;
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}
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else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 32)
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{
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hspi->init.baud = SPI_BAUD_32;
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}
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else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 64)
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{
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hspi->init.baud = SPI_BAUD_64;
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}
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else if (cfg->max_hz >= ald_cmu_get_pclk1_clock() / 128)
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{
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hspi->init.baud = SPI_BAUD_128;
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}
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else
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{
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hspi->init.baud = SPI_BAUD_256;
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}
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ald_spi_init(hspi);
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return RT_EOK;
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}
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static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *message)
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{
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rt_err_t res;
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spi_handle_t *hspi;
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struct es32f0_hw_spi_cs *cs;
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RT_ASSERT(device != RT_NULL);
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RT_ASSERT(device->bus != RT_NULL);
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RT_ASSERT(device->bus->parent.user_data != RT_NULL);
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RT_ASSERT(message->send_buf != RT_NULL || message->recv_buf != RT_NULL);
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hspi = (spi_handle_t *)device->bus->parent.user_data;
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cs = device->parent.user_data;
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/* only send data */
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if (message->recv_buf == RT_NULL)
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{
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if (message->cs_take)
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{
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rt_pin_write(cs->pin, 0);
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}
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res = ald_spi_send(hspi, (rt_uint8_t *)message->send_buf, (rt_int32_t)message->length, SPITIMEOUT);
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if (message->cs_release)
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{
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rt_pin_write(cs->pin, 1);
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}
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if (res != RT_EOK)
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return RT_ERROR;
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}
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/* only receive data */
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if (message->send_buf == RT_NULL)
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{
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if (message->cs_take)
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{
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rt_pin_write(cs->pin, 0);
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}
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res = ald_spi_recv(hspi, (rt_uint8_t *)message->recv_buf, (rt_int32_t)message->length, SPITIMEOUT);
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if (message->cs_release)
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{
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rt_pin_write(cs->pin, 1);
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}
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if (res != RT_EOK)
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return RT_ERROR;
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}
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/* send & receive */
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else
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{
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if (message->cs_take)
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{
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rt_pin_write(cs->pin, 0);
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}
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res = ald_spi_send_recv(hspi, (rt_uint8_t *)message->send_buf, (rt_uint8_t *)message->recv_buf,
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(rt_int32_t)message->length, SPITIMEOUT);
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if (message->cs_release)
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{
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rt_pin_write(cs->pin, 1);
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}
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if (res != RT_EOK)
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return RT_ERROR;
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}
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return message->length;
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}
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const struct rt_spi_ops es32f0_spi_ops =
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{
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spi_configure,
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spixfer,
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};
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static struct rt_spi_bus _spi_bus0, _spi_bus1;
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static spi_handle_t _spi0, _spi1;
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int es32f0_spi_register_bus(SPI_TypeDef *SPIx, const char *name)
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{
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struct rt_spi_bus *spi_bus;
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spi_handle_t *spi;
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gpio_init_t gpio_instruct;
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if (SPIx == SPI0)
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{
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_spi0.perh = SPI0;
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spi_bus = &_spi_bus0;
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spi = &_spi0;
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/* SPI0 gpio init */
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gpio_instruct.mode = GPIO_MODE_OUTPUT;
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gpio_instruct.odos = GPIO_PUSH_PULL;
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gpio_instruct.func = GPIO_FUNC_4;
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gpio_instruct.type = GPIO_TYPE_CMOS;
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gpio_instruct.flt = GPIO_FILTER_DISABLE;
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/* PB3->SPI0_SCK, PB5->SPI0_MOSI */
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ald_gpio_init(GPIOB, GPIO_PIN_3 | GPIO_PIN_5, &gpio_instruct);
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/* PB4->SPI0_MISO */
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gpio_instruct.mode = GPIO_MODE_INPUT;
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ald_gpio_init(GPIOB, GPIO_PIN_4, &gpio_instruct);
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}
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else if (SPIx == SPI1)
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{
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_spi1.perh = SPI1;
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spi_bus = &_spi_bus1;
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spi = &_spi1;
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/* SPI1 gpio init */
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gpio_instruct.mode = GPIO_MODE_OUTPUT;
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gpio_instruct.odos = GPIO_PUSH_PULL;
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gpio_instruct.func = GPIO_FUNC_4;
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gpio_instruct.type = GPIO_TYPE_CMOS;
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gpio_instruct.flt = GPIO_FILTER_DISABLE;
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/* PB13->SPI1_SCK, PB15->SPI1_MOSI */
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ald_gpio_init(GPIOB, GPIO_PIN_13 | GPIO_PIN_15, &gpio_instruct);
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/* PB14->SPI1_MISO */
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gpio_instruct.mode = GPIO_MODE_INPUT;
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ald_gpio_init(GPIOB, GPIO_PIN_14, &gpio_instruct);
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}
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else
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{
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return -1;
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}
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spi_bus->parent.user_data = spi;
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return rt_spi_bus_register(spi_bus, name, &es32f0_spi_ops);
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}
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rt_err_t es32f0_spi_device_attach(rt_uint32_t pin, const char *bus_name, const char *device_name)
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{
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/* define spi Instance */
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struct rt_spi_device *spi_device = (struct rt_spi_device *)rt_malloc(sizeof(struct rt_spi_device));
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RT_ASSERT(spi_device != RT_NULL);
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struct es32f0_hw_spi_cs *cs_pin = (struct es32f0_hw_spi_cs *)rt_malloc(sizeof(struct es32f0_hw_spi_cs));
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RT_ASSERT(cs_pin != RT_NULL);
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cs_pin->pin = pin;
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rt_pin_mode(pin, PIN_MODE_OUTPUT);
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rt_pin_write(pin, 1);
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return rt_spi_bus_attach_device(spi_device, device_name, bus_name, (void *)cs_pin);
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}
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int rt_hw_spi_init(void)
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{
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int result = 0;
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#ifdef BSP_USING_SPI0
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result = es32f0_spi_register_bus(SPI0, "spi0");
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#endif
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#ifdef BSP_USING_SPI1
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result = es32f0_spi_register_bus(SPI1, "spi1");
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#endif
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return result;
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}
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INIT_BOARD_EXPORT(rt_hw_spi_init);
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#endif
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