152 lines
3.8 KiB
C
152 lines
3.8 KiB
C
/*
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* File : board.c
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* This file is part of RT-Thread RTOS
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* COPYRIGHT (C) 2006 - 2009 RT-Thread Develop Team
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*
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* The license and distribution terms for this file may be
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* found in the file LICENSE in this distribution or at
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* http://www.rt-thread.org/license/LICENSE
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*
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* Change Logs:
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* Date Author Notes
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* 2011-01-13 weety first version
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*/
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#include <rtthread.h>
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#include <rthw.h>
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#include "board.h"
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#include <mmu.h>
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/**
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* @addtogroup at91sam9260
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*/
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/*@{*/
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extern void rt_hw_clock_init(void);
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extern void rt_hw_get_clock(void);
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extern void rt_hw_set_dividor(rt_uint8_t hdivn, rt_uint8_t pdivn);
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extern void rt_hw_set_clock(rt_uint8_t sdiv, rt_uint8_t pdiv, rt_uint8_t mdiv);
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extern void rt_dbgu_isr(void);
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static struct mem_desc at91_mem_desc[] = {
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{ 0x00000000, 0xFFFFFFFF, 0x00000000, RW_NCNB }, /* None cached for 4G memory */
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{ 0x20000000, 0x24000000-1, 0x20000000, RW_CB }, /* 64M cached SDRAM memory */
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{ 0x00000000, 0x100000, 0x20000000, RW_CB }, /* isr vector table */
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{ 0x90000000, 0x90400000 - 1, 0x00200000, RW_NCNB }, /* 4K SRAM0 + 4k SRAM1 */
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{ 0xA0000000, 0xA4000000-1, 0x20000000, RW_NCNB } /* 64M none-cached SDRAM memory */
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};
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#define PIT_CPIV(x) ((x) & AT91_PIT_CPIV)
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#define PIT_PICNT(x) (((x) & AT91_PIT_PICNT) >> 20)
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static rt_uint32_t pit_cycle; /* write-once */
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static rt_uint32_t pit_cnt; /* access only w/system irq blocked */
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/**
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* This function will handle rtos timer
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*/
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void rt_timer_handler(int vector, void *param)
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{
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#ifdef RT_USING_DBGU
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if (at91_sys_read(AT91_DBGU + AT91_US_CSR) & 0x1)
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{
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rt_dbgu_isr();
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}
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#endif
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if (at91_sys_read(AT91_PIT_SR) & AT91_PIT_PITS)
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{
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unsigned nr_ticks;
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/* Get number of ticks performed before irq, and ack it */
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nr_ticks = PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
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rt_tick_increase();
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}
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}
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static void at91sam926x_pit_reset(void)
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{
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/* Disable timer and irqs */
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at91_sys_write(AT91_PIT_MR, 0);
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/* Clear any pending interrupts, wait for PIT to stop counting */
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while (PIT_CPIV(at91_sys_read(AT91_PIT_PIVR)) != 0)
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;
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/* Start PIT but don't enable IRQ */
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//at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN);
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pit_cnt += pit_cycle * PIT_PICNT(at91_sys_read(AT91_PIT_PIVR));
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at91_sys_write(AT91_PIT_MR, (pit_cycle - 1) | AT91_PIT_PITEN
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| AT91_PIT_PITIEN);
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rt_kprintf("PIT_MR=0x%08x\n", at91_sys_read(AT91_PIT_MR));
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}
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/*
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* Set up both clocksource and clockevent support.
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*/
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static void at91sam926x_pit_init(void)
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{
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rt_uint32_t pit_rate;
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rt_uint32_t bits;
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/*
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* Use our actual MCK to figure out how many MCK/16 ticks per
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* 1/HZ period (instead of a compile-time constant LATCH).
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*/
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pit_rate = clk_get_rate(clk_get("mck")) / 16;
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rt_kprintf("pit_rate=%dHZ\n", pit_rate);
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pit_cycle = (pit_rate + RT_TICK_PER_SECOND/2) / RT_TICK_PER_SECOND;
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/* Initialize and enable the timer */
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at91sam926x_pit_reset();
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}
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/**
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* This function will init pit for system ticks
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*/
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void rt_hw_timer_init()
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{
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at91sam926x_pit_init();
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/* install interrupt handler */
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rt_hw_interrupt_install(AT91_ID_SYS, rt_timer_handler,
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RT_NULL, "system");
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rt_hw_interrupt_umask(AT91_ID_SYS);
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}
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void at91_tc1_init()
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{
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at91_sys_write(AT91_PMC_PCER, 1<<AT91SAM9260_ID_TC0);
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writel(AT91_TC_TC0XC0S_NONE | AT91_TC_TC1XC1S_NONE | AT91_TC_TC2XC2S_NONE, AT91SAM9260_BASE_TCB0 + AT91_TC_BMR);
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writel(AT91_TC_CLKDIS, AT91SAM9260_BASE_TC0 + AT91_TC_CCR);
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writel(AT91_TC_TIMER_CLOCK4, AT91SAM9260_BASE_TC0 + AT91_TC_CMR);
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writel(0xffff, AT91SAM9260_BASE_TC0 + AT91_TC_CV);
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}
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/**
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* This function will init at91sam9260 board
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*/
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void rt_hw_board_init()
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{
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/* initialize the system clock */
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rt_hw_clock_init();
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/* initialize uart */
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rt_hw_uart_init();
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rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
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/* initialize mmu */
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rt_hw_mmu_init(at91_mem_desc, sizeof(at91_mem_desc)/sizeof(at91_mem_desc[0]));
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/* initialize timer0 */
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rt_hw_timer_init();
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}
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/*@}*/
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