7c66501861
MIPS common code was highly duplicated, This commit is a attempt to clean-up and refine these code. The context and exception handle flow is mostly identical with Linux, but a notable difference is that when FPU enabled, we save FP registers in stackframe unconditionally. Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
29 lines
706 B
C
29 lines
706 B
C
/*
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* Copyright (c) 2006-2019, RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-12-04 Jiaxun Yang Initial version
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*/
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#ifndef __EXCEPTION_H__
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#define __EXCEPTION_H__
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#include "ptrace.h"
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#ifndef __ASSEMBLY__
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typedef void (* exception_func_t)(struct pt_regs *regs);
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extern int rt_hw_exception_init(void);
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extern exception_func_t sys_exception_handlers[];
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extern void rt_do_mips_cpu_irq(rt_uint32_t ip);
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exception_func_t rt_set_except_vector(int n, exception_func_t func);
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extern void mips_mask_cpu_irq(rt_uint32_t irq);
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extern void mips_unmask_cpu_irq(rt_uint32_t irq);
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#endif
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#endif /* end of __EXCEPTION_H__ */
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