327 lines
9.2 KiB
C
327 lines
9.2 KiB
C
/*
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* Copyright (c) 2019 Winner Microelectronics Co., Ltd.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2019-07-10 Ernest 1st version
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*/
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#include <rtthread.h>
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#include <rtdevice.h>
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#include <stdlib.h>
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#include <string.h>
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#include "drv_crypto.h"
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#include "board.h"
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struct stm32_hwcrypto_device
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{
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struct rt_hwcrypto_device dev;
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struct rt_mutex mutex;
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};
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#if defined(BSP_USING_CRC)
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struct hash_ctx_des
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{
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CRC_HandleTypeDef contex;
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};
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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static struct hwcrypto_crc_cfg crc_backup_cfg;
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static int reverse_bit(rt_uint32_t n)
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{
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n = ((n >> 1) & 0x55555555) | ((n << 1) & 0xaaaaaaaa);
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n = ((n >> 2) & 0x33333333) | ((n << 2) & 0xcccccccc);
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n = ((n >> 4) & 0x0f0f0f0f) | ((n << 4) & 0xf0f0f0f0);
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n = ((n >> 8) & 0x00ff00ff) | ((n << 8) & 0xff00ff00);
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n = ((n >> 16) & 0x0000ffff) | ((n << 16) & 0xffff0000);
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return n;
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}
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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static rt_uint32_t _crc_update(struct hwcrypto_crc *ctx, const rt_uint8_t *in, rt_size_t length)
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{
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rt_uint32_t result = 0;
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struct stm32_hwcrypto_device *stm32_hw_dev = (struct stm32_hwcrypto_device *)ctx->parent.device->user_data;
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#if defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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CRC_HandleTypeDef *HW_TypeDef = (CRC_HandleTypeDef *)(ctx->parent.contex);
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#endif
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rt_mutex_take(&stm32_hw_dev->mutex, RT_WAITING_FOREVER);
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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if (memcmp(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg)) != 0)
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{
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if (HW_TypeDef->Init.DefaultPolynomialUse == DEFAULT_POLYNOMIAL_DISABLE)
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{
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HW_TypeDef->Init.GeneratingPolynomial = ctx ->crc_cfg.poly;
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}
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else
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{
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HW_TypeDef->Init.GeneratingPolynomial = DEFAULT_CRC32_POLY;
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}
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switch (ctx ->crc_cfg.flags)
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{
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case 0:
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HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_NONE;
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HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_DISABLE;
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break;
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case CRC_FLAG_REFIN:
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HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
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break;
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case CRC_FLAG_REFOUT:
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HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
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break;
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case CRC_FLAG_REFIN|CRC_FLAG_REFOUT:
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HW_TypeDef->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
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HW_TypeDef->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
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break;
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default :
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goto _exit;
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}
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HW_TypeDef->Init.CRCLength = ctx ->crc_cfg.width;
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if (HW_TypeDef->Init.DefaultInitValueUse == DEFAULT_INIT_VALUE_DISABLE)
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{
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HW_TypeDef->Init.InitValue = ctx ->crc_cfg.last_val;
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}
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if (HAL_CRC_Init(HW_TypeDef) != HAL_OK)
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{
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goto _exit;
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}
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memcpy(&crc_backup_cfg, &ctx->crc_cfg, sizeof(struct hwcrypto_crc_cfg));
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}
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if (HAL_CRC_STATE_READY != HAL_CRC_GetState(HW_TypeDef))
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{
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goto _exit;
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}
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#else
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if (ctx->crc_cfg.flags != 0 || ctx->crc_cfg.last_val != 0xFFFFFFFF || ctx->crc_cfg.xorout != 0 || length % 4 != 0)
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{
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goto _exit;
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}
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length /= 4;
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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result = HAL_CRC_Accumulate(ctx->parent.contex, (rt_uint32_t *)in, length);
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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if (HW_TypeDef->Init.OutputDataInversionMode)
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{
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ctx ->crc_cfg.last_val = reverse_bit(result);
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}
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else
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{
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ctx ->crc_cfg.last_val = result;
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}
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crc_backup_cfg.last_val = ctx ->crc_cfg.last_val;
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result = (result ? result ^ (ctx ->crc_cfg.xorout) : result);
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#endif /* defined(SOC_SERIES_STM32L4)|| defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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_exit:
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rt_mutex_release(&stm32_hw_dev->mutex);
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return result;
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}
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static const struct hwcrypto_crc_ops crc_ops =
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{
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.update = _crc_update,
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};
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#endif /* BSP_USING_CRC */
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#if defined(BSP_USING_RNG)
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static rt_uint32_t _rng_rand(struct hwcrypto_rng *ctx)
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{
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rt_uint32_t gen_random = 0;
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RNG_HandleTypeDef *HW_TypeDef = (RNG_HandleTypeDef *)(ctx->parent.contex);
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if (HAL_OK == HAL_RNG_GenerateRandomNumber(HW_TypeDef, &gen_random))
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{
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return gen_random ;
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}
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return 0;
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}
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static const struct hwcrypto_rng_ops rng_ops =
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{
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.update = _rng_rand,
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};
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#endif /* BSP_USING_RNG */
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static rt_err_t _crypto_create(struct rt_hwcrypto_ctx *ctx)
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{
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rt_err_t res = RT_EOK;
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switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
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{
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#if defined(BSP_USING_RNG)
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case HWCRYPTO_TYPE_RNG:
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{
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RNG_HandleTypeDef *hrng = rt_calloc(1, sizeof(RNG_HandleTypeDef));
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hrng->Instance = RNG;
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HAL_RNG_Init(hrng);
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ctx->contex = hrng;
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((struct hwcrypto_rng *)ctx)->ops = &rng_ops;
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break;
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}
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#endif /* BSP_USING_RNG */
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#if defined(BSP_USING_CRC)
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case HWCRYPTO_TYPE_CRC:
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{
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CRC_HandleTypeDef *hcrc = rt_calloc(1, sizeof(CRC_HandleTypeDef));
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if (RT_NULL == hcrc)
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{
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res = -RT_ERROR;
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break;
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}
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hcrc->Instance = CRC;
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7)
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hcrc->Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE;
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hcrc->Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE;
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hcrc->Init.InputDataInversionMode = CRC_INPUTDATA_INVERSION_BYTE;
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hcrc->Init.OutputDataInversionMode = CRC_OUTPUTDATA_INVERSION_ENABLE;
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hcrc->InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES;
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#else
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if (HAL_CRC_Init(hcrc) != HAL_OK)
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{
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res = -RT_ERROR;
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}
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#endif /* defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32H7) || defined(SOC_SERIES_STM32F7) */
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ctx->contex = hcrc;
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((struct hwcrypto_crc *)ctx)->ops = &crc_ops;
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break;
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}
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#endif /* BSP_USING_CRC */
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default:
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res = -RT_ERROR;
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break;
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}
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return res;
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}
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static void _crypto_destroy(struct rt_hwcrypto_ctx *ctx)
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{
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switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
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{
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#if defined(BSP_USING_RNG)
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case HWCRYPTO_TYPE_RNG:
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break;
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#endif /* BSP_USING_RNG */
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#if defined(BSP_USING_CRC)
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case HWCRYPTO_TYPE_CRC:
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HAL_CRC_DeInit((CRC_HandleTypeDef *)(ctx->contex));
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break;
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#endif /* BSP_USING_CRC */
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default:
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break;
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}
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rt_free(ctx->contex);
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}
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static rt_err_t _crypto_clone(struct rt_hwcrypto_ctx *des, const struct rt_hwcrypto_ctx *src)
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{
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rt_err_t res = RT_EOK;
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switch (src->type & HWCRYPTO_MAIN_TYPE_MASK)
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{
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#if defined(BSP_USING_RNG)
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case HWCRYPTO_TYPE_RNG:
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if (des->contex && src->contex)
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{
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rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
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}
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break;
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#endif /* BSP_USING_RNG */
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#if defined(BSP_USING_CRC)
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case HWCRYPTO_TYPE_CRC:
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if (des->contex && src->contex)
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{
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rt_memcpy(des->contex, src->contex, sizeof(struct hash_ctx_des));
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}
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break;
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#endif /* BSP_USING_CRC */
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default:
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res = -RT_ERROR;
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break;
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}
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return res;
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}
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static void _crypto_reset(struct rt_hwcrypto_ctx *ctx)
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{
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switch (ctx->type & HWCRYPTO_MAIN_TYPE_MASK)
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{
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#if defined(BSP_USING_RNG)
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case HWCRYPTO_TYPE_RNG:
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break;
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#endif /* BSP_USING_RNG */
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#if defined(BSP_USING_CRC)
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case HWCRYPTO_TYPE_CRC:
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__HAL_CRC_DR_RESET((CRC_HandleTypeDef *)ctx-> contex);
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break;
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#endif /* BSP_USING_CRC */
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default:
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break;
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}
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}
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static const struct rt_hwcrypto_ops _ops =
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{
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.create = _crypto_create,
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.destroy = _crypto_destroy,
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.copy = _crypto_clone,
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.reset = _crypto_reset,
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};
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int stm32_hw_crypto_device_init(void)
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{
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static struct stm32_hwcrypto_device _crypto_dev;
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rt_uint32_t cpuid[3] = {0};
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_crypto_dev.dev.ops = &_ops;
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#if defined(BSP_USING_UDID)
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#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F0) || defined(SOC_SERIES_STM32F7)
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cpuid[0] = HAL_GetUIDw0();
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cpuid[1] = HAL_GetUIDw1();
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#elif defined(SOC_SERIES_STM32F1)
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HAL_GetUID(cpuid);
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#elif defined(SOC_SERIES_STM32H7)
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cpuid[0] = HAL_GetREVID();
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cpuid[1] = HAL_GetDEVID();
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#endif
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#endif /* BSP_USING_UDID */
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_crypto_dev.dev.id = 0;
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rt_memcpy(&_crypto_dev.dev.id, cpuid, 8);
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_crypto_dev.dev.user_data = &_crypto_dev;
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if (rt_hwcrypto_register(&_crypto_dev.dev, RT_HWCRYPTO_DEFAULT_NAME) != RT_EOK)
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{
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return -1;
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}
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rt_mutex_init(&_crypto_dev.mutex, RT_HWCRYPTO_DEFAULT_NAME, RT_IPC_FLAG_FIFO);
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return 0;
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}
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INIT_DEVICE_EXPORT(stm32_hw_crypto_device_init);
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