169 lines
6.0 KiB
C
169 lines
6.0 KiB
C
/*
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* Copyright : (C) 2022 Phytium Information Technology, Inc.
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* All Rights Reserved.
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*
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* This program is OPEN SOURCE software: you can redistribute it and/or modify it
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* under the terms of the Phytium Public License as published by the Phytium Technology Co.,Ltd,
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* either version 1.0 of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See the Phytium Public License for more details.
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*
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*
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* FilePath: fddma.h
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* Date: 2022-02-10 14:53:42
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* LastEditTime: 2022-02-18 08:24:52
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* Description: This files is for ddma interface definition
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*
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* Modify History:
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* Ver Who Date Changes
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* ----- ------ -------- --------------------------------------
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* 1.0 Zhugengyu 2022/5/13 init commit
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*/
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#ifndef DRIVER_FDDMA_H
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#define DRIVER_FDDMA_H
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/***************************** Include Files *********************************/
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#include "ftypes.h"
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#include "ferror_code.h"
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/************************** Constant Definitions *****************************/
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typedef enum
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{
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FDDMA_CHAN_0 = 0,
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FDDMA_CHAN_1,
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FDDMA_CHAN_2,
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FDDMA_CHAN_3,
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FDDMA_CHAN_4,
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FDDMA_CHAN_5,
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FDDMA_CHAN_6,
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FDDMA_CHAN_7,
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FDDMA_NUM_OF_CHAN
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} FDdmaChanIndex; /* DDMA channel index */
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typedef enum
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{
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FDDMA_CHAN_REQ_RX = 0,
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FDDMA_CHAN_REQ_TX,
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} FDdmaChanRequst; /* DDMA channel direction */
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typedef enum
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{
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FDDMA_CHAN_EVT_REQ_DONE = 0,
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FDDMA_CHAN_EVT_FIFO_EMPTY,
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FDDMA_CHAN_EVT_FIFO_FULL,
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FDDMA_NUM_OF_CHAN_EVT
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} FDdmaChanEvt; /* DDMA channel interrupt event */
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#define FDDMA_SUCCESS FT_SUCCESS
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#define FDDMA_ERR_NOT_INIT FT_MAKE_ERRCODE(ErrModBsp, ErrDdma, 0)
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#define FDDMA_ERR_CHAN_BINDED FT_MAKE_ERRCODE(ErrModBsp, ErrDdma, 1)
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#define FDDMA_ERR_CHAN_RUNNING FT_MAKE_ERRCODE(ErrModBsp, ErrDdma, 2)
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#define FDDMA_ERR_INVALID_TRANS_SIZE FT_MAKE_ERRCODE(ErrModBsp, ErrDdma, 3)
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#define FDDMA_ERR_WAIT_TIMEOUT FT_MAKE_ERRCODE(ErrModBsp, ErrDdma, 4)
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#define FDDMA_ERR_INVALID_DDR_ADDR FT_MAKE_ERRCODE(ErrModBsp, ErrDdma, 5)
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/**************************** Type Definitions *******************************/
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typedef struct FDdma_ FDdma;
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typedef struct FDdmaChan_ FDdmaChan;
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typedef void (*FDdmaChanEvtHandler)(FDdmaChan *const dma_chan, void *arg); /* DMA interrupt event handler */
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typedef struct
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{
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u32 id; /* DDMA ctrl id */
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uintptr base_addr; /* DDMA ctrl base address */
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u32 irq_num; /* DDMA ctrl interrupt id */
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u32 irq_prority; /* DDMA ctrl interrupt priority */
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} FDdmaConfig; /* DDMA instance configuration */
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typedef struct
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{
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FDdmaChanIndex id; /* DMA channel index */
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u32 slave_id; /* Perpherial slave id for DDMA */
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FDdmaChanRequst req_mode; /* DMA transfer direction */
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uintptr ddr_addr; /* DMA channel DDR address, could be source or destination */
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u32 dev_addr; /* DMA channel Perpherial, could be source or destination */
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u32 trans_len; /* DMA channel transfer length */
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#define FDDMA_MAX_TRANSFER_LEN 64 /* max bytes in transfer */
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#define FDDMA_MIN_TRANSFER_LEN 4 /* min bytes in transfer */
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u32 timeout; /* timeout = 0 means no use DMA timeout */
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} FDdmaChanConfig; /* DDMA channel instance */
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typedef struct FDdmaChan_
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{
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FDdmaChanConfig config; /* DDMA channel configuration */
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boolean is_used; /* TRUE means channel is in use */
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FDdma *dma; /* DMA instance of this channel */
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FDdmaChanEvtHandler evt_handler[FDDMA_NUM_OF_CHAN_EVT]; /* interrupt evt */
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void *evt_handler_args[FDDMA_NUM_OF_CHAN_EVT]; /* interrupt evt args */
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} FDdmaChan; /* DDMA channel instance */
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typedef struct FDdma_
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{
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FDdmaConfig config; /* DDMA instance configuration */
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FDdmaChan *chan[FDDMA_NUM_OF_CHAN]; /* DDMA channel instance, NULL means channel not yet allocate */
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u32 is_ready; /* TRUE means DDMA init ok */
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u32 bind_status; /* channel bind status, BIT(n) = 1 means channel n is allocated */
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} FDdma; /* DDMA instance */
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/************************** Variable Definitions *****************************/
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/***************** Macros (Inline Functions) Definitions *********************/
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#define FDDMA_DDR_ADDR_ALIGMENT 128 /* DMA DDR Buffer need align wiht 128 bytes */
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/************************** Function Prototypes ******************************/
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/* 获取DDMA实例默认配置 */
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const FDdmaConfig *FDdmaLookupConfig(u32 instance_id);
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/* 初始化DDMA控制器 */
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FError FDdmaCfgInitialization(FDdma *const instance, const FDdmaConfig *input_config);
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/* 去初始化DDMA控制器 */
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void FDdmaDeInitialization(FDdma *const instance);
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/* 按照配置分配DDMA通道 */
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FError FDdmaAllocateChan(FDdma *const instance, FDdmaChan *const dma_chan, const FDdmaChanConfig *dma_chan_config);
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/* 释放之前分配的DDMA通道 */
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FError FDdmaDellocateChan(FDdmaChan *const dma_chan);
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/* 使能指定的DDMA通道，调用FDdmaAllocateChan后无需调用此函数 */
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FError FDdmaActiveChan(FDdmaChan *const dma_chan);
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/* 去使能DDMA通道 */
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FError FDdmaDeactiveChan(FDdmaChan *const dma_chan);
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/* 启动DDMA控制器并开始传输 */
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FError FDdmaStart(FDdma *const instance);
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/* 停止DDMA控制器 */
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FError FDdmaStop(FDdma *const instance);
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/* DDMA中断处理函数 */
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void FDdmaIrqHandler(s32 vector, void *args);
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/* 注册DDMA通道中断响应事件函数 */
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void FDdmaRegisterChanEvtHandler(FDdmaChan *const dma_chan,
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FDdmaChanEvt evt,
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FDdmaChanEvtHandler handler,
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void *handler_arg);
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/* DDMA控制器寄存器自检测试 */
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void FDdmaDumpRegisters(uintptr base_addr);
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void FDdmaDumpChanRegisters(uintptr base_addr, FDdmaChanIndex chan);
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#ifdef __cplusplus
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}
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#endif
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#endif |